xWRL6432 MMWAVE-L-SDK  05.04.00.01
hwa/v0/hwa.h
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1 /*
2  * Copyright (C) 2021 Texas Instruments Incorporated
3  *
4  * Redistribution and use in source and binary forms, with or without
5  * modification, are permitted provided that the following conditions
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12  * notice, this list of conditions and the following disclaimer in the
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14  * distribution.
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18  * from this software without specific prior written permission.
19  *
20  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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32  */
33 
67 #ifndef HWA_H_
68 #define HWA_H_
69 
70 /* ========================================================================== */
71 /* Include Files */
72 /* ========================================================================== */
73 
74 #include <stdint.h>
75 #include <stddef.h>
76 #include <stdbool.h>
77 #include <drivers/hw_include/csl_complex_math_types.h>
78 #include <kernel/dpl/HwiP.h>
79 #include <kernel/nortos/dpl/m4/HwiP_armv7m.h>
80 #include <drivers/hw_include/cslr_hwa.h>
81 
82 #ifdef __cplusplus
83 extern "C" {
84 #endif
85 
86 /* ========================================================================== */
87 /* Macros & Typedefs */
88 /* ========================================================================== */
89 
90 #define HWA_RAM_WINDOW_SIZE_IN_BYTES 1024*4
93 #define HWADRV_ADDR_TRANSLATE_CPU_TO_HWA(x) (uint32_t)((uint32_t)(x) & 0x000FFFFFU)
94 
102 #define HWA_ERRNO_BASE (-2800)
103 
104 #define HWA_EINVAL (HWA_ERRNO_BASE-1)
105 
106 #define HWA_ENOINIT (HWA_ERRNO_BASE-2)
107 
108 #define HWA_EOUTOFRANGE (HWA_ERRNO_BASE-3)
109 
110 #define HWA_EOUTOFMEM (HWA_ERRNO_BASE-4)
111 
112 #define HWA_ENOTSUPP (HWA_ERRNO_BASE-5)
113 
114 #define HWA_EINUSE (HWA_ERRNO_BASE-6)
115 
116 #define HWA_ENOTALIGNED (HWA_ERRNO_BASE-7)
117 
118 #define HWA_EINVAL_COMMON_REGISTER_PARAMSET (HWA_ERRNO_BASE-8)
119 
120 #define HWA_EINVAL_COMMON_REGISTER_PARAMSET_ALT (HWA_ERRNO_BASE-9)
121 
122 #define HWA_EINVAL_COMMON_REGISTER_FFTCONFIG (HWA_ERRNO_BASE-10)
123 
124 #define HWA_EINVAL_COMMON_REGISTER_DCEST (HWA_ERRNO_BASE-11)
125 
126 #define HWA_EINVAL_COMMON_REGISTER_CFAR (HWA_ERRNO_BASE-12)
127 
128 #define HWA_EINVAL_COMMON_REGISTER_INTERFERENCE (HWA_ERRNO_BASE-13)
129 
130 #define HWA_EINVAL_COMMON_REGISTER_COMPLEXMULT (HWA_ERRNO_BASE-14)
131 
132 #define HWA_EINVAL_COMMON_REGISTER_CHANCOMB (HWA_ERRNO_BASE-15)
133 
134 #define HWA_EINVAL_COMMON_REGISTER_ZEROINSERT (HWA_ERRNO_BASE-16)
135 
136 #define HWA_EINVAL_COMMON_REGISTER_ADVSTAT (HWA_ERRNO_BASE-17)
137 
138 #define HWA_EINVAL_COMMON_REGISTER_COMPRESS (HWA_ERRNO_BASE-18)
139 
140 #define HWA_EINVAL_COMMON_REGISTER_LOCALMAXIMUM (HWA_ERRNO_BASE-19)
141 
142 #define HWA_EINVAL_PARAMSET_GENERALCONFIG (HWA_ERRNO_BASE - 20)
143 
144 #define HWA_EINVAL_PARAMSET_SOURCE (HWA_ERRNO_BASE - 21)
145 
146 #define HWA_EINVAL_PARAMSET_DEST (HWA_ERRNO_BASE - 22)
147 
148 #define HWA_EINVAL_PARAMSET_SRCDST_ADDRESS (HWA_ERRNO_BASE - 23)
149 
150 #define HWA_EINVAL_PARAMSET_FFTMODE_GENERALCONFIG (HWA_ERRNO_BASE - 24)
151 
152 #define HWA_EINVAL_PARAMSET_FFTMODE_SIZE (HWA_ERRNO_BASE - 25)
153 
154 #define HWA_EINVAL_PARAMSET_FFTMODE_POSTPROC (HWA_ERRNO_BASE - 26)
155 
156 #define HWA_EINVAL_PARAMSET_FFTMODE_PREPROC (HWA_ERRNO_BASE - 27)
157 
158 #define HWA_EINVAL_PARAMSET_FFTMODE_PREPROC_INTERF (HWA_ERRNO_BASE - 28)
159 
160 #define HWA_EINVAL_PARAMSET_FFTMODE_PREPROC_COMPLEXMULT (HWA_ERRNO_BASE - 29)
161 
162 #define HWA_EINVAL_PARAMSET_CFARMODE_GENERALCONFIG (HWA_ERRNO_BASE - 30)
163 
164 #define HWA_EINVAL_PARAMSET_CFARMODE_OSCONFIG (HWA_ERRNO_BASE - 31)
165 
166 #define HWA_EINVAL_PARAMSET_CFARMODE_CACONFIG (HWA_ERRNO_BASE - 32)
167 
168 #define HWA_EINVAL_PARAMSET_COMPRESSMODE (HWA_ERRNO_BASE - 33)
169 
170 #define HWA_EINVAL_PARAMSET_LOCALMAXMODE (HWA_ERRNO_BASE - 34)
171 
172 #define HWA_PARAMSET_POLLINGNOTALLOWED (HWA_ERRNO_BASE - 35)
173 
176 #define HWA_NUM_RXCHANNELS (12U)
177 
178 #define HWA_NUM_INTERFMITG_WINARRAY (5U)
179 
180 #define HWA_BPMPATTERN_LENGTH_INWORDS (8U)
181 
182 #define HWA_CHANCOMB_LENGTH_INWORDS (8U)
183 
184 #define HWA_ZEROINSERT_LENGTH_INWORDS (8U)
185 
186 #define HWA_NUM_RAMS (3U)
187 
188 #define HWA_MAXNUM_LOOPS (4095U)
189 
190 #define HWA_CMP_K_ARR_LEN (8U)
191 
205 #define HWA_DONE_INTERRUPT_PRIORITY (HwiP_MAX_PRIORITY - 1)
206 
207 #define HWA_PARAMSETDONE_INTERRUPT1_PRIORITY (HwiP_MAX_PRIORITY - 1)
208 
209 #define HWA_PARAMSETDONE_INTERRUPT2_PRIORITY (HwiP_MAX_PRIORITY - 1)
210 
217 #define HWA_FEATURE_BIT_ENABLE ((uint8_t)1U)
218 #define HWA_FEATURE_BIT_DISABLE ((uint8_t)0U)
226 #define HWA_SAMPLES_WIDTH_16BIT ((uint8_t)0U)
227 #define HWA_SAMPLES_WIDTH_32BIT ((uint8_t)1U)
235 #define HWA_SAMPLES_FORMAT_COMPLEX ((uint8_t)0U)
236 #define HWA_SAMPLES_FORMAT_REAL ((uint8_t)1U)
244 #define HWA_SAMPLES_UNSIGNED ((uint8_t)0U)
245 #define HWA_SAMPLES_SIGNED ((uint8_t)1U)
253 #define HWA_FFT_WINDOW_NONSYMMETRIC ((uint8_t)0U)
254 #define HWA_FFT_WINDOW_SYMMETRIC ((uint8_t)1U)
266 #define HWA_FFT_WINDOW_INTERPOLATE_MODE_NONE ((uint8_t)0U)
267 #define HWA_FFT_WINDOW_INTERPOLATE_MODE_4K ((uint8_t)1U)
268 #define HWA_FFT_WINDOW_INTERPOLATE_MODE_2K ((uint8_t)2U)
276 #define HWA_FFT_MODE_MAGNITUDE_LOG2_DISABLED ((uint8_t)0U)
277 #define HWA_FFT_MODE_MAGNITUDE_ONLY_ENABLED ((uint8_t)2U)
278 #define HWA_FFT_MODE_MAGNITUDE_LOG2_ENABLED ((uint8_t)3U)
286 #define HWA_FFT_MODE_OUTPUT_DEFAULT ((uint8_t)0U)
287 #define HWA_FFT_MODE_OUTPUT_MAX_STATS ((uint8_t)2U)
288 #define HWA_FFT_MODE_OUTPUT_SUM_STATS ((uint8_t)3U)
296 #define HWA_NOISE_AVG_MODE_CFAR_CA ((uint8_t)0U)
297 #define HWA_NOISE_AVG_MODE_CFAR_CAGO ((uint8_t)1U)
298 #define HWA_NOISE_AVG_MODE_CFAR_CASO ((uint8_t)2U)
299 #define HWA_NOISE_AVG_MODE_CFAR_OS ((uint8_t)3U)
307 #define HWA_TRIG_MODE_IMMEDIATE ((uint8_t)0U)
308 #define HWA_TRIG_MODE_SOFTWARE ((uint8_t)1U)
309 #define HWA_TRIG_MODE_RESERVED1 ((uint8_t)2U)
310 #define HWA_TRIG_MODE_DMA ((uint8_t)3U)
311 #define HWA_TRIG_MODE_HARDWARE ((uint8_t)4U)
312 #define HWA_TRIG_MODE_RESERVED2 ((uint8_t)5U)
313 #define HWA_TRIG_MODE_RESERVED3 ((uint8_t)6U)
314 #define HWA_TRIG_MODE_M4CONTROL ((uint8_t)7U)
322 #define HWA_ACCELMODE_FFT ((uint8_t)0U)
323 #define HWA_ACCELMODE_CFAR ((uint8_t)1U)
324 #define HWA_ACCELMODE_COMPRESS ((uint8_t)2U)
325 #define HWA_ACCELMODE_NONE ((uint8_t)7U)
345 #define HWA_CFAR_OPER_MODE_LOG_INPUT_REAL 0U
346 #define HWA_CFAR_OPER_MODE_LOG_INPUT_COMPLEX 1U
347 #define HWA_CFAR_OPER_MODE_MAG_INPUT_REAL 2U
348 #define HWA_CFAR_OPER_MODE_MAG_INPUT_COMPLEX 3U
349 #define HWA_CFAR_OPER_MODE_MAG_SQR_INPUT_REAL 4U
350 #define HWA_CFAR_OPER_MODE_MAG_SQR_INPUT_COMPLEX 5U
368 #define HWA_CFAR_OUTPUT_MODE_I_nAVG_ALL_Q_CUT ((uint8_t)0U)
370 #define HWA_CFAR_OUTPUT_MODE_I_nAVG_ALL_Q_DET_FLAG ((uint8_t)1U)
372 #define HWA_CFAR_OUTPUT_MODE_I_PEAK_IDX_Q_NEIGHBOR_NOISE_VAL ((uint8_t)2U)
374 #define HWA_CFAR_OUTPUT_MODE_I_PEAK_IDX_Q_CUT ((uint8_t)3U)
390 #define HWA_CMP_DCMP_COMPRESS ((uint8_t)0U)
391 #define HWA_CMP_DCMP_DECOMPRESS ((uint8_t)1U) /*HWA_COMPRESS_MODE*/
393 
394 
400 #define HWA_CMP_K_ARR_LEN (8U) /*HWA_CMP_MISC_PARAMS*/
402 
413 #define HWA_COMPRESS_METHOD_EGE ((uint8_t)0U)
414 #define HWA_COMPRESS_METHOD_BFP ((uint8_t)1U) /*HWA_CMP_METHOD*/
416 
430 #define HWA_COMPRESS_PATHSELECT_BOTHPASSES ((uint8_t)3U) /*HWA_COMPRESS_PATHSELECT*/
432 
438 #define HWA_RAM_TYPE_WINDOW_RAM ((uint8_t)0U)
439 #define HWA_RAM_TYPE_INTERNAL_RAM ((uint8_t)1U) /*HWA_RAM_TYPE*/
441 
450 #define HWA_INTERFERENCE_ENABLE ((uint8_t)1U)
451 #define HWA_INTERFERENCE_DISABLE ((uint8_t)0U)
452 
464 #define HWA_INTERFERENCE_THRESH_MODE_MAG_OR_MAGDIFF ((uint8_t)0U)
465 #define HWA_INTERFERENCE_THRESH_MODE_MAG ((uint8_t)1U)
466 #define HWA_INTERFERENCE_THRESH_MODE_MAGDIFF ((uint8_t)2U)
467 #define HWA_INTERFERENCE_THRESH_MODE_MAG_AND_MAGDIFF ((uint8_t)3U)
468 
478 #define HWA_INTERFERENCE_THRESH_SELECT_USER_DEFINED ((uint8_t)0U)
479 #define HWA_INTERFERENCE_THRESH_SELECT_BUILTIN_SUM_STATS ((uint8_t)1U)
480 #define HWA_INTERFERENCE_THRESH_SELECT_BUILTIN ((uint8_t)2U)
481 
493 #define HWA_INTERFERENCE_STATS_RESET_HOLD ((uint8_t)0U)
494 #define HWA_INTERFERENCE_STATS_RESET_FREE_RUNNING ((uint8_t)1U)
495 #define HWA_INTERFERENCE_STATS_RESET_PER_CHIRP ((uint8_t)2U)
496 #define HWA_INTERFERENCE_STATS_RESET_PER_FRAME ((uint8_t)3U)
497 
504 #define HWA_ACCUMULATORREG_TYPE_DC ((uint8_t)0U)
505 #define HWA_ACCUMULATORREG_TYPE_INTERF_MAG ((uint8_t)1U)
506 #define HWA_ACCUMULATORREG_TYPE_INTERF_MAGDIFF ((uint8_t)2U)
507 #define HWA_ACCUMULATORREG_TYPE_INTERF ((uint8_t)3U)
515 #define HWA_INTERFERENCE_THRESHOLD_TYPE_MAG ((uint8_t)0U)
516 #define HWA_INTERFERENCE_THRESHOLD_TYPE_MAGDIFF ((uint8_t)1U)
526 #define HWA_PARAMDONE_INTERRUPT_TYPE_CPU ((uint8_t)1U)
527 #define HWA_PARAMDONE_INTERRUPT_TYPE_DMA ((uint8_t)2U)
536 #define HWA_COMMONCONFIG_MASK_NUMLOOPS 0x00000001
537 #define HWA_COMMONCONFIG_MASK_PARAMSTARTIDX 0x00000002
538 #define HWA_COMMONCONFIG_MASK_PARAMSTOPIDX 0x00000004
539 #define HWA_COMMONCONFIG_MASK_FFT1DENABLE 0x00000008
540 #define HWA_COMMONCONFIG_MASK_BPMRATE 0x00000010
541 #define HWA_COMMONCONFIG_MASK_BPMPATTERN 0x00000020
542 #define HWA_COMMONCONFIG_MASK_INTERFERENCETHRESHOLD 0x00000040
543 #define HWA_COMMONCONFIG_MASK_TWIDDITHERENABLE 0x00000080
544 #define HWA_COMMONCONFIG_MASK_LFSRSEED 0x00000100
545 #define HWA_COMMONCONFIG_MASK_FFTSUMDIV 0x00000200
546 #define HWA_COMMONCONFIG_MASK_CFARTHRESHOLDSCALE 0x00000400
547 #define HWA_COMMONCONFIG_MASK_I_CMULT_SCALE 0x00000800
548 #define HWA_COMMONCONFIG_MASK_Q_CMULT_SCALE 0x00001000
549 #define HWA_COMMONCONFIG_MASK_DCEST_SCALESHIFT 0x00002000
550 #define HWA_COMMONCONFIG_MASK_DCSUB_SWVAL 0x00004000
551 #define HWA_COMMONCONFIG_MASK_INTERFMAG_THRESHOLD 0x00008000
552 #define HWA_COMMONCONFIG_MASK_INTERFMAGDIFF_THRESHOLD 0x00010000
553 #define HWA_COMMONCONFIG_MASK_INTERFSUM_MAG 0x00020000
554 #define HWA_COMMONCONFIG_MASK_INTERFSUM_MAGDIFF 0x00040000
555 // #define HWA_COMMONCONFIG_MASK_COMPLEXMULT_SCALEARRAY ((uint64_t)0x00004000U)
558 // #define HWA_COMMONCONFIG_MASK_COMPLEXMULT_SCALECONST ((uint64_t)0x00008000U)
561 // #define HWA_COMMONCONFIG_MASK_INTERF_MITG_WINDOW_PARAM ((uint64_t)0x40000000U)
562 #define HWA_COMMONCONFIG_MASK_EGECOMRESS_KPARAM 0x000080000
570 #define HWA_COMPLEX_MULTIPLY_MODE_DISABLE ((uint8_t)0U)
571 #define HWA_COMPLEX_MULTIPLY_MODE_FREQ_SHIFTER ((uint8_t)1U)
572 #define HWA_COMPLEX_MULTIPLY_MODE_SLOW_DFT ((uint8_t)2U)
573 #define HWA_COMPLEX_MULTIPLY_MODE_FFT_STITCHING ((uint8_t)3U)
574 #define HWA_COMPLEX_MULTIPLY_MODE_MAG_SQUARED ((uint8_t)4U)
575 #define HWA_COMPLEX_MULTIPLY_MODE_SCALAR_MULT ((uint8_t)5U)
576 #define HWA_COMPLEX_MULTIPLY_MODE_VECTOR_MULT ((uint8_t)6U)
577 #define HWA_COMPLEX_MULTIPLY_MODE_VECTOR_MULT_2 ((uint8_t)7U)
586 #define HWA_DCEST_INTERFSUM_RESET_MODE_NOUPDATE ((uint8_t)0U)
587 #define HWA_DCEST_INTERFSUM_RESET_MODE_SOFTWARERESET ((uint8_t)1U)
588 #define HWA_DCEST_INTERFSUM_RESET_MODE_PARAMRESET ((uint8_t)2U)
589 #define HWA_DCEST_INTERFSUM_RESET_MODE_PARAMRESET_ZEROLPCONT ((uint8_t)3U)
597 #define HWA_DCSUB_SELECT_DCSW ((uint8_t)0U)
598 #define HWA_DCSUB_SELECT_DCEST ((uint8_t)1U)
607 #define HWA_FFT_STITCHING_TWID_PATTERN_2K ((uint8_t)0U)
608 #define HWA_FFT_STITCHING_TWID_PATTERN_4K ((uint8_t)1U)
613 /* ========================================================================== */
614 /* Structures and Enums */
615 /* ========================================================================== */
616 
620 typedef void* HWA_Handle;
621 
628 typedef void (*HWA_ParamDone_IntHandlerFuncPTR)(uint32_t paramSet, void * arg);
629 
636 typedef void (*HWA_Done_IntHandlerFuncPTR)(void * arg);
637 
644 typedef struct HWA_Attrs_t {
645  uint32_t instanceNum;
646  volatile uint32_t ctrlBaseAddr;
647  volatile uint32_t paramBaseAddr;
648  volatile uint32_t ramBaseAddr;
649  volatile uint32_t dssBaseAddr;
650  uint32_t numHwaParamSets;
651  uint32_t intNumParamSet;
652  uint32_t intNumDone;
653  uint32_t numDmaChannels;
654  volatile uint32_t accelMemBaseAddr;
655  uint32_t accelMemSize;
659 } HWA_Attrs;
660 
667 typedef struct HWA_RAMAttrs_t
668 {
669  uint32_t ramBaseAddress;
670  uint32_t ramSizeInBytes;
671 } HWA_RAMAttrs;
672 
684 typedef struct HWA_SrcDMAConfig_t {
685  uint32_t srcAddr;
686  uint32_t destAddr;
687  uint16_t aCnt;
688  uint16_t bCnt;
689  uint16_t cCnt;
691 
698 typedef struct HWA_CommonConfig_t {
699  uint32_t configMask;
702  uint16_t numLoops;
705  uint8_t paramStartIdx;
708  uint8_t paramStopIdx;
712  struct {
713  uint8_t fft1DEnable;
719  uint16_t bpmRate;
722  uint32_t bpmPattern[2];
735  uint32_t lfsrSeed;
736  uint8_t fftSumDiv;
739  } fftConfig;
740 
741  struct {
742  uint16_t scale;
748  uint8_t shift;
753  } dcEstimateConfig;
754 
755  struct
756  {
757  int32_t swIVal[HWA_NUM_RXCHANNELS];
762  int32_t swQVal[HWA_NUM_RXCHANNELS];
766  } dcSubtractConfig;
767 
768 
769  struct {
770 
771  uint32_t thresholdMagSw[6U];
777  uint32_t thresholdMagDiffSw[6U];
785  uint8_t sumMagScale;
792  int8_t sumMagShift;
797  uint8_t sumMagDiffScale;
806  } interfConfig;
807 
808 
809  struct {
810 
811  int32_t Iscale[HWA_NUM_RXCHANNELS];
815  int32_t Qscale[HWA_NUM_RXCHANNELS];
827  uint8_t recWindowReset;
830  } complexMultiplyConfig;
831 
832 
833  struct {
840  } cfarConfig;
841 
842  struct {
843  uint32_t i_cmult_scale[6U];
846  uint32_t q_cmult_scale[6U];
849  } scalarMult;
850 
851  struct {
852  uint8_t EGEKparam[HWA_CMP_K_ARR_LEN];
854  } compressMode;
855 
857 
864 typedef struct HWA_SourceConfig_t {
865  uint16_t srcAddr;
870  uint16_t srcAcnt;
874  int16_t srcAIdx;
877  uint16_t srcBcnt;
879  int16_t srcBIdx;
883  uint16_t srcShift;
890  uint8_t srcRealComplex;
893  uint8_t srcWidth;
896  uint8_t srcSign;
902  uint8_t srcConjugate;
910  uint8_t srcScale;
919  uint8_t bpmEnable;
924  uint8_t bpmPhase;
928 
935 typedef struct HWA_DestConfig_t {
936  uint16_t dstAddr;
941  uint16_t dstAcnt;
945  int16_t dstAIdx;
948  int16_t dstBIdx;
952  uint8_t dstRealComplex;
955  uint8_t dstWidth;
958  uint8_t dstSign;
964  uint8_t dstConjugate;
972  uint8_t dstScale;
978  uint16_t dstSkipInit;
983 
990 typedef struct HWA_AccelModeFFT_t{
991  uint8_t fftEn;
996  uint8_t fftSize;
1000  uint16_t butterflyScaling;
1011  uint8_t windowEn;
1014  uint16_t windowStart;
1019  uint8_t winSymm;
1028  uint8_t magLogEn;
1031  uint8_t fftOutMode;
1038 
1046 typedef struct HWA_AccelModeCompress_t{
1052  uint8_t method;
1056  uint8_t ditherEnable;
1059  uint8_t passSelect;
1062  uint8_t headerEnable;
1068  uint8_t scaleFactorBW;
1072  uint8_t BFPMantissaBW;
1075  uint8_t scaleFactor;
1082 
1089 typedef struct HWA_ComplexMultiply_t {
1090  uint8_t mode;
1093  union {
1094  uint16_t twidIncrement;
1099  struct {
1100  uint16_t startFreq;
1103  uint8_t freqIncrement;
1108  } dft;
1116  }cmpMulArgs;
1118 
1125 typedef struct HWA_PreProcessing_t {
1126 
1127  uint8_t dcEstResetMode;
1132  uint8_t dcSubEnable;
1136  uint8_t dcSubSelect;
1139  struct {
1144  uint8_t thresholdMode;
1153  } interfLocalize;
1154 
1155  struct {
1156  uint8_t resetMode;
1161  } interfStat;
1162 
1163  // struct {
1164 
1165  // uint8_t enable; /**< enable/disable interference mitigation path, see \ref HWA_FEATURE_BIT macros
1166  // for the correct values
1167  // sets the bits INTF_MITG_EN of register PRE_PROCESSING in paramset */
1168 
1169  // uint8_t countThreshold; /**< 5 bits value: the number of non-zero IIB within the hysteresis window
1170  // should exceed the threshold for the CUT to be considered to be affected
1171  // by interference. valid values are from 0 to 31.
1172  // sets the bits INTF_MITG_CNTTHRESH of the register PRE_PROCESSING in paramset */
1173 
1174  // uint8_t pathSelect; /**< see \ref HWA_INTERFMITIGATION_PATH_SELECT macros for the correct values, select
1175  // one of the three paths in the interference mitigation module
1176  // sets the bits INFT_MITG_PATH_SEL of register PRE_PROCESSING in paramset */
1177 
1178  // uint8_t leftHystOrder; /**< 4 bits value: the length of the IIB array considered on the left side of the CUT,
1179  // valid values from 0 to 15.
1180  // sets the bits INTF_MITG_LEFT_HYST_ORD of the register PRE_PROCESSING in paramset */
1181 
1182  // uint8_t rightHystOrder; /**< 4 bits value: he length of the IIB array considered on the right side of the CUT,
1183  // valid values from 0 to 15.
1184  // sets the bits INTF_MITG_RIGHT_HYST_ORD of the register PRE_PROCESSING in paramset */
1185 
1186  // } interfMitigation;
1187 
1188  // uint8_t chanCombEn; /**< enable/disable synthetic channel combining, see \ref HWA_FEATURE_BIT
1189  // macros for the correct values. if set into HWA_FEATURE_BIT_DISABLE to disable
1190  // the channel combining.
1191  // sets the bits CHANCOMB_EN of the register PREPROC in paramset */
1192 
1193  // uint8_t zeroInsertEn; /**< enable/disable zero-insertion, fill the zeros at arbitrary
1194  // locations in the A-dimension, prior to windowing and FFT, only applied to FFTSIZE
1195  // upto 256. see \ref HWA_FEATURE_BIT macros for the correct values
1196  // sets the bits ZEROINSERT_EN of register BFLYFFT in paramset */
1197 
1198  //HWA_ComplexMultiply complexMultiply; /**< Complex multiply related params used when \ref HWA_ParamConfig::accelMode
1199  // is not \ref HWA_ACCELMODE_CFAR */
1201 
1208 typedef struct HWA_AccelModeCFAR_t{
1219  uint8_t numGuardCells;
1221  uint8_t nAvgDivFactor;
1227  uint8_t nAvgMode;
1230  uint8_t operMode;
1232  uint8_t outputMode;
1235  uint8_t peakGroupEn;
1243  uint8_t cyclicModeEn;
1249 
1256 typedef struct HWA_ParamConfig_t {
1257  uint8_t triggerMode;
1259  uint8_t dmaTriggerSrc;
1263  uint8_t accelMode;
1269  union {
1273  }accelModeArgs;
1274 
1279 
1286 typedef struct HWA_InterruptConfig_t {
1293  struct {
1295  void *callbackArg;
1296  } cpu;
1297  struct {
1298  uint8_t dstChannel;
1300  } dma;
1302 
1309 typedef struct HWA_Stats_t {
1310  uint32_t maxValue;
1311  uint16_t maxIndex;
1312  uint8_t iSumMSB;
1313  uint8_t qSumMSB;
1314  uint32_t iSumLSB;
1315  uint32_t qSumLSB;
1316 } HWA_Stats;
1317 
1324 typedef struct HWA_DebugStats_t {
1330  uint16_t currentLoopCount;
1332  uint16_t dmaTrigStatus;
1334  uint8_t swTrigStatus;
1336 
1343 typedef struct HWA_MemInfo_t {
1344  uint32_t baseAddress;
1345  uint16_t bankSize;
1346  uint16_t numBanks;
1347 }HWA_MemInfo;
1348 
1353 typedef struct HWA_InterruptPriority_t {
1354 
1355  uint32_t backgroundDone;
1356  //TO DO: CLEAN uint32_t ALTDone; /**< \brief HWA interrupt priority for the ALT thread done */
1357  uint32_t paramsetDone1;
1358  uint32_t paramsetDone2;
1361 
1366 typedef struct HWA_OpenConfig_t {
1367 
1381 } HWA_OpenConfig;
1382  /* end of HWA_DRIVER_EXTERNAL_DATA_STRUCTURE*/
1384 
1385 /* ========================================================================== */
1386 /* Internal/Private Structure Declarations */
1387 /* ========================================================================== */
1388 
1397 typedef struct HWA_InterruptCtx_t {
1399  void *callbackArg;
1401 
1410 typedef struct HWA_DoneInterruptCtx_t {
1411  bool bIsEnabled;
1413  void *callbackArg;
1415 
1419 typedef struct HWA_Driver_t {
1423  uint32_t instanceNum;
1427  uint32_t refCnt;
1443 
1448 
1453 
1457  //TO DO: CLEAN HwiP_Object hwiHandleParamSetALT;
1458 
1462  //TO DO: CLEAN HwiP_Object hwiHandleDoneALT;
1463 
1464 
1468  HWA_InterruptCtx *interruptCtxParamSet; /*[NUM_HWA_PARAMSETS_PER_INSTANCE];*/
1469 
1474 
1479 } HWA_Object;
1480 
1482 extern HWA_Attrs gHwaAttrs[];
1486 extern HWA_Object gHwaObject[];
1488 extern HWA_Object *gHwaObjectPtr[];
1490 extern uint32_t gHwaConfigNum;
1491 
1492 /* ========================================================================== */
1493 /* Global Variables Declarations */
1494 /* ========================================================================== */
1495 
1496 /* None */
1497 
1498 /* ========================================================================== */
1499 /* Function Declarations */
1500 /* ========================================================================== */
1501 
1512 extern void HWA_init(void);
1513 
1517 extern void HWA_deinit(void);
1518 
1536 extern HWA_Handle HWA_open(uint32_t index, HWA_OpenConfig * hwaCfg, int32_t* errCode);
1537 
1549 extern int32_t HWA_close(HWA_Handle handle);
1550 
1562 extern int32_t HWA_reset(HWA_Handle handle);
1563 
1564 
1577 extern DSSHWACCRegs *HWA_getCommonCtrlAddr(HWA_Handle handle);
1578 
1593 extern DSSHWACCPARAMRegs *HWA_getParamSetAddr(HWA_Handle handle, uint8_t paramsetIdx);
1594 
1609 extern int32_t HWA_configCommon(HWA_Handle handle, HWA_CommonConfig *commonConfig);
1610 
1630 extern int32_t HWA_configParamSet(HWA_Handle handle, uint8_t paramsetIdx, HWA_ParamConfig *paramConfig, HWA_SrcDMAConfig *dmaConfig);
1631 
1654 extern int32_t HWA_getDMAconfig(HWA_Handle handle, uint8_t dmaTriggerSrc, HWA_SrcDMAConfig *dmaConfig);
1669 extern int32_t HWA_getCfarPeakCntRegAddress(HWA_Handle handle, uint32_t *peakCntAddr);
1670 
1671 
1691 extern int32_t HWA_configRam(HWA_Handle handle, uint8_t ramType, uint8_t *data, uint32_t dataSize, uint32_t startIdx);
1692 
1710 extern int32_t HWA_enableParamSetInterrupt(HWA_Handle handle, uint8_t paramsetIdx, HWA_InterruptConfig *intrConfig);
1711 
1712 
1728 extern int32_t HWA_enableDoneInterrupt(HWA_Handle handle, HWA_Done_IntHandlerFuncPTR callbackFn, void * callbackArg);
1729 
1745 extern int32_t HWA_disableParamSetInterrupt(HWA_Handle handle, uint8_t paramsetIdx, uint8_t interruptTypeFlag);
1746 
1758 extern int32_t HWA_disableDoneInterrupt(HWA_Handle handle);
1759 
1774 extern int32_t HWA_enable(HWA_Handle handle, uint8_t flagEnDis);
1775 
1776 
1791 extern int32_t HWA_setSoftwareTrigger(HWA_Handle handle);
1792 
1793 
1807 extern int32_t HWA_setDMA2ACCManualTrig(HWA_Handle handle, uint8_t idx);
1808 
1824 extern int32_t HWA_setSourceAddress(HWA_Handle handle, uint16_t paramIdx, uint32_t sourceAddress);
1825 
1844 extern int32_t HWA_readStatsReg(HWA_Handle handle, HWA_Stats *pStats, uint8_t numIter);
1845 
1863 extern int32_t HWA_readCFARPeakCountReg(HWA_Handle handle, uint8_t *pbuf, uint8_t size);
1864 
1879 extern int32_t HWA_readDebugReg(HWA_Handle handle, HWA_DebugStats *pStats);
1880 
1892 extern int32_t HWA_clearDebugReg(HWA_Handle handle);
1893 
1908 extern int32_t HWA_getHWAMemInfo(HWA_Handle handle, HWA_MemInfo *memInfo);
1909 
1927 extern int32_t HWA_getDMAChanIndex(HWA_Handle handle, uint8_t edmaChanId, uint8_t *hwaDestChan);
1928 
1944 extern int32_t HWA_getEDMAChanId(HWA_Handle handle, uint8_t hwaDMAdestChan);
1945 
1965 extern int32_t HWA_readDCEstimateReg(HWA_Handle handle, cmplx32ImRe_t *pbuf, uint8_t startIdx, uint8_t size);
1966 
1987 extern int32_t HWA_readIntfAccReg(HWA_Handle handle, uint64_t *accBuf, uint8_t type, uint8_t startIdx, uint8_t size);
1988 
2007 extern int32_t HWA_readDCAccReg(HWA_Handle handle, cmplx64ImRe_t *accbuf, uint8_t startIdx, uint8_t size);
2008 
2022 extern int32_t HWA_readInterfChirpCountReg(HWA_Handle handle, uint16_t *numInterfSamplesChirp);
2023 
2037 extern int32_t HWA_readInterfFrameCountReg(HWA_Handle handle, uint32_t *numInterfSamplesFrame);
2038 
2058 extern int32_t HWA_readInterfThreshReg(HWA_Handle handle, uint32_t *pbuf, uint8_t startIdx, uint8_t size, uint8_t type);
2059 
2072 //extern int32_t HWA_controlPeripheralSuspendMode(HWA_Handle handle, uint8_t flagEnDis);
2073  /* end of addgroup HWA_DRIVER_EXTERNAL_FUNCTION*/
2075 
2076 #ifdef __cplusplus
2077 }
2078 #endif
2079 
2080 #endif /* HWA_H_ */
2081 
2082 
HWA_disableDoneInterrupt
int32_t HWA_disableDoneInterrupt(HWA_Handle handle)
Function to disable the CPU interrupt after all programmed paramSets have been completed.
HWA_Object::interrupt1ParamSetMask
uint64_t interrupt1ParamSetMask
interrupt enable mask for background thread
Definition: hwa/v0/hwa.h:1473
HWA_Object::refCnt
uint32_t refCnt
HWA instance reference (open) count.
Definition: hwa/v0/hwa.h:1427
HWA_CommonConfig::sumMagDiffScale
uint8_t sumMagDiffScale
Definition: hwa/v0/hwa.h:797
HWA_SourceConfig
HWA Paramset Config for Input Formatter/Source block.
Definition: hwa/v0/hwa.h:864
HWA_SrcDMAConfig::destAddr
uint32_t destAddr
Definition: hwa/v0/hwa.h:686
HWA_readInterfThreshReg
int32_t HWA_readInterfThreshReg(HWA_Handle handle, uint32_t *pbuf, uint8_t startIdx, uint8_t size, uint8_t type)
Function to read the interference statistics INTF_LOC_THRESH_MAG_VAL or INTF_LOC_THRESH_MAG_VAL regis...
HWA_enable
int32_t HWA_enable(HWA_Handle handle, uint8_t flagEnDis)
Function to enable the state machine of the HWA. This should be called after paramset and RAM have be...
HWA_reset
int32_t HWA_reset(HWA_Handle handle)
Function to reset the internal state machine of the HWA.
HWA_AccelModeCFAR::numNoiseSamplesRight
uint8_t numNoiseSamplesRight
Definition: hwa/v0/hwa.h:1214
HWA_ComplexMultiply::startFreq
uint16_t startFreq
Definition: hwa/v0/hwa.h:1100
HWA_AccelModeCFAR::nAvgDivFactor
uint8_t nAvgDivFactor
Definition: hwa/v0/hwa.h:1221
HWA_Done_IntHandlerFuncPTR
void(* HWA_Done_IntHandlerFuncPTR)(void *arg)
HWA Interrupt callback function after all paramsets completion.
Definition: hwa/v0/hwa.h:636
HWA_AccelModeCFAR::peakGroupEn
uint8_t peakGroupEn
Definition: hwa/v0/hwa.h:1235
HWA_AccelModeFFT
HWA Paramset Config for FFT block.
Definition: hwa/v0/hwa.h:990
HWA_SourceConfig::srcConjugate
uint8_t srcConjugate
Definition: hwa/v0/hwa.h:902
HWA_setDMA2ACCManualTrig
int32_t HWA_setDMA2ACCManualTrig(HWA_Handle handle, uint8_t idx)
Function to manually trigger the execution of the state machine waiting on DMA via software.
HWA_CommonConfig::sumMagDiffShift
int8_t sumMagDiffShift
Definition: hwa/v0/hwa.h:802
HWA_Stats::maxIndex
uint16_t maxIndex
Definition: hwa/v0/hwa.h:1311
HWA_DestConfig::dstSkipInit
uint16_t dstSkipInit
Definition: hwa/v0/hwa.h:978
HWA_clearDebugReg
int32_t HWA_clearDebugReg(HWA_Handle handle)
Function to clear the debug registers (acc_trig_in_clr)
HWA_MemInfo
HWA Local memory Information.
Definition: hwa/v0/hwa.h:1343
HWA_ParamConfig::dmaTriggerSrc
uint8_t dmaTriggerSrc
Definition: hwa/v0/hwa.h:1259
HWA_Stats::iSumLSB
uint32_t iSumLSB
Definition: hwa/v0/hwa.h:1314
gHwaConfigNum
uint32_t gHwaConfigNum
Externally defined driver configuration array size.
HWA_SrcDMAConfig::srcAddr
uint32_t srcAddr
Definition: hwa/v0/hwa.h:685
HWA_open
HWA_Handle HWA_open(uint32_t index, HWA_OpenConfig *hwaCfg, int32_t *errCode)
Function to initialize HWA specified by the particular index value.
HWA_MemInfo::bankSize
uint16_t bankSize
Definition: hwa/v0/hwa.h:1345
HWA_SourceConfig::bpmEnable
uint8_t bpmEnable
Definition: hwa/v0/hwa.h:919
HWA_AccelModeCompress::passSelect
uint8_t passSelect
Definition: hwa/v0/hwa.h:1059
HWA_getDMAChanIndex
int32_t HWA_getDMAChanIndex(HWA_Handle handle, uint8_t edmaChanId, uint8_t *hwaDestChan)
Function to get the dma destination index with a given EDMA channel number This function assumes the ...
HWA_enableParamSetInterrupt
int32_t HWA_enableParamSetInterrupt(HWA_Handle handle, uint8_t paramsetIdx, HWA_InterruptConfig *intrConfig)
Function to enable the CPU and/or DMA interrupt after a paramSet completion. The CPU interrupt for ev...
HWA_enableDoneInterrupt
int32_t HWA_enableDoneInterrupt(HWA_Handle handle, HWA_Done_IntHandlerFuncPTR callbackFn, void *callbackArg)
Function to enable the CPU interrupt after all programmed paramSets have been completed in the backgr...
HWA_CommonConfig::shift
uint8_t shift
Definition: hwa/v0/hwa.h:748
HWA_InterruptPriority::backgroundDone
uint32_t backgroundDone
HWA interrupt priority for the background thread done.
Definition: hwa/v0/hwa.h:1355
HWA_AccelModeCompress::headerEnable
uint8_t headerEnable
Definition: hwa/v0/hwa.h:1062
HWA_ComplexMultiply
HWA Paramset Config for ComplexMultiply block.
Definition: hwa/v0/hwa.h:1089
HWA_ParamConfig::fftMode
HWA_AccelModeFFT fftMode
Definition: hwa/v0/hwa.h:1270
HWA_SourceConfig::srcWidth
uint8_t srcWidth
Definition: hwa/v0/hwa.h:893
HWA_PreProcessing::resetMode
uint8_t resetMode
Definition: hwa/v0/hwa.h:1156
HWA_Attrs::intNumDone
uint32_t intNumDone
Definition: hwa/v0/hwa.h:652
HWA_MemInfo::baseAddress
uint32_t baseAddress
Definition: hwa/v0/hwa.h:1344
HWA_AccelModeCFAR
HWA Paramset Config for CFAR block.
Definition: hwa/v0/hwa.h:1208
HWA_Attrs::numHwaParamSets
uint32_t numHwaParamSets
Definition: hwa/v0/hwa.h:650
HWA_InterruptConfig::dstChannel
uint8_t dstChannel
Definition: hwa/v0/hwa.h:1298
HWA_AccelModeCompress::method
uint8_t method
Definition: hwa/v0/hwa.h:1052
HWA_DestConfig::dstAddr
uint16_t dstAddr
Definition: hwa/v0/hwa.h:936
HWA_CommonConfig::numLoops
uint16_t numLoops
Definition: hwa/v0/hwa.h:702
HWA_DestConfig::dstConjugate
uint8_t dstConjugate
Definition: hwa/v0/hwa.h:964
HWA_InterruptPriority::paramsetDone1
uint32_t paramsetDone1
HWA interrupt priority for paramset done interrupt 1.
Definition: hwa/v0/hwa.h:1357
HWA_ComplexMultiply::freqIncrement
uint8_t freqIncrement
Definition: hwa/v0/hwa.h:1103
HWA_AccelModeCompress::compressDecompress
uint8_t compressDecompress
Definition: hwa/v0/hwa.h:1047
HWA_init
void HWA_init(void)
Function to initialize the HWA module.
gHwaAttrs
HWA_Attrs gHwaAttrs[]
Externally defined driver configuration array.
HWA_Attrs::ctrlBaseAddr
volatile uint32_t ctrlBaseAddr
Definition: hwa/v0/hwa.h:646
HWA_OpenConfig
HWA configuration structure, which describes the configuration information, needed for hwa handle ope...
Definition: hwa/v0/hwa.h:1366
HWA_Attrs::isConcurrentAccessAllowed
bool isConcurrentAccessAllowed
Definition: hwa/v0/hwa.h:656
HWA_InterruptConfig::interruptTypeFlag
uint8_t interruptTypeFlag
Definition: hwa/v0/hwa.h:1287
HWA_SrcDMAConfig::cCnt
uint16_t cCnt
Definition: hwa/v0/hwa.h:689
HWA_OpenConfig::interruptPriority
HWA_InterruptPriority interruptPriority
structure holds the HWA interrupt priorities. This structure is applicable for processors that suppor...
Definition: hwa/v0/hwa.h:1368
HWA_CommonConfig::paramStartIdx
uint8_t paramStartIdx
Definition: hwa/v0/hwa.h:705
HWA_DestConfig::dstWidth
uint8_t dstWidth
Definition: hwa/v0/hwa.h:955
HWA_CommonConfig::twidDitherEnable
uint8_t twidDitherEnable
Definition: hwa/v0/hwa.h:730
HWA_getCfarPeakCntRegAddress
int32_t HWA_getCfarPeakCntRegAddress(HWA_Handle handle, uint32_t *peakCntAddr)
Function to get the address of CFAR Peak Count register.
HWA_DebugStats::dfePingPongStatus
uint8_t dfePingPongStatus
Definition: hwa/v0/hwa.h:1333
HWA_PreProcessing::dcSubEnable
uint8_t dcSubEnable
Definition: hwa/v0/hwa.h:1132
HWA_getDMAconfig
int32_t HWA_getDMAconfig(HWA_Handle handle, uint8_t dmaTriggerSrc, HWA_SrcDMAConfig *dmaConfig)
Function to get the config to program the DMA for a given DMA Trigger channel. Application should use...
HWA_Object::paramSetMapInProgress
uint16_t paramSetMapInProgress
HWA paramset config is in progress [used as bitmap]. Protects Paramset register access in HWA_configP...
Definition: hwa/v0/hwa.h:1438
HWA_PreProcessing::thresholdEnable
uint8_t thresholdEnable
Definition: hwa/v0/hwa.h:1140
HWA_DebugStats
HWA Debug statistics.
Definition: hwa/v0/hwa.h:1324
HWA_readInterfFrameCountReg
int32_t HWA_readInterfFrameCountReg(HWA_Handle handle, uint32_t *numInterfSamplesFrame)
Function to read the number of samples that exceeded the threshold in a frame.
HWA_AccelModeCFAR::numNoiseSamplesLeft
uint8_t numNoiseSamplesLeft
Definition: hwa/v0/hwa.h:1209
HWA_Object::hwiHandleParamSet
HwiP_Object hwiHandleParamSet
Registered Interrupt Handler for each paramset completion.
Definition: hwa/v0/hwa.h:1447
HWA_Stats::qSumMSB
uint8_t qSumMSB
Definition: hwa/v0/hwa.h:1313
HWA_CommonConfig::fft1DEnable
uint8_t fft1DEnable
Definition: hwa/v0/hwa.h:713
HWA_close
int32_t HWA_close(HWA_Handle handle)
Function to close a HWA peripheral specified by the HWA handle.
HWA_ParamConfig::triggerMode
uint8_t triggerMode
Definition: hwa/v0/hwa.h:1257
HWA_CommonConfig::sumMagShift
int8_t sumMagShift
Definition: hwa/v0/hwa.h:792
HWA_DebugStats::currentParamSet
uint8_t currentParamSet
Definition: hwa/v0/hwa.h:1325
HWA_readCFARPeakCountReg
int32_t HWA_readCFARPeakCountReg(HWA_Handle handle, uint8_t *pbuf, uint8_t size)
Function to read the PEAKCNT register.
HWA_AccelModeCFAR::cyclicModeEn
uint8_t cyclicModeEn
Definition: hwa/v0/hwa.h:1243
HWA_DoneInterruptCtx::callbackArg
void * callbackArg
Definition: hwa/v0/hwa.h:1413
HWA_CommonConfig::paramStopIdx
uint8_t paramStopIdx
Definition: hwa/v0/hwa.h:708
HWA_AccelModeCompress::BFPMantissaBW
uint8_t BFPMantissaBW
Definition: hwa/v0/hwa.h:1072
HWA_InterruptConfig::callbackFn
HWA_ParamDone_IntHandlerFuncPTR callbackFn
Definition: hwa/v0/hwa.h:1294
HWA_PreProcessing::dcEstResetMode
uint8_t dcEstResetMode
Definition: hwa/v0/hwa.h:1127
HWA_getParamSetAddr
DSSHWACCPARAMRegs * HWA_getParamSetAddr(HWA_Handle handle, uint8_t paramsetIdx)
Function to returns the HWA paramSet base address.
HWA_readDCAccReg
int32_t HWA_readDCAccReg(HWA_Handle handle, cmplx64ImRe_t *accbuf, uint8_t startIdx, uint8_t size)
Function to read the DC estimation accumulator register,.
HWA_Attrs::accelMemBaseAddr
volatile uint32_t accelMemBaseAddr
Definition: hwa/v0/hwa.h:654
HWA_AccelModeFFT::butterflyScaling
uint16_t butterflyScaling
Definition: hwa/v0/hwa.h:1000
HWA_getEDMAChanId
int32_t HWA_getEDMAChanId(HWA_Handle handle, uint8_t hwaDMAdestChan)
Function to get the edma EDMA channel number from a given HWA paramset destination channel....
HWA_SrcDMAConfig::aCnt
uint16_t aCnt
Definition: hwa/v0/hwa.h:687
HWA_Object::interruptCtxParamSet
HWA_InterruptCtx * interruptCtxParamSet
Registered Interrupt Handler for each paramset completion in the ALT thread.
Definition: hwa/v0/hwa.h:1468
HWA_AccelModeCFAR::nAvgMode
uint8_t nAvgMode
Definition: hwa/v0/hwa.h:1227
HWA_InterruptCtx::callbackFn
HWA_ParamDone_IntHandlerFuncPTR callbackFn
Definition: hwa/v0/hwa.h:1398
HWA_SourceConfig::srcBIdx
int16_t srcBIdx
Definition: hwa/v0/hwa.h:879
HWA_AccelModeFFT::fftEn
uint8_t fftEn
Definition: hwa/v0/hwa.h:991
HWA_DebugStats::dmaTrigStatus
uint16_t dmaTrigStatus
Definition: hwa/v0/hwa.h:1332
HWA_AccelModeCompress::scaleFactor
uint8_t scaleFactor
Definition: hwa/v0/hwa.h:1075
HWA_Object::hwiHandleDone
HwiP_Object hwiHandleDone
Registered Interrupt Handler for interrupt at the end of group of paramsets.
Definition: hwa/v0/hwa.h:1452
HWA_getCommonCtrlAddr
DSSHWACCRegs * HWA_getCommonCtrlAddr(HWA_Handle handle)
Function to returns the HWA common control base address.
HWA_Attrs::ramBaseAddr
volatile uint32_t ramBaseAddr
Definition: hwa/v0/hwa.h:648
HWA_AccelModeCompress::EGEKarrayLength
uint8_t EGEKarrayLength
Definition: hwa/v0/hwa.h:1078
gHwaRamCfg
HWA_RAMAttrs gHwaRamCfg[HWA_NUM_RAMS]
Externally defined driver RAM configuration array.
HWA_ParamConfig::cfarMode
HWA_AccelModeCFAR cfarMode
Definition: hwa/v0/hwa.h:1271
HWA_PreProcessing
HWA Paramset Config for pre-processing block.
Definition: hwa/v0/hwa.h:1125
HWA_RAMAttrs::ramSizeInBytes
uint32_t ramSizeInBytes
Definition: hwa/v0/hwa.h:670
HWA_SourceConfig::srcBcnt
uint16_t srcBcnt
Definition: hwa/v0/hwa.h:877
HWA_PreProcessing::dcSubSelect
uint8_t dcSubSelect
Definition: hwa/v0/hwa.h:1136
HWA_AccelModeCFAR::operMode
uint8_t operMode
Definition: hwa/v0/hwa.h:1230
HWA_AccelModeFFT::interfZeroOutEn
uint8_t interfZeroOutEn
Definition: hwa/v0/hwa.h:1006
HWA_CommonConfig::interferenceThreshold
uint32_t interferenceThreshold
Definition: hwa/v0/hwa.h:725
HWA_CommonConfig::sumMagScale
uint8_t sumMagScale
Definition: hwa/v0/hwa.h:785
HWA_CommonConfig::fftSumDiv
uint8_t fftSumDiv
Definition: hwa/v0/hwa.h:736
HWA_configCommon
int32_t HWA_configCommon(HWA_Handle handle, HWA_CommonConfig *commonConfig)
Function to set the common HWA configuration parameters needed for the next operations/iterations/par...
HwiP.h
HWA_NUM_RXCHANNELS
#define HWA_NUM_RXCHANNELS
Number of RX channels in pre-processing block.
Definition: hwa/v0/hwa.h:176
HWA_CommonConfig::configMask
uint32_t configMask
Definition: hwa/v0/hwa.h:699
HWA_DebugStats::swTrigStatus
uint8_t swTrigStatus
Definition: hwa/v0/hwa.h:1334
HWA_Attrs::numDmaChannels
uint32_t numDmaChannels
Definition: hwa/v0/hwa.h:653
HWA_getHWAMemInfo
int32_t HWA_getHWAMemInfo(HWA_Handle handle, HWA_MemInfo *memInfo)
Function to get HWA processing Memory information including address, size and number of banks.
gHwaObject
HWA_Object gHwaObject[]
Externally defined driver object.
HWA_configRam
int32_t HWA_configRam(HWA_Handle handle, uint8_t ramType, uint8_t *data, uint32_t dataSize, uint32_t startIdx)
Function to set the HWA RAM : HWA_RAM_TYPE_WINDOW_RAM, HWA_RAM_TYPE_VECTORMULTIPLY_RAM,...
HWA_AccelModeFFT::winSymm
uint8_t winSymm
Definition: hwa/v0/hwa.h:1019
HWA_SourceConfig::srcSign
uint8_t srcSign
Definition: hwa/v0/hwa.h:896
HWA_InterruptPriority
HWA interrupt priority for HWA background thread done, ALT thread done, paramset done interrupt 1 and...
Definition: hwa/v0/hwa.h:1353
HWA_SourceConfig::srcScale
uint8_t srcScale
Definition: hwa/v0/hwa.h:910
HWA_ParamDone_IntHandlerFuncPTR
void(* HWA_ParamDone_IntHandlerFuncPTR)(uint32_t paramSet, void *arg)
HWA Interrupt callback function after every paramset completion.
Definition: hwa/v0/hwa.h:628
HWA_ParamConfig::compressMode
HWA_AccelModeCompress compressMode
Definition: hwa/v0/hwa.h:1272
HWA_AccelModeFFT::magLogEn
uint8_t magLogEn
Definition: hwa/v0/hwa.h:1028
HWA_Attrs::accelMemSize
uint32_t accelMemSize
Definition: hwa/v0/hwa.h:655
HWA_configParamSet
int32_t HWA_configParamSet(HWA_Handle handle, uint8_t paramsetIdx, HWA_ParamConfig *paramConfig, HWA_SrcDMAConfig *dmaConfig)
Function to set the HWA configuration parameters for a given paramSet.
HWA_SourceConfig::srcRealComplex
uint8_t srcRealComplex
Definition: hwa/v0/hwa.h:890
HWA_AccelModeCFAR::numGuardCells
uint8_t numGuardCells
Definition: hwa/v0/hwa.h:1219
HWA_InterruptConfig
HWA Interrupt Config.
Definition: hwa/v0/hwa.h:1286
HWA_ComplexMultiply::twidIncrement
uint16_t twidIncrement
Definition: hwa/v0/hwa.h:1094
HWA_Stats::iSumMSB
uint8_t iSumMSB
Definition: hwa/v0/hwa.h:1312
HWA_SrcDMAConfig
Source trigger DMA parameters.
Definition: hwa/v0/hwa.h:684
HWA_ComplexMultiply::mode
uint8_t mode
Definition: hwa/v0/hwa.h:1090
HWA_RAMAttrs::ramBaseAddress
uint32_t ramBaseAddress
Definition: hwa/v0/hwa.h:669
HWA_DoneInterruptCtx
HWA Interrupt context structure for done interrupt.
Definition: hwa/v0/hwa.h:1410
HWA_AccelModeFFT::fftOutMode
uint8_t fftOutMode
Definition: hwa/v0/hwa.h:1031
HWA_Attrs::paramBaseAddr
volatile uint32_t paramBaseAddr
Definition: hwa/v0/hwa.h:647
HWA_AccelModeFFT::windowStart
uint16_t windowStart
Definition: hwa/v0/hwa.h:1014
HWA_CommonConfig
HWA Common Config.
Definition: hwa/v0/hwa.h:698
HWA_ParamConfig::dest
HWA_DestConfig dest
Definition: hwa/v0/hwa.h:1268
HWA_Attrs::dssBaseAddr
volatile uint32_t dssBaseAddr
Definition: hwa/v0/hwa.h:649
HWA_InterruptCtx::callbackArg
void * callbackArg
Definition: hwa/v0/hwa.h:1399
HWA_DestConfig::dstSign
uint8_t dstSign
Definition: hwa/v0/hwa.h:958
HWA_CommonConfig::twiddleDeltaFrac
int16_t twiddleDeltaFrac
Definition: hwa/v0/hwa.h:819
HWA_CMP_K_ARR_LEN
#define HWA_CMP_K_ARR_LEN
The length of EGE compression/decompression K-paramseters array.
Definition: hwa/v0/hwa.h:400
HWA_disableParamSetInterrupt
int32_t HWA_disableParamSetInterrupt(HWA_Handle handle, uint8_t paramsetIdx, uint8_t interruptTypeFlag)
Function to disable the CPU and/or DMA interrupt after a paramSet completion.
HWA_Object::configInProgress
uint8_t configInProgress
HWA instance config is in progress. Protects Common register acccess in HWA_configCommon() and HWA_co...
Definition: hwa/v0/hwa.h:1432
HWA_CommonConfig::bpmRate
uint16_t bpmRate
Definition: hwa/v0/hwa.h:719
HWA_CommonConfig::cfarThresholdScale
uint32_t cfarThresholdScale
Definition: hwa/v0/hwa.h:834
HwiP_Object
Opaque Hwi object used with the Hwi APIs.
Definition: HwiP.h:91
HWA_CommonConfig::recWindowReset
uint8_t recWindowReset
Definition: hwa/v0/hwa.h:827
HWA_PreProcessing::thresholdSelect
uint8_t thresholdSelect
Definition: hwa/v0/hwa.h:1148
HWA_AccelModeFFT::winInterpolateMode
uint8_t winInterpolateMode
Definition: hwa/v0/hwa.h:1022
HWA_SourceConfig::srcShift
uint16_t srcShift
Definition: hwa/v0/hwa.h:883
HWA_DestConfig::dstAIdx
int16_t dstAIdx
Definition: hwa/v0/hwa.h:945
HWA_ParamConfig::preProcCfg
HWA_PreProcessing preProcCfg
Definition: hwa/v0/hwa.h:1277
HWA_ParamConfig
HWA Paramset Config.
Definition: hwa/v0/hwa.h:1256
HWA_InterruptPriority::paramsetDone2
uint32_t paramsetDone2
HWA interrupt priority for paramset done interrupt 2.
Definition: hwa/v0/hwa.h:1358
HWA_SourceConfig::srcAcnt
uint16_t srcAcnt
Definition: hwa/v0/hwa.h:870
HWA_readDCEstimateReg
int32_t HWA_readDCEstimateReg(HWA_Handle handle, cmplx32ImRe_t *pbuf, uint8_t startIdx, uint8_t size)
Function to read the DC_EST_I/Q register.
HWA_AccelModeCompress
HWA Paramset Config for Compression/Decompression block.
Definition: hwa/v0/hwa.h:1046
HWA_AccelModeCFAR::outputMode
uint8_t outputMode
Definition: hwa/v0/hwa.h:1232
HWA_InterruptConfig::callbackArg
void * callbackArg
Definition: hwa/v0/hwa.h:1295
HWA_ParamConfig::source
HWA_SourceConfig source
Definition: hwa/v0/hwa.h:1267
HWA_NUM_RAMS
#define HWA_NUM_RAMS
The number of RAM types in HWA.
Definition: hwa/v0/hwa.h:186
HWA_AccelModeCompress::ditherEnable
uint8_t ditherEnable
Definition: hwa/v0/hwa.h:1056
HWA_Object::interruptCtxDone
HWA_DoneInterruptCtx interruptCtxDone
interrupt context for all paramset done interrupt
Definition: hwa/v0/hwa.h:1478
HWA_DoneInterruptCtx::bIsEnabled
bool bIsEnabled
Definition: hwa/v0/hwa.h:1411
HWA_PreProcessing::thresholdMode
uint8_t thresholdMode
Definition: hwa/v0/hwa.h:1144
HWA_DestConfig::dstScale
uint8_t dstScale
Definition: hwa/v0/hwa.h:972
HWA_InterruptCtx
HWA Interrupt context structure for paramset done interrupt.
Definition: hwa/v0/hwa.h:1397
HWA_ComplexMultiply::twidFactorPattern
uint8_t twidFactorPattern
Definition: hwa/v0/hwa.h:1109
HWA_DestConfig::dstRealComplex
uint8_t dstRealComplex
Definition: hwa/v0/hwa.h:952
HWA_setSoftwareTrigger
int32_t HWA_setSoftwareTrigger(HWA_Handle handle)
Function to manually trigger the execution of the state machine via software, the software trigger th...
HWA_Attrs::intNumParamSet
uint32_t intNumParamSet
Definition: hwa/v0/hwa.h:651
HWA_Object::hwAttrs
HWA_Attrs const * hwAttrs
HWA Hardware related params.
Definition: hwa/v0/hwa.h:1442
HWA_AccelModeCompress::scaleFactorBW
uint8_t scaleFactorBW
Definition: hwa/v0/hwa.h:1068
HWA_SrcDMAConfig::bCnt
uint16_t bCnt
Definition: hwa/v0/hwa.h:688
HWA_ParamConfig::complexMultiply
HWA_ComplexMultiply complexMultiply
Definition: hwa/v0/hwa.h:1275
HWA_RAMAttrs
HWA RAM Parameters.
Definition: hwa/v0/hwa.h:668
HWA_readDebugReg
int32_t HWA_readDebugReg(HWA_Handle handle, HWA_DebugStats *pStats)
Function to read the debug registers (paramcurr, loopcou, acc_trig_in_stat)
HWA_CommonConfig::scale
uint16_t scale
Definition: hwa/v0/hwa.h:742
HWA_Attrs::instanceNum
uint32_t instanceNum
Definition: hwa/v0/hwa.h:645
HWA_DestConfig
HWA Paramset Config for Output Formatter/Destination block.
Definition: hwa/v0/hwa.h:935
HWA_Attrs::isCompressionEnginePresent
bool isCompressionEnginePresent
Definition: hwa/v0/hwa.h:658
HWA_readInterfChirpCountReg
int32_t HWA_readInterfChirpCountReg(HWA_Handle handle, uint16_t *numInterfSamplesChirp)
Function to read the number of samples that exceeded the threshold in a chirp.
HWA_Handle
void * HWA_Handle
A handle that is returned from a HWA_open() call.
Definition: hwa/v0/hwa.h:620
HWA_Object::instanceNum
uint32_t instanceNum
HWA instance number.
Definition: hwa/v0/hwa.h:1423
HWA_DoneInterruptCtx::callbackFn
HWA_Done_IntHandlerFuncPTR callbackFn
Definition: hwa/v0/hwa.h:1412
HWA_MemInfo::numBanks
uint16_t numBanks
Definition: hwa/v0/hwa.h:1346
HWA_SourceConfig::srcAddr
uint16_t srcAddr
Definition: hwa/v0/hwa.h:865
HWA_Stats
HWA Statistics from the STATISTICS block.
Definition: hwa/v0/hwa.h:1309
HWA_setSourceAddress
int32_t HWA_setSourceAddress(HWA_Handle handle, uint16_t paramIdx, uint32_t sourceAddress)
Function to set the source address for one paramset.
HWA_deinit
void HWA_deinit(void)
Function to deinitialize the HWA module.
HWA_SourceConfig::srcAIdx
int16_t srcAIdx
Definition: hwa/v0/hwa.h:874
HWA_readStatsReg
int32_t HWA_readStatsReg(HWA_Handle handle, HWA_Stats *pStats, uint8_t numIter)
Function to read the 4 sets of 'MAX' statistics register.
HWA_CommonConfig::lfsrSeed
uint32_t lfsrSeed
Definition: hwa/v0/hwa.h:735
HWA_DestConfig::dstBIdx
int16_t dstBIdx
Definition: hwa/v0/hwa.h:948
HWA_DestConfig::dstAcnt
uint16_t dstAcnt
Definition: hwa/v0/hwa.h:941
HWA_Stats::maxValue
uint32_t maxValue
Definition: hwa/v0/hwa.h:1310
HWA_SourceConfig::bpmPhase
uint8_t bpmPhase
Definition: hwa/v0/hwa.h:924
HWA_AccelModeFFT::fftSize
uint8_t fftSize
Definition: hwa/v0/hwa.h:996
HWA_ParamConfig::accelMode
uint8_t accelMode
Definition: hwa/v0/hwa.h:1263
HWA_Stats::qSumLSB
uint32_t qSumLSB
Definition: hwa/v0/hwa.h:1315
HWA_AccelModeFFT::windowEn
uint8_t windowEn
Definition: hwa/v0/hwa.h:1011
HWA_Object
HWA driver internal Config.
Definition: hwa/v0/hwa.h:1419
HWA_DebugStats::currentLoopCount
uint16_t currentLoopCount
Definition: hwa/v0/hwa.h:1330
HWA_Attrs
HWA H/W Parameters.
Definition: hwa/v0/hwa.h:644
HWA_readIntfAccReg
int32_t HWA_readIntfAccReg(HWA_Handle handle, uint64_t *accBuf, uint8_t type, uint8_t startIdx, uint8_t size)
Function to read the interference threshold MAG or MAGDIFF Accumulator register.
gHwaObjectPtr
HWA_Object * gHwaObjectPtr[]
Externally defined driver object pointer.
HWA_SourceConfig::srcCircShiftWrap
uint8_t srcCircShiftWrap
Definition: hwa/v0/hwa.h:887