hwa/v0/hwa.h

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/*
 *  Copyright (C) 2021 Texas Instruments Incorporated
 *
 *  Redistribution and use in source and binary forms, with or without
 *  modification, are permitted provided that the following conditions
 *  are met:
 *
 *    Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *
 *    Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the
 *    distribution.
 *
 *    Neither the name of Texas Instruments Incorporated nor the names of
 *    its contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 */
 
#ifndef HWA_H_
#define HWA_H_
 
/* ========================================================================== */
/*                             Include Files                                  */
/* ========================================================================== */
 
#include <stdint.h>
#include <stddef.h>
#include <stdbool.h>
#include <drivers/hw_include/csl_complex_math_types.h>
#include <kernel/dpl/HwiP.h>
#include <drivers/hw_include/cslr_hwa.h>
 
#ifdef __cplusplus
extern "C" {
#endif
 
/* ========================================================================== */
/*                             Macros & Typedefs                              */
/* ========================================================================== */
 
#define HWA_RAM_WINDOW_SIZE_IN_BYTES                     1024*4     
#define HWADRV_ADDR_TRANSLATE_CPU_TO_HWA(x)  (uint32_t)((uint32_t)(x) & 0x000FFFFFU)
 
#define HWA_ERRNO_BASE                                  (-2800)
 
#define HWA_EINVAL                                      (HWA_ERRNO_BASE-1)
 
#define HWA_ENOINIT                                     (HWA_ERRNO_BASE-2)
 
#define HWA_EOUTOFRANGE                                 (HWA_ERRNO_BASE-3)
 
#define HWA_EOUTOFMEM                                   (HWA_ERRNO_BASE-4)
 
#define HWA_ENOTSUPP                                    (HWA_ERRNO_BASE-5)
 
#define HWA_EINUSE                                      (HWA_ERRNO_BASE-6)
 
#define HWA_ENOTALIGNED                                 (HWA_ERRNO_BASE-7)
 
#define HWA_EINVAL_COMMON_REGISTER_PARAMSET             (HWA_ERRNO_BASE-8)
 
#define HWA_EINVAL_COMMON_REGISTER_PARAMSET_ALT         (HWA_ERRNO_BASE-9)
 
#define HWA_EINVAL_COMMON_REGISTER_FFTCONFIG            (HWA_ERRNO_BASE-10)
 
#define HWA_EINVAL_COMMON_REGISTER_DCEST                (HWA_ERRNO_BASE-11)
 
#define HWA_EINVAL_COMMON_REGISTER_CFAR                 (HWA_ERRNO_BASE-12)
 
#define HWA_EINVAL_COMMON_REGISTER_INTERFERENCE         (HWA_ERRNO_BASE-13)
 
#define HWA_EINVAL_COMMON_REGISTER_COMPLEXMULT          (HWA_ERRNO_BASE-14)
 
#define HWA_EINVAL_COMMON_REGISTER_CHANCOMB             (HWA_ERRNO_BASE-15)
 
#define HWA_EINVAL_COMMON_REGISTER_ZEROINSERT           (HWA_ERRNO_BASE-16)
 
#define HWA_EINVAL_COMMON_REGISTER_ADVSTAT              (HWA_ERRNO_BASE-17)
 
#define HWA_EINVAL_COMMON_REGISTER_COMPRESS             (HWA_ERRNO_BASE-18)
 
#define HWA_EINVAL_COMMON_REGISTER_LOCALMAXIMUM         (HWA_ERRNO_BASE-19)
 
#define HWA_EINVAL_PARAMSET_GENERALCONFIG               (HWA_ERRNO_BASE - 20)
 
#define HWA_EINVAL_PARAMSET_SOURCE                      (HWA_ERRNO_BASE - 21)
 
#define HWA_EINVAL_PARAMSET_DEST                        (HWA_ERRNO_BASE - 22)
 
#define HWA_EINVAL_PARAMSET_SRCDST_ADDRESS              (HWA_ERRNO_BASE - 23)
 
#define HWA_EINVAL_PARAMSET_FFTMODE_GENERALCONFIG       (HWA_ERRNO_BASE - 24)
 
#define HWA_EINVAL_PARAMSET_FFTMODE_SIZE                (HWA_ERRNO_BASE - 25)
 
#define HWA_EINVAL_PARAMSET_FFTMODE_POSTPROC            (HWA_ERRNO_BASE - 26)
 
#define HWA_EINVAL_PARAMSET_FFTMODE_PREPROC             (HWA_ERRNO_BASE - 27)
 
#define HWA_EINVAL_PARAMSET_FFTMODE_PREPROC_INTERF      (HWA_ERRNO_BASE - 28)
 
#define HWA_EINVAL_PARAMSET_FFTMODE_PREPROC_COMPLEXMULT (HWA_ERRNO_BASE - 29)
 
#define HWA_EINVAL_PARAMSET_CFARMODE_GENERALCONFIG      (HWA_ERRNO_BASE - 30)
 
#define HWA_EINVAL_PARAMSET_CFARMODE_OSCONFIG           (HWA_ERRNO_BASE - 31)
 
#define HWA_EINVAL_PARAMSET_CFARMODE_CACONFIG           (HWA_ERRNO_BASE - 32)
 
#define HWA_EINVAL_PARAMSET_COMPRESSMODE                (HWA_ERRNO_BASE - 33)
 
#define HWA_EINVAL_PARAMSET_LOCALMAXMODE                (HWA_ERRNO_BASE - 34)
 
#define HWA_PARAMSET_POLLINGNOTALLOWED                  (HWA_ERRNO_BASE - 35)
 
#define HWA_NUM_RXCHANNELS              (12U)
 
#define HWA_NUM_INTERFMITG_WINARRAY     (5U)
 
#define HWA_BPMPATTERN_LENGTH_INWORDS   (8U)
 
#define HWA_CHANCOMB_LENGTH_INWORDS     (8U)
 
#define HWA_ZEROINSERT_LENGTH_INWORDS   (8U)
 
#define HWA_NUM_RAMS                    (3U)
 
#define HWA_MAXNUM_LOOPS                (4095U)
 
#define HWA_CMP_K_ARR_LEN               (8U)
 
#define HWA_DONE_INTERRUPT_PRIORITY             (1U)
 
//TO DO: CLEAN #define HWA_ALTDONE_INTERRUPT_PRIORITY          (1U)
#define HWA_PARAMSETDONE_INTERRUPT1_PRIORITY    (1U)
 
#define HWA_PARAMSETDONE_INTERRUPT2_PRIORITY    (1U)
 
#define HWA_FEATURE_BIT_ENABLE          ((uint8_t)1U)       
#define HWA_FEATURE_BIT_DISABLE         ((uint8_t)0U)       
#define HWA_SAMPLES_WIDTH_16BIT         ((uint8_t)0U)      
#define HWA_SAMPLES_WIDTH_32BIT         ((uint8_t)1U)      
#define HWA_SAMPLES_FORMAT_COMPLEX      ((uint8_t)0U)      
#define HWA_SAMPLES_FORMAT_REAL         ((uint8_t)1U)      
#define HWA_SAMPLES_UNSIGNED            ((uint8_t)0U)      
#define HWA_SAMPLES_SIGNED              ((uint8_t)1U)      
#define HWA_FFT_WINDOW_NONSYMMETRIC     ((uint8_t)0U)      
#define HWA_FFT_WINDOW_SYMMETRIC        ((uint8_t)1U)      
#define HWA_FFT_WINDOW_INTERPOLATE_MODE_NONE    ((uint8_t)0U)      
#define HWA_FFT_WINDOW_INTERPOLATE_MODE_4K      ((uint8_t)1U)      
#define HWA_FFT_WINDOW_INTERPOLATE_MODE_2K      ((uint8_t)2U)      
#define HWA_FFT_MODE_MAGNITUDE_LOG2_DISABLED        ((uint8_t)0U)        
#define HWA_FFT_MODE_MAGNITUDE_ONLY_ENABLED         ((uint8_t)2U)        
#define HWA_FFT_MODE_MAGNITUDE_LOG2_ENABLED         ((uint8_t)3U)        
#define HWA_FFT_MODE_OUTPUT_DEFAULT                 ((uint8_t)0U)    
#define HWA_FFT_MODE_OUTPUT_MAX_STATS               ((uint8_t)2U)    
#define HWA_FFT_MODE_OUTPUT_SUM_STATS               ((uint8_t)3U)    
#define HWA_NOISE_AVG_MODE_CFAR_CA                  ((uint8_t)0U)      
#define HWA_NOISE_AVG_MODE_CFAR_CAGO                ((uint8_t)1U)      
#define HWA_NOISE_AVG_MODE_CFAR_CASO                ((uint8_t)2U)      
#define HWA_NOISE_AVG_MODE_CFAR_OS                  ((uint8_t)3U)      
#define HWA_TRIG_MODE_IMMEDIATE                     ((uint8_t)0U)      
#define HWA_TRIG_MODE_SOFTWARE                      ((uint8_t)1U)      
#define HWA_TRIG_MODE_RESERVED1                     ((uint8_t)2U)      
#define HWA_TRIG_MODE_DMA                           ((uint8_t)3U)      
#define HWA_TRIG_MODE_HARDWARE                      ((uint8_t)4U)      
#define HWA_TRIG_MODE_RESERVED2                     ((uint8_t)5U)      
#define HWA_TRIG_MODE_RESERVED3                     ((uint8_t)6U)      
#define HWA_TRIG_MODE_M4CONTROL                     ((uint8_t)7U)      
#define HWA_ACCELMODE_FFT                           ((uint8_t)0U)      
#define HWA_ACCELMODE_CFAR                          ((uint8_t)1U)      
#define HWA_ACCELMODE_COMPRESS                      ((uint8_t)2U)      
#define HWA_ACCELMODE_NONE                          ((uint8_t)7U)      
#define HWA_CFAR_OPER_MODE_LOG_INPUT_REAL           0U     
#define HWA_CFAR_OPER_MODE_LOG_INPUT_COMPLEX        1U     
#define HWA_CFAR_OPER_MODE_MAG_INPUT_REAL           2U     
#define HWA_CFAR_OPER_MODE_MAG_INPUT_COMPLEX        3U     
#define HWA_CFAR_OPER_MODE_MAG_SQR_INPUT_REAL       4U     
#define HWA_CFAR_OPER_MODE_MAG_SQR_INPUT_COMPLEX    5U     
#define HWA_CFAR_OUTPUT_MODE_I_nAVG_ALL_Q_CUT                   ((uint8_t)0U)     
#define HWA_CFAR_OUTPUT_MODE_I_nAVG_ALL_Q_DET_FLAG              ((uint8_t)1U)     
#define HWA_CFAR_OUTPUT_MODE_I_PEAK_IDX_Q_NEIGHBOR_NOISE_VAL    ((uint8_t)2U)     
#define HWA_CFAR_OUTPUT_MODE_I_PEAK_IDX_Q_CUT                   ((uint8_t)3U)     
#define HWA_CMP_DCMP_COMPRESS                ((uint8_t)0U)     
#define HWA_CMP_DCMP_DECOMPRESS               ((uint8_t)1U)      /*HWA_COMPRESS_MODE*/
 
 
#define HWA_CMP_K_ARR_LEN                   (8U) /*HWA_CMP_MISC_PARAMS*/
 
#define HWA_COMPRESS_METHOD_EGE                  ((uint8_t)0U)      /*HWA_CMP_METHOD*/
 
#define HWA_COMPRESS_PATHSELECT_BOTHPASSES   ((uint8_t)3U)      /*HWA_COMPRESS_PATHSELECT*/
 
#define HWA_RAM_TYPE_WINDOW_RAM             ((uint8_t)0U)         
#define HWA_RAM_TYPE_INTERNAL_RAM           ((uint8_t)1U)          /*HWA_RAM_TYPE*/
 
 
#define HWA_ACCUMULATORREG_TYPE_DC                      ((uint8_t)0U)         
#define HWA_ACCUMULATORREG_TYPE_INTERF_MAG              ((uint8_t)1U)         
#define HWA_ACCUMULATORREG_TYPE_INTERF_MAGDIFF          ((uint8_t)2U)         
#define HWA_ACCUMULATORREG_TYPE_INTERF                  ((uint8_t)3U)          
#define HWA_INTERFERENCE_THRESHOLD_TYPE_MAG             ((uint8_t)0U)         
#define HWA_INTERFERENCE_THRESHOLD_TYPE_MAGDIFF         ((uint8_t)1U)         
#define HWA_PARAMDONE_INTERRUPT_TYPE_CPU              ((uint8_t)1U)   
#define HWA_PARAMDONE_INTERRUPT_TYPE_DMA              ((uint8_t)2U)   
#define HWA_COMMONCONFIG_MASK_NUMLOOPS              0x00000001      
#define HWA_COMMONCONFIG_MASK_PARAMSTARTIDX         0x00000002      
#define HWA_COMMONCONFIG_MASK_PARAMSTOPIDX          0x00000004      
#define HWA_COMMONCONFIG_MASK_FFT1DENABLE           0x00000008      
#define HWA_COMMONCONFIG_MASK_BPMRATE               0x00000010      
#define HWA_COMMONCONFIG_MASK_BPMPATTERN            0x00000020      
#define HWA_COMMONCONFIG_MASK_INTERFERENCETHRESHOLD 0x00000040      
#define HWA_COMMONCONFIG_MASK_TWIDDITHERENABLE      0x00000080      
#define HWA_COMMONCONFIG_MASK_LFSRSEED              0x00000100      
#define HWA_COMMONCONFIG_MASK_FFTSUMDIV             0x00000200      
#define HWA_COMMONCONFIG_MASK_CFARTHRESHOLDSCALE    0x00000400      
#define HWA_COMMONCONFIG_MASK_I_CMULT_SCALE         0x00001000      
#define HWA_COMMONCONFIG_MASK_Q_CMULT_SCALE         0x00002000      
#define HWA_COMMONCONFIG_MASK_DCEST_SCALESHIFT      0x00004000      
#define HWA_COMMONCONFIG_MASK_DCSUB_SWVAL           0x00008000      
// #define HWA_COMMONCONFIG_MASK_INTERFMAG_THRESHOLD      ((uint64_t)0x00000400U)      
// #define HWA_COMMONCONFIG_MASK_INTERFMAGDIFF_THRESHOLD  ((uint64_t)0x00000800U)      
// #define HWA_COMMONCONFIG_MASK_INTERFSUM_MAG            ((uint64_t)0x00001000U)      
// #define HWA_COMMONCONFIG_MASK_INTERFSUM_MAGDIFF        ((uint64_t)0x00002000U)      
// #define HWA_COMMONCONFIG_MASK_COMPLEXMULT_SCALEARRAY   ((uint64_t)0x00004000U)      
// #define HWA_COMMONCONFIG_MASK_COMPLEXMULT_SCALECONST   ((uint64_t)0x00008000U)      
// #define HWA_COMMONCONFIG_MASK_INTERF_MITG_WINDOW_PARAM  ((uint64_t)0x40000000U)      
#define HWA_COMMONCONFIG_MASK_EGECOMRESS_KPARAM       0x00004000      
#define HWA_COMPLEX_MULTIPLY_MODE_DISABLE                   ((uint8_t)0U)    
#define HWA_COMPLEX_MULTIPLY_MODE_FREQ_SHIFTER              ((uint8_t)1U)    
#define HWA_COMPLEX_MULTIPLY_MODE_SLOW_DFT                  ((uint8_t)2U)    
#define HWA_COMPLEX_MULTIPLY_MODE_FFT_STITCHING             ((uint8_t)3U)    
#define HWA_COMPLEX_MULTIPLY_MODE_MAG_SQUARED               ((uint8_t)4U)    
#define HWA_COMPLEX_MULTIPLY_MODE_SCALAR_MULT               ((uint8_t)5U)    
#define HWA_COMPLEX_MULTIPLY_MODE_VECTOR_MULT               ((uint8_t)6U)    
#define HWA_COMPLEX_MULTIPLY_MODE_VECTOR_MULT_2             ((uint8_t)7U)    
#define HWA_DCEST_INTERFSUM_RESET_MODE_NOUPDATE                     ((uint8_t)0U)     
#define HWA_DCEST_INTERFSUM_RESET_MODE_SOFTWARERESET                ((uint8_t)1U)     
#define HWA_DCEST_INTERFSUM_RESET_MODE_PARAMRESET                   ((uint8_t)2U)     
#define HWA_DCEST_INTERFSUM_RESET_MODE_PARAMRESET_ZEROLPCONT        ((uint8_t)3U)     
#define HWA_DCSUB_SELECT_DCSW                    ((uint8_t)0U)     
#define HWA_DCSUB_SELECT_DCEST                   ((uint8_t)1U)     
#define HWA_FFT_STITCHING_TWID_PATTERN_2K                   ((uint8_t)0U)     
#define HWA_FFT_STITCHING_TWID_PATTERN_4K                   ((uint8_t)1U)     
/* ========================================================================== */
/*                         Structures and Enums                               */
/* ========================================================================== */
 
typedef void* HWA_Handle;
 
typedef void (*HWA_ParamDone_IntHandlerFuncPTR)(uint32_t paramSet, void * arg);
 
typedef void (*HWA_Done_IntHandlerFuncPTR)(void * arg);
 
typedef struct HWA_Attrs_t {
    uint32_t                instanceNum;                
    volatile uint32_t       ctrlBaseAddr;               
    volatile uint32_t       paramBaseAddr;              
    volatile uint32_t       ramBaseAddr;                
    volatile uint32_t       dssBaseAddr;                
    uint32_t                numHwaParamSets;            
    uint32_t                intNumParamSet;             
    uint32_t                intNumDone;                 
    uint32_t                numDmaChannels;             
    volatile uint32_t       accelMemBaseAddr;           
    uint32_t                accelMemSize;               
    bool                    isConcurrentAccessAllowed;  
    bool                    isCompressionEnginePresent; 
} HWA_Attrs;
 
typedef struct HWA_RAMAttrs_t
{
    uint32_t      ramBaseAddress;                     
    uint32_t      ramSizeInBytes;                     
} HWA_RAMAttrs;
 
typedef struct HWA_SrcDMAConfig_t {
    uint32_t       srcAddr;             
    uint32_t       destAddr;            
    uint16_t       aCnt;                
    uint16_t       bCnt;                
    uint16_t       cCnt;                
} HWA_SrcDMAConfig;
 
typedef struct HWA_CommonConfig_t {
    uint32_t            configMask;             
    uint16_t            numLoops;               
    uint8_t             paramStartIdx;          
    uint8_t             paramStopIdx;           
    struct {
        uint8_t         fft1DEnable;            
        uint16_t        bpmRate;                
        uint32_t        bpmPattern[2];          
        uint32_t        interferenceThreshold;  
        uint8_t         twidDitherEnable;       
        uint32_t        lfsrSeed;               
        uint8_t         fftSumDiv;              
    } fftConfig;
    
    struct {
        uint16_t        scale;                 
        uint8_t         shift;                 
    } dcEstimateConfig;
 
    struct
    {
        int32_t    swIVal[HWA_NUM_RXCHANNELS];        
        int32_t    swQVal[HWA_NUM_RXCHANNELS];        
    } dcSubtractConfig;
 
 
    // struct {
 
    //     uint32_t  thresholdMagSw[HWA_NUM_RXCHANNELS]; /**<  24-bit value: Interference zero-out threshold - is used to zero-out sample(s),
    //                                                              whose magnitude (24-bit absolute value of the 24-bit complex input) is very
    //                                                              high, prior to computing the FFT
    //                                                              The \ref HWA_PreProcessing::thresholdEnable is enabled, and
    //                                                              \ref HWA_PreProcessing::thresholdSelect is set to HWA_INTERFTHRESH_SELECT_SW
    //                                                              in the intended paramset for this threshold to be used
    //                                                              sets in INTERFTHRESH_MAGn_VAL register */
 
    //     uint32_t  thresholdMagDiffSw[HWA_NUM_RXCHANNELS];  /**<  24-bit value: Interference zero-out threshold, is used to zero-out sample(s),
    //                                                                   whose magnitude diff (24-bit absolute value of the 24-bit complex input)
    //                                                                   is very high, prior to computing the FFT
    //                                                                   if the \ref HWA_PreProcessing::thresholdEnable is enabled and
    //                                                                   \ref HWA_PreProcessing::thresholdSelect is set to HWA_INTERFTHRESH_SELECT_SW
    //                                                                   in the intended paramset for this threshold to be used
    //                                                                   sets in INTERFTHRESH_MAGDIFFn_VAL registers */
 
    //     uint8_t         sumMagScale;               /**<  8 bits value:unsigned 8 bits, 5 integer bits, and 3 fractional bits,
    //                                                     applied to INTERSUM_MAGn from interference statistics block,
    //                                                     default value is 8, corresponding to scale 1.0
    //                                                     if the \ref HWA_PreProcessing::resetMode is set
    //                                                     to HWA_DCEST_INTERFSUM_RESET_MODE_PARAMRESET or HWA_DCEST_INTERFSUM_RESET_MODE_PARAMRESET_ZEROLPCONT
    //                                                     sets INTERFSUM_MAG_SCALE in INTERFSTATS_CTRL register */
 
    //     int8_t          sumMagShift;               /**<  3 bits: right shift after scaling, the shift value is 2^(3+6+interfsumMagShift)
    //                                                    if the \ref HWA_PreProcessing::resetMode is set
    //                                                   to HWA_DCEST_INTERFSUM_RESET_MODE_PARAMRESET or HWA_DCEST_INTERFSUM_RESET_MODE_PARAMRESET_ZEROLPCONT
    //                                                    sets INTERFSUM_MAG_SHIFT in  INTERFSTATS_CTRL register */
 
    //     uint8_t         sumMagDiffScale;           /**<  8 bits: similar to interfsumMagScale, applied to INTERSUM_MAGDIFFn from interference statistics block,
    //                                                     if the \ref HWA_PreProcessing::resetMode is set
    //                                                     to HWA_DCEST_INTERFSUM_RESET_MODE_PARAMRESET or HWA_DCEST_INTERFSUM_RESET_MODE_PARAMRESET_ZEROLPCONT
    //                                                     sets INTERFSUM_MAGDIFF_SCALE in INTERFSTATS_CTRL register */
 
    //     int8_t          sumMagDiffShift;           /**<  3 bits: right shift after scaling, similar to interfsumMagShift
    //                                                    if the \ref HWA_PreProcessing::resetMode is set
    //                                                    to HWA_DCEST_INTERFSUM_RESET_MODE_PARAMRESET or HWA_DCEST_INTERFSUM_RESET_MODE_PARAMRESET_ZEROLPCONT
    //                                                   sets INTERFSUM_MAGDIFF_SHIFT in INTERFSTATS_CTRL register */
 
    //     uint8_t         mitigationWindowParam[HWA_NUM_INTERFMITG_WINARRAY];
    //                                               /**<  5 bit value: unsigned 5 bit integer, set the window parameters
    //                                                    if \ref HWA_PreProcessing::enable is enabled, and
    //                                                       \ref HWA_PreProcessing::pathSelect is set to HWA_INTERFMITIGATION_PATH_WINDOWZEROOUT
    //                                                    sets the INTF_MITG_WINDOW_PARAM_0_INTF_MITG_WINDOW_PARAM_0 in
    //                                                    INTF_MITG_WINDOW_PARAM_x register */
    //  } interfConfig;
 
 
    struct {
 
        int32_t         Iscale[HWA_NUM_RXCHANNELS]; 
        int32_t         Qscale[HWA_NUM_RXCHANNELS]; 
        int16_t          twiddleDeltaFrac;          
        uint8_t         recWindowReset;           
    } complexMultiplyConfig;
 
 
    struct {
        uint32_t        cfarThresholdScale;     
    } cfarConfig;
    
    struct {
        uint32_t    i_cmult_scale;              
        uint32_t    q_cmult_scale;              
    } scalarMult;
 
    struct {
        uint8_t EGEKparam[HWA_CMP_K_ARR_LEN];   
    } compressMode;
 
} HWA_CommonConfig;
 
typedef struct HWA_SourceConfig_t {
    uint16_t    srcAddr;                    
    uint16_t    srcAcnt;                    
    int16_t     srcAIdx;                    
    uint16_t    srcBcnt;                    
    int16_t     srcBIdx;                    
    uint16_t    srcShift;                   
    uint8_t     srcCircShiftWrap;           
    uint8_t     srcRealComplex;             
    uint8_t     srcWidth;                   
    uint8_t     srcSign;                    
    uint8_t     srcConjugate;               
    uint8_t     srcScale;                   
    uint8_t     bpmEnable;                  
    uint8_t     bpmPhase;                   
} HWA_SourceConfig;
 
typedef struct HWA_DestConfig_t {
    uint16_t    dstAddr;                    
    uint16_t    dstAcnt;                    
    int16_t     dstAIdx;                    
    int16_t     dstBIdx;                    
    uint8_t     dstRealComplex;             
    uint8_t     dstWidth;                   
    uint8_t     dstSign;                    
    uint8_t     dstConjugate;               
    uint8_t     dstScale;                   
    uint16_t    dstSkipInit;                
}HWA_DestConfig;
 
typedef struct HWA_AccelModeFFT_t{
    uint8_t      fftEn;                     
    uint8_t      fftSize;                   
    uint16_t     butterflyScaling;          
    uint8_t      interfZeroOutEn;          
    uint8_t      windowEn;                  
    uint16_t     windowStart;               
    uint8_t      winSymm;                   
    uint8_t      winInterpolateMode;        
    uint8_t       magLogEn;                  
    uint8_t       fftOutMode;                
} HWA_AccelModeFFT;
 
typedef struct HWA_AccelModeCompress_t{
    uint8_t      compressDecompress;                    
    uint8_t      method;                     
    uint8_t     ditherEnable;                   
    uint8_t      passSelect;                    
    uint8_t     headerEnable;                   
    uint8_t     scaleFactorBW;                 
    uint8_t     EGEKarrayLength;                 
} HWA_AccelModeCompress;
 
typedef struct HWA_ComplexMultiply_t {
    uint8_t      mode;                      
    union {
        uint16_t    twidIncrement;          
        struct {
            uint16_t    startFreq;          
            uint8_t     freqIncrement;      
        } dft;
        uint8_t     twidFactorPattern;      
    }cmpMulArgs;
}HWA_ComplexMultiply;
 
typedef struct HWA_PreProcessing_t {
 
    uint8_t      dcEstResetMode;             
    uint8_t      dcSubEnable;                
    uint8_t      dcSubSelect;                
    // struct {
    //     uint8_t      thresholdEnable;         /**<  enable/disable interference marking out, see \ref HWA_FEATURE_BIT macros for correct values
    //                                                if set into  HWA_FEATURE_BIT_DISABLE to disable the interference localization.
    //                                                sets the bits INTERFTHRESH_EN of the register PREPROC in paramset */
 
    //     uint8_t      thresholdMode;           /**<  specifies interference threshold mode, see \ref HWA_INTERFTHRESH_MODE macros
    //                                                for the correct values
    //                                                sets the bits INTERFTHRESH_MODE of the register PREPROC in paramset */
 
    //     uint8_t      thresholdSelect;         /**<  select the source of the threshold, see \ref HWA_INTERFTHRESH_SELECT macros
    //                                           for the correct values
    //                                           sets bits INTERFTHRESH_SELECT of the register PREPROC in paramset */
 
 
    // } interfLocalize;
 
    // struct {
    //    uint8_t      resetMode;               /**<  control reset behavior for all mag sum and magdiff sum accumulators,
    //                                                if it is set to HWA_DCEST_INTERFSUM_RESET_MODE_NOUPDATE, it is bypassed.
    //                                                see \ref HWA_DCEST_INTERFSUM_RESET_MODE macros for the correct values
    //                                                sets the INTERFSUM_MAG_RESET bits of the register PREPROC in paramset */
 
    // } interfStat;
 
    // struct {
 
    //     uint8_t      enable;                  /**<  enable/disable interference mitigation path, see \ref HWA_FEATURE_BIT macros
    //                                             for the correct values
    //                                             sets the bits INTF_MITG_EN of register PRE_PROCESSING in paramset */
 
    //     uint8_t      countThreshold;          /**<  5 bits value: the number of non-zero IIB within the hysteresis window
    //                                             should exceed the threshold for the CUT to be considered to be affected
    //                                             by interference. valid values are from 0 to 31.
    //                                             sets the bits INTF_MITG_CNTTHRESH of the register PRE_PROCESSING in paramset */
 
    //     uint8_t      pathSelect;              /**<  see \ref HWA_INTERFMITIGATION_PATH_SELECT macros for the correct values, select
    //                                              one of the three paths in the interference mitigation module
    //                                              sets the bits INFT_MITG_PATH_SEL of register PRE_PROCESSING in paramset */
 
    //     uint8_t      leftHystOrder;           /**<  4 bits value: the length of the IIB array considered on the left side of the CUT,
    //                                              valid values from 0 to 15.
    //                                              sets the bits INTF_MITG_LEFT_HYST_ORD of the register PRE_PROCESSING in paramset */
 
    //     uint8_t      rightHystOrder;          /**<  4 bits value: he length of the IIB array considered on the right side of the CUT,
    //                                               valid values from 0 to 15.
    //                                               sets the bits INTF_MITG_RIGHT_HYST_ORD of the register PRE_PROCESSING in paramset */
 
    // } interfMitigation;
 
    // uint8_t     chanCombEn;                   /**<  enable/disable synthetic channel combining, see \ref HWA_FEATURE_BIT
    //                                               macros for the correct values. if set into HWA_FEATURE_BIT_DISABLE to disable
    //                                               the channel combining.
    //                                               sets the bits CHANCOMB_EN of the register PREPROC in paramset */
 
    // uint8_t      zeroInsertEn;              /**<  enable/disable zero-insertion, fill the zeros at arbitrary
    //                                         locations in the A-dimension, prior to windowing and FFT, only applied to FFTSIZE
    //                                         upto 256. see \ref HWA_FEATURE_BIT macros for the correct values
    //                                         sets the bits ZEROINSERT_EN of register BFLYFFT in paramset */
 
    //HWA_ComplexMultiply     complexMultiply;  /**<  Complex multiply related params used when \ref HWA_ParamConfig::accelMode
    //                                               is not \ref HWA_ACCELMODE_CFAR */
} HWA_PreProcessing;
 
typedef struct HWA_AccelModeCFAR_t{
    uint8_t      numNoiseSamplesLeft;       
    uint8_t      numNoiseSamplesRight;      
    uint8_t      numGuardCells;             
    uint8_t      nAvgDivFactor;             
    uint8_t      nAvgMode;                  
    uint8_t      operMode;                  
    uint8_t      outputMode;                
    uint8_t      peakGroupEn;               
    uint8_t      cyclicModeEn;              
}HWA_AccelModeCFAR;
 
typedef struct HWA_ParamConfig_t {
    uint8_t             triggerMode;                
    uint8_t             dmaTriggerSrc;              
    uint8_t             accelMode;                  
    HWA_SourceConfig    source;                     
    HWA_DestConfig      dest;                       
    union {
        HWA_AccelModeFFT    fftMode;                
        HWA_AccelModeCFAR   cfarMode;               
        HWA_AccelModeCompress    compressMode;                
    }accelModeArgs;
    
    HWA_ComplexMultiply     complexMultiply;        
    HWA_PreProcessing       preProcCfg;           
}HWA_ParamConfig;
 
typedef struct HWA_InterruptConfig_t {
    uint8_t             interruptTypeFlag;      
    struct {
        HWA_ParamDone_IntHandlerFuncPTR   callbackFn;       
        void                             *callbackArg;      
           } cpu;
    struct {
        uint8_t                           dstChannel;     
    } dma;
} HWA_InterruptConfig;
 
typedef struct HWA_Stats_t {
    uint32_t             maxValue;      
    uint16_t             maxIndex;      
    uint8_t              iSumMSB;       
    uint8_t              qSumMSB;       
    uint32_t             iSumLSB;       
    uint32_t             qSumLSB;       
} HWA_Stats;
 
typedef struct HWA_DebugStats_t {
    uint8_t             currentParamSet;        
    uint16_t            currentLoopCount;       
    uint16_t            dmaTrigStatus;          
    uint8_t             dfePingPongStatus;      
    uint8_t             swTrigStatus;           
}HWA_DebugStats;
 
typedef struct HWA_MemInfo_t {
    uint32_t    baseAddress;        
    uint16_t    bankSize;           
    uint16_t    numBanks;           
}HWA_MemInfo;
 
typedef struct HWA_InterruptPriority_t {
 
    uint32_t    backgroundDone;                
    //TO DO: CLEAN uint32_t    ALTDone;                       /**<  \brief HWA interrupt priority for the ALT thread done */
    uint32_t    paramsetDone1;                 
    uint32_t    paramsetDone2;                 
} HWA_InterruptPriority;
 
typedef struct HWA_OpenConfig_t {
 
    HWA_InterruptPriority    interruptPriority ;  
} HWA_OpenConfig;
   /* end of HWA_DRIVER_EXTERNAL_DATA_STRUCTURE*/
 
/* ========================================================================== */
/*                  Internal/Private Structure Declarations                   */
/* ========================================================================== */
 
typedef struct HWA_InterruptCtx_t {
    HWA_ParamDone_IntHandlerFuncPTR     callbackFn;      
    void                                *callbackArg;    
} HWA_InterruptCtx;
 
typedef struct HWA_DoneInterruptCtx_t {
    bool                                bIsEnabled;      
    HWA_Done_IntHandlerFuncPTR          callbackFn;      
    void                                *callbackArg;    
} HWA_DoneInterruptCtx;
 
typedef struct HWA_Driver_t {
    uint32_t                        instanceNum;
    uint32_t                        refCnt;
    uint8_t                        configInProgress;
    uint16_t                       paramSetMapInProgress;
    HWA_Attrs          const       *hwAttrs;
 
    HwiP_Object                     hwiHandleParamSet;
 
    HwiP_Object                     hwiHandleDone;
 
    //TO DO: CLEAN HwiP_Object                     hwiHandleParamSetALT;
 
    //TO DO: CLEAN HwiP_Object                     hwiHandleDoneALT;
 
 
    HWA_InterruptCtx                *interruptCtxParamSet; /*[NUM_HWA_PARAMSETS_PER_INSTANCE];*/
    
    uint64_t                        interrupt1ParamSetMask;
 
    HWA_DoneInterruptCtx             interruptCtxDone; 
} HWA_Object;
 
extern HWA_Attrs        gHwaAttrs[];
extern HWA_RAMAttrs     gHwaRamCfg[HWA_NUM_RAMS];
extern HWA_Object       gHwaObject[];
extern HWA_Object      *gHwaObjectPtr[];
extern uint32_t         gHwaConfigNum;
 
/* ========================================================================== */
/*                         Global Variables Declarations                      */
/* ========================================================================== */
 
/* None */
 
/* ========================================================================== */
/*                          Function Declarations                             */
/* ========================================================================== */
 
extern void HWA_init(void);
 
extern void HWA_deinit(void);
 
extern HWA_Handle HWA_open(uint32_t index, HWA_OpenConfig * hwaCfg, int32_t* errCode);
 
extern int32_t HWA_close(HWA_Handle handle);
 
extern int32_t HWA_reset(HWA_Handle handle);
 
 
extern DSSHWACCRegs *HWA_getCommonCtrlAddr(HWA_Handle handle);
 
extern DSSHWACCPARAMRegs *HWA_getParamSetAddr(HWA_Handle handle, uint8_t paramsetIdx);
 
extern int32_t HWA_configCommon(HWA_Handle handle, HWA_CommonConfig *commonConfig);
 
extern int32_t HWA_configParamSet(HWA_Handle handle, uint8_t paramsetIdx, HWA_ParamConfig *paramConfig, HWA_SrcDMAConfig *dmaConfig);
 
extern int32_t HWA_getDMAconfig(HWA_Handle handle, uint8_t dmaTriggerSrc, HWA_SrcDMAConfig *dmaConfig);
extern int32_t HWA_getCfarPeakCntRegAddress(HWA_Handle handle, uint32_t *peakCntAddr);
 
 
extern int32_t HWA_configRam(HWA_Handle handle, uint8_t ramType, uint8_t *data, uint32_t dataSize, uint32_t startIdx);
 
extern int32_t HWA_enableParamSetInterrupt(HWA_Handle handle, uint8_t paramsetIdx, HWA_InterruptConfig *intrConfig);
 
 
extern int32_t HWA_enableDoneInterrupt(HWA_Handle handle, HWA_Done_IntHandlerFuncPTR callbackFn, void * callbackArg);
 
extern int32_t HWA_disableParamSetInterrupt(HWA_Handle handle, uint8_t paramsetIdx, uint8_t interruptTypeFlag);
 
extern int32_t HWA_disableDoneInterrupt(HWA_Handle handle);
 
extern int32_t HWA_enable(HWA_Handle handle, uint8_t flagEnDis);
 
 
extern int32_t HWA_setSoftwareTrigger(HWA_Handle handle);
 
 
extern int32_t HWA_setDMA2ACCManualTrig(HWA_Handle handle, uint8_t idx);
 
extern int32_t HWA_setSourceAddress(HWA_Handle handle, uint16_t paramIdx, uint32_t sourceAddress);
 
extern int32_t HWA_readStatsReg(HWA_Handle handle, HWA_Stats *pStats, uint8_t numIter);
 
extern int32_t HWA_readCFARPeakCountReg(HWA_Handle handle, uint8_t *pbuf, uint8_t size);
 
extern int32_t HWA_readDebugReg(HWA_Handle handle, HWA_DebugStats *pStats);
 
extern int32_t HWA_clearDebugReg(HWA_Handle handle);
 
extern int32_t HWA_getHWAMemInfo(HWA_Handle handle, HWA_MemInfo *memInfo);
 
extern int32_t HWA_getDMAChanIndex(HWA_Handle handle, uint8_t edmaChanId, uint8_t *hwaDestChan);
 
extern int32_t HWA_getEDMAChanId(HWA_Handle handle, uint8_t hwaDMAdestChan);
 
extern int32_t HWA_readDCEstimateReg(HWA_Handle handle, cmplx32ImRe_t *pbuf, uint8_t startIdx, uint8_t size);
 
extern int32_t HWA_readIntfAccReg(HWA_Handle handle, uint64_t *accBuf, uint8_t type, uint8_t startIdx, uint8_t size);
 
extern int32_t HWA_readDCAccReg(HWA_Handle handle, cmplx64ImRe_t *accbuf,  uint8_t startIdx, uint8_t size);
 
extern int32_t HWA_readInterfChirpCountReg(HWA_Handle handle, uint16_t *numInterfSamplesChirp);
 
extern int32_t HWA_readInterfFrameCountReg(HWA_Handle handle, uint32_t *numInterfSamplesFrame);
 
extern int32_t HWA_readInterfThreshReg(HWA_Handle handle, uint32_t *pbuf, uint8_t startIdx, uint8_t size, uint8_t type);
 
//extern int32_t  HWA_controlPeripheralSuspendMode(HWA_Handle handle, uint8_t flagEnDis);
  /* end of addgroup HWA_DRIVER_EXTERNAL_FUNCTION*/
 
#ifdef __cplusplus
}
#endif
 
#endif /* HWA_H_ */