Driver Porting Layer (DPL)

This module contains APIs which are used by the drivers to make them agnostic of the underlying OS and CPU architecture.

It consists of below sub-modules

• HW Interrupts - APIs for HW Interrupts

• Semaphore - APIs for Semaphore

• Task - APIs for Task

• Clock - APIs for Clock

• Cycle Counter - APIs for Counting CPU Cycles

• Queue - APIs for Queue

• Cache - APIs for Cache

• CPUID for ARMv7 (ARM R5) - APIs for CPU ID

• MPU for ARMv7 (ARM R5) - APIs for MPU for ARMv7 (ARM R5, ARM M4)

• MMU for ARMv8 (ARM A53, TI C75) - APIs for system level define’s and function’s

• Region based Address Translate - APIs for Region based address translation (RAT) module

• Heap - APIs for Heap management

• Debug - APIs for Debug log’s and assert’s

• Event - APIs for Event

• Timer - APIs for timer setup and control