Introduction

This file contains the prototypes of the APIs present in the device abstraction layer file of GPADC.

Data Structures
struct	GPADC_ChannelConfigType
	GPADC Config Type data structure for the mode, trigger source and channel configuration for all the available external sources <0-8> More...

struct	GPADC_ConfigType
	GPADC Config Type data structure for the mode, trigger source and channel configuration for all the available external sources <0-8> More...

union	GPADC_ParamInfoType
	Configuration Parameters for GPADC in IFM mode ParamValue : Value to be programmed in one hot reg CollectSamples : Number of samples to collect @625KHz SkipSamples : Number of samples to skip @10MHz Time = Mantissa[3:0] * 2^(Exponent[6:4]) / 10M. More...

union	GPADC_channelsGroupSelectType
	Available <0-8> external sources/channels could be selected by using bitmap of 9 bits in LSB. Ex: 0x01F is the bitmap for conversion of <0-4> external sources. More...

struct	GPADC_DriverChannelConfigType
	GPADC Driver Channel configuration. More...

struct	GPADC_DriverObjectType
	GPADC Driver Object configuration. More...

struct	GPADC_TempSensMuxType
	Temperature sensors mux values. More...

struct	GPADC_TempSensValueType
	The Temperature sensor values structure. More...

struct	MSS_GPADC_RST_CTRL_REG
	GPADC Reset Control register. More...

struct	MSS_GPADC_CLK_DIV_VAL_REG
	GPADC Clock Divider Value register. More...

struct	MSS_GPADC_CLK_GATE_REG
	GPADC Clock Gate register. More...

struct	MSS_TOPRCM_ANA_REG_TW_ANA_TMUX_CTRL_LOWV_REG
	Analog Mux Control Registers. More...

struct	MSS_TOPRCM_ANA_REG_REFSYS_SPARE_REG_LOWV_REG
	Analog Refsys spare Registers. More...

struct	U_MSS_TOPRCM_ANA_REG_TW_CTRL_REG_LOWV_REG
	RCM Analog register TW Control Registers. More...

struct	GPADCREG_REG0
	Register Offset 0x000. More...

struct	GPADCREG_REG1
	Register1 Offset 0x004. More...

struct	GPADCREG_REG2
	Register2 Offset 0x008. More...

union	U_GPADCREG_REG3
	Register3 Offset 0x00C. More...

union	U_GPADCREG_REG4
	Register4 Offset 0x010. More...

struct	GPADCREG_REG5
	Register5 Offset 0x014. More...

struct	GPADCREG_REG6
	Register6 Offset 0x018. More...

struct	GPADCREG_REG7
	Register7 Offset 0x01C. More...

struct	GPADCREG_REG8
	Register8 Offset 0x020. More...

struct	GPADCREG_REG9
	Register9 Offset 0x024. More...

struct	GPADCREG_REG10
	Register10 Offset 0x028. More...

struct	GPADCREG_REG11
	Register11 Offset 0x02C. More...

struct	GPADCREG_REG12
	Register12 Offset 0x030. More...

struct	GPADCREG_REG13
	Register13 Offset 0x034. More...

struct	GPADCREG_REG14
	Register14 Offset 0x038. More...

struct	GPADCREG_REG15
	Register15 Offset 0x03C. More...

struct	GPADCREG_REG16
	Register16 Offset 0x040. More...

struct	GPADCREG_REG17
	Register17 Offset 0x044. More...

struct	GPADCREG_REG18
	Register19 Offset 0x048. More...

struct	GPADCREG_REG19
	Register20 Offset 0x04C. More...

struct	GPADCREG_REG20
	Register21 Offset 0x050. More...

struct	GPADCREG_REG21
	Register22 Offset 0x054. More...

struct	GPADCREG_REG22
	Register22 Offset 0x058. More...

struct	T_GPADC_REGS
	MSS_GPADC_REG_REGS. More...

struct	MSS_CTRL_MSS_GPADC_MEM_INIT_REG
	GPADC Memory initialize registers. More...

struct	GPADC_CfgAndParamValuesType
	Configuration Parameters for GPADC LUT in IFM mode 32 bits: ConfigValue 32 bits: ParamInfo. More...

struct	GPADC_ResultType
	GPADC returning min, avg, max and sum. More...

Macros
#define	MAX_CTM_GPADC_PARAMS (1U)
	Number of measurement parameters for GPADC in CTM mode More...

#define	GPADC_TIMEOUT_MAX (200000U)
	GPADC TIMEOUT Max Number of Sample collect : 256 Max Time for 256 samples collection : 256 * 16/10MHz = 409.6us Add 10 % margin : 450us Add 550us for skip samples Total timeout: 1ms Timout in terms of pmu count = 1ms/5ns = 200,000. More...

#define	GPADC_REGS_PTR ((T_GPADC_REGS*)CSL_MSS_GPADC_REG_U_BASE)
	GPADC Register Base Address. More...

#define	GPADCPKTRAM_REGS_PTR ((T_GPADCPKTRAM_REGS*)CSL_MSS_GPADC_PKT_RAM_U_BASE)
	GPADCPKTRAM Register Base Address. More...

#define	GPADCOUT_RAM_PTR ((T_GPADCOUT_RAM*)CSL_MSS_GPADC_DATA_RAM_U_BASE)
	GPADCPKTRAM Data RAM Base Address. More...

#define	MSS_GPADC_RST_CTRL_ADDR (CSL_MSS_RCM_U_BASE + CSL_MSS_RCM_MSS_GPADC_RST_CTRL)
	GPADC Reset Control Address. More...

#define	MSS_GPADC_RST_CTRL_PTR ((MSS_GPADC_RST_CTRL_REG*)MSS_GPADC_RST_CTRL_ADDR)
	GPADC Reset Control Pointer. More...

#define	MSS_GPADC_CLK_DIV_VAL_ADDR (CSL_MSS_RCM_U_BASE + CSL_MSS_RCM_MSS_GPADC_CLK_DIV_VAL)
	GPADC Clock Divider value Address. More...

#define	MSS_GPADC_CLK_DIV_VAL_PTR ((MSS_GPADC_CLK_DIV_VAL_REG*)MSS_GPADC_CLK_DIV_VAL_ADDR)
	GPADC Clock Divider value pointer. More...

#define	MSS_GPADC_CLK_GATE_ADDR (CSL_MSS_RCM_U_BASE + CSL_MSS_RCM_MSS_GPADC_CLK_GATE)
	GPADC Clock Gate Address. More...

#define	MSS_GPADC_CLK_GATE_PTR ((MSS_GPADC_CLK_GATE_REG*)MSS_GPADC_CLK_GATE_ADDR)
	GPADC Clock Gate Pointer. More...

#define	MSS_TOPRCM_ANA_REG_TW_ANA_TMUX_CTRL_LOWV_ADDR (CSL_MSS_TOPRCM_U_BASE + CSL_MSS_TOPRCM_ANA_REG_TW_ANA_TMUX_CTRL_LOWV)
	RCM TW Analog TMUX Contol Address. More...

#define	MSS_TOPRCM_ANA_REG_TW_ANA_TMUX_CTRL_LOWV_PTR ((MSS_TOPRCM_ANA_REG_TW_ANA_TMUX_CTRL_LOWV_REG*)MSS_TOPRCM_ANA_REG_TW_ANA_TMUX_CTRL_LOWV_ADDR)
	RCM TW Analog TMUX Contol Poniter. More...

#define	MSS_TOPRCM_ANA_REG_REFSYS_SPARE_REG_LOWV_ADDR (CSL_MSS_TOPRCM_U_BASE + CSL_MSS_TOPRCM_ANA_REG_REFSYS_SPARE_REG_LOWV)
	RCM Analog Refsys Spare register Address. More...

#define	MSS_TOPRCM_ANA_REG_REFSYS_SPARE_REG_LOWV_PTR ((MSS_TOPRCM_ANA_REG_REFSYS_SPARE_REG_LOWV_REG*)MSS_TOPRCM_ANA_REG_REFSYS_SPARE_REG_LOWV_ADDR)
	RCM Analog Refsys Spare register Pointer. More...

#define	MSS_TOPRCM_ANA_REG_TW_CTRL_REG_LOWV_ADDR (CSL_MSS_TOPRCM_U_BASE + CSL_MSS_TOPRCM_ANA_REG_TW_CTRL_REG_LOWV)
	RCM Analog TW Control register Address. More...

#define	MSS_TOPRCM_ANA_REG_TW_CTRL_REG_LOWV_PTR ((U_MSS_TOPRCM_ANA_REG_TW_CTRL_REG_LOWV_REG*)MSS_TOPRCM_ANA_REG_TW_CTRL_REG_LOWV_ADDR)
	RCM Analog TW Control register pointer. More...

#define	MSS_CTRL_MSS_GPADC_MEM_INIT_ADDR (CSL_MSS_CTRL_U_BASE + CSL_MSS_CTRL_MSS_GPADC_MEM_INIT)
	GPADC Memomory Init Address. More...

#define	MSS_CTRL_MSS_GPADC_MEM_INIT_PTR ((MSS_CTRL_MSS_GPADC_MEM_INIT_REG*)MSS_CTRL_MSS_GPADC_MEM_INIT_ADDR)
	GPADC Memomory Init poniter. More...

#define	REG_STRUCT_SWRITE(w_hwRegStruct, w_regVal, w_regWrSts)
	Register Structure member write and compare macro. More...

#define	REG32_SCOMPARE(w_hwVal, w_swVal, w_regWrSts)
	32 bit register compare macro More...

#define	REG_STRUCT_SCLEAR(w_hwRegStruct, w_regVal, w_regWrSts)
	Register Structure member CLEAR and compare macro. More...

GPADC Macros

#define	GPADC_DISABLE (0U)
	Disable GPADC. More...

#define	GPADC_ENABLE (1U)
	Enable GPADC. More...

#define	GPADC_ASSERT_RESET (1U)
	Reset GPADC. More...

#define	GPADC_DEASSERT_RESET (0U)
	Release GPADC Reset. More...

#define	GPADC_FSM_ASSERT_RESET (0x7U)
	Reset GPADC for digital FSM. More...

#define	GPADC_FSM_DEASSERT_RESET (0U)
	Release Reset GPADC for digital FSM. More...

GPADC Modes

#define	GPADC_MODE_DISABLE (0U)
	GPADC Disable mode. More...

#define	GPADC_MODE_IFM (1U)
	GPADC IFM Operation mode. More...

#define	GPADC_MODE_CTM (2U)
	GPADC CTM Operation mode. More...

Instruction RAM Index
MON CTM INSTRUCTION RAM Index
#define	GPADC_MON_INSTR_RAM_ST_IND (224U)
	GPADC RAM Instruction Index. More...

#define	GPADC_MAX_MON_INSTR_RAM (32U)
	GPADC MAX RAM Instruction. More...

Enumerations
enum	GPADC_CtmTrigSrcType { GPADC_TRIG_SRC_GPIO_0 = 0, GPADC_TRIG_SRC_GPIO_1, GPADC_TRIG_SRC_GPIO_2, GPADC_TRIG_SRC_GPIO_3, GPADC_TRIG_SRC_RSS_CSI2A_EOL_INT, GPADC_TRIG_SRC_RSS_CSI2A_SOF_INT0, GPADC_TRIG_SRC_RSS_CSI2A_SOF_INT1, GPADC_TRIG_SRC_RSS_CSI2A_SOF_INT, GPADC_TRIG_SRC_RSS_CSI2B_SOF_INT, GPADC_TRIG_SRC_HW_Sync_FE1, GPADC_TRIG_SRC_HW_Sync_FE2, GPADC_TRIG_SRC_DSS_RTIA_1, GPADC_TRIG_SRC_DSS_RTIB_1, GPADC_TRIG_SRC_MSS_RTIA_INT1, GPADC_TRIG_SRC_MSS_RTIB_INT1, GPADC_TRIG_SRC_MMR_Based_SW_Trigger }
	Enumeration which describes the trigger sources for GPADC CTM mode conversion. More...

enum	GPADC_ChannelConvModeType { GPADC_ONESHOT_CONV_MODE = 0, GPADC_CONTINUOUS_CONV_MODE }
	Enumeration which lists the conversion modes supported for AM273x GPADC conversion. More...

enum	GPADC_TriggerSourceType { GPADC_TRIGG_SRC_SW = 0, GPADC_TRIGG_SRC_HW }
	Enumeration which describes the trigger sources for GPADC CTM mode conversion. More...

enum	GPADC_MeasExtSrcType { GPADC_MEAS_EXT_CH1 = 0, GPADC_MEAS_EXT_CH2, GPADC_MEAS_EXT_CH3, GPADC_MEAS_EXT_CH4, GPADC_MEAS_EXT_CH5, GPADC_MEAS_EXT_CH6, GPADC_MEAS_EXT_CH7, GPADC_MEAS_EXT_CH8, GPADC_MEAS_EXT_CH9, MAX_GPADC_MEAS_SOURCES }
	Enumeration which describes the external sources available for GPADC conversion. More...

enum	GPADC_ConvResultType { GPADC_CONV_ERROR = 0, GPADC_CONV_DONE, GPADC_CONV_CHANNEL_CONFIG_MISSING }
	Enumeration which describes the error types of GPADC conversion. More...

enum	GPADC_StatusType { GPADC_IDLE, GPADC_BUSY, GPADC_COMPLETED }
	Current status of the conversion of the requested GPADC HW unit. More...

enum	GPADC_TempSensorSrcType { GPADC_DIG_DSP_TEMP_SENSOR = 0, GPADC_DIG_HWA_TEMP_SENSOR, GPADC_DIG_HSM_TEMP_SENSOR, MAX_GPADC_TEMP_SENSORS }
	Enumeration which describes the temperature sensors available for GPADC measurement. More...

Functions
void	GPADC_init (void)
	This function initializes the GPADC module. More...

void	GPADC_deinit (void)
	This function de-initializes the GPADC module. More...

int32_t	GPADC_open (GPADC_ConfigType *CfgPtr)
	Initializes the GPADC Driver with the channels configuration. More...

int32_t	GPADC_close (void)
	This function closes the GPADC module. More...

GPADC_ConvResultType	GPADC_startGroupConversion (GPADC_channelsGroupSelectType channels, uint8_t numChannels)
	Starts and triggers the multi channel ADC conversion. More...

GPADC_ConvResultType	GPADC_startSingleChannelConversion (GPADC_MeasExtSrcType channelID, uint16_t *gpadcValue)
	Starts and triggers the single channel conversion. Pass the channelID and result address to the driver and the result will be stored in the address passed. More...

int32_t	GPADC_stopConversion (void)
	Stops the GPADC conversion. More...

int32_t	GPADC_setupResultBuffer (uint16_t *ResBufferPtr)
	Initializes GPADC driver with the group specific result buffer start address where the conversion results will be stored. More...

int32_t	GPADC_readResultBuffer (uint16_t *ResBufferPtr)
	The function is used to read the result buffer from the GPADC Driver. More...

GPADC_StatusType	GPADC_getStatus (void)
	Gets the status of GPADC Driver HW unit. More...

int32_t	GPADC_readTemperature (uint8_t numAverages, uint8_t numChannels, GPADC_TempSensValueType *tempValuesPtr)
	Read the temperature sensor value. More...

void	GPADC_initTempMeasurement (void)
	Initialize GPADC efuse temperature parameters. More...

Introduction

Data Structures

Macros

Enumerations

Functions