AM243x Motor Control SDK  09.01.00
sdfm_drv.h
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1 /*
2  * Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
3  *
4  *
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32  */
33 
34 #ifndef _SDFM_DRV_H_
35 #define _SDFM_DRV_H_
36 
37 #ifdef __cplusplus
38 extern "C" {
39 #endif
40 
41 #include <drivers/soc.h>
42 #include <drivers/pruicss.h>
43 #include <math.h>
44 
45 
46 /* ========================================================================== */
47 /* Macros */
48 /* ========================================================================== */
49 
50 
52 #define PRU_ICSSG_DRAM0_SLV_RAM ( CSL_PRU_ICSSG0_DRAM0_SLV_RAM_BASE )
53 #define PRU_ICSSG_DRAM1_SLV_RAM ( CSL_PRU_ICSSG0_DRAM1_SLV_RAM_BASE )
54 
56 #define DEF_SD_CH_CTRL_CH_EN ( 0 ) /* default all chs disabled */
57 #define BF_CH_EN_MASK ( 0x1 )
58 #define SDFM_CH_CTRL_CH_EN_BF_CH0_EN_SHIFT ( 0 )
59 #define SDFM_CH_CTRL_CH_EN_BF_CH0_EN_MASK ( BF_CH_EN_MASK << SDFM_CH_CTRL_CH_EN_BF_CH0_EN_SHIFT )
60 #define SDFM_CH_CTRL_CH_EN_BF_CH1_EN_SHIFT ( 1 )
61 #define SDFM_CH_CTRL_CH_EN_BF_CH1_EN_MASK ( BF_CH_EN_MASK << SDFM_CH_CTRL_CH_EN_BF_CH1_EN_SHIFT )
62 #define SDFM_CH_CTRL_CH_EN_BF_CH2_EN_SHIFT ( 2 )
63 #define SDFM_CH_CTRL_CH_EN_BF_CH2_EN_MASK ( BF_CH_EN_MASK << SDFM_CH_CTRL_CH_EN_BF_CH2_EN_SHIFT )
64 #define SDFM_CH_CTRL_CH_EN_BF_CH3_EN_SHIFT ( 3 )
65 #define SDFM_CH_CTRL_CH_EN_BF_CH3_EN_MASK ( BF_CH_EN_MASK << SDFM_CH_CTRL_CH_EN_BF_CH3_EN_SHIFT )
66 #define SDFM_CH_CTRL_CH_EN_BF_CH4_EN_SHIFT ( 4 )
67 #define SDFM_CH_CTRL_CH_EN_BF_CH4_EN_MASK ( BF_CH_EN_MASK << SDFM_CH_CTRL_CH_EN_BF_CH4_EN_SHIFT )
68 #define SDFM_CH_CTRL_CH_EN_BF_CH5_EN_SHIFT ( 5 )
69 #define SDFM_CH_CTRL_CH_EN_BF_CH5_EN_MASK ( BF_CH_EN_MASK << SDFM_CH_CTRL_CH_EN_BF_CH5_EN_SHIFT )
70 #define SDFM_CH_CTRL_CH_EN_BF_CH6_EN_SHIFT ( 6 )
71 #define SDFM_CH_CTRL_CH_EN_BF_CH6_EN_MASK ( BF_CH_EN_MASK << SDFM_CH_CTRL_CH_EN_BF_CH6_EN_SHIFT )
72 #define SDFM_CH_CTRL_CH_EN_BF_CH7_EN_SHIFT ( 7 )
73 #define SDFM_CH_CTRL_CH_EN_BF_CH7_EN_MASK ( BF_CH_EN_MASK << SDFM_CH_CTRL_CH_EN_BF_CH7_EN_SHIFT )
74 #define SDFM_CH_CTRL_CH_EN_BF_CH8_EN_SHIFT ( 8 )
75 #define SDFM_CH_CTRL_CH_EN_BF_CH8_EN_MASK ( BF_CH_EN_MASK << SDFM_CH_CTRL_CH_EN_BF_CH8_EN_SHIFT )
76 #define SDFM_CH_CTRL_CH_EN_BF_CH9_EN_SHIFT ( 9 )
77 #define SDFM_CH_CTRL_CH_EN_BF_CH9_EN_MASK ( BF_CH_EN_MASK << SDFM_CH_CTRL_CH_EN_BF_CH9_EN_SHIFT )
78 #define SDFM_CH_CTRL_CH_EN_SHIFT ( SDFM_CH_CTRL_CH_EN_BF_CH0_EN_SHIFT )
79 #define SDFM_CH_CTRL_CH_EN_MASK \
80  ( SDFM_CH_CTRL_CH_EN_BF_CH0_EN_MASK | \
81  SDFM_CH_CTRL_CH_EN_BF_CH1_EN_MASK | \
82  SDFM_CH_CTRL_CH_EN_BF_CH2_EN_MASK | \
83  SDFM_CH_CTRL_CH_EN_BF_CH3_EN_MASK | \
84  SDFM_CH_CTRL_CH_EN_BF_CH4_EN_MASK | \
85  SDFM_CH_CTRL_CH_EN_BF_CH5_EN_MASK | \
86  SDFM_CH_CTRL_CH_EN_BF_CH6_EN_MASK | \
87  SDFM_CH_CTRL_CH_EN_BF_CH7_EN_MASK | \
88  SDFM_CH_CTRL_CH_EN_BF_CH8_EN_MASK | \
89  SDFM_CH_CTRL_CH_EN_BF_CH9_EN_MASK )
90 
91 #define SDFM_MAIN_FILTER_MASK ( 1 )
92 #define SDFM_MAIN_FILTER_SHIFT ( 0 )
93 
94 #define SDFM_MAIN_INTERRUPT_MASK ( 1 )
95 #define SDFM_MAIN_INTERRUPT_SHIFT ( 1 )
96 
98 #define SDFM_RECFG_REINIT ( SDFM_RECFG_BF_RECFG_REINIT_MASK )
99 
100 #define SDFM_RECFG_CLK ( SDFM_RECFG_BF_RECFG_CLK_MASK )
101 
102 #define SDFM_RECFG_OSR ( SDFM_RECFG_BF_RECFG_OSR_MASK )
103 
104 #define SDFM_RECFG_TRIG_SAMP_TIME ( SDFM_RECFG_BF_RECFG_TRIG_SAMPLE_TIME_MASK )
105 
106 #define SDFM_RECFG_TRIG_SAMP_CNT ( SDFM_RECFG_BF_RECFG_TRIG_SAMPLE_CNT_MASK )
107 
108 #define SDFM_RECFG_CH_EN ( 1<<6 )
109 
110 #define SDFM_RECFG_FD ( SDFM_RECFG_BF_RECFG_FD_MASK )
111 
112 #define SDFM_RECFG_TRIG_OUT_SAMP_BUF ( SDFM_RECFG_BF_RECFG_TRIG_OUT_SAMP_BUF_MASK )
113 
114 #define IEP_DEFAULT_INC 0x1
115 
116 
117 
118 /* SDFM output buffer size in 32-bit words */
119 #define ICSSG_SD_SAMP_CH_BUF_SZ ( 128 )
120 #define NUM_CH_SUPPORTED_PER_AXIS ( 3 )
121 #define SDFM_NINE_CH_MASK ( 0x1FF )
122 #define SDFM_CH_MASK_FOR_CH0_CH3_CH6 ( 0x49 )
123 #define SDFM_CH_MASK_FOR_CH1_CH4_CH7 ( 0x92 )
124 #define SDFM_CH_MASK_FOR_CH2_CH5_CH8 ( 0x124 )
125 
126 /*SDFM Channel IDs*/
127 #define SDFM_CHANNEL0 (0)
128 #define SDFM_CHANNEL1 (1)
129 #define SDFM_CHANNEL2 (2)
130 #define SDFM_CHANNEL3 (3)
131 #define SDFM_CHANNEL4 (4)
132 #define SDFM_CHANNEL5 (5)
133 #define SDFM_CHANNEL6 (6)
134 #define SDFM_CHANNEL7 (7)
135 #define SDFM_CHANNEL8 (8)
136 
137 /*SDFM firmware version mask*/
138 #define SDFM_FW_VERSION_BIT_SHIFT (32)
139 
140 /*Fast detect ERROR mask*/
141 #define SDFM_FD_ERROR_MASK_FOR_TRIP_VEC ( 0x3800000 )
142 
143 #define SDFM_PHASE_DELAY_ACK_BIT_MASK (1)
144 #define SDFM_PHASE_DELAY_CAL_LOOP_SIZE (8)
145 
146 /* ========================================================================== */
147 /* Structures */
148 /* ========================================================================== */
149 
156 typedef struct SDFM_CfgSdClk_s
157 {
159  volatile uint8_t sd_prd_clocks;
161  volatile uint8_t sd_clk_inv;
162 } SDFM_CfgSdClk;
163 
172 typedef struct SDFM_CfgTrigger_s
173 {
175  volatile uint8_t en_continuous_mode;
177  volatile uint8_t en_double_nc_sampling;
179  volatile uint32_t first_samp_trig_time;
181  volatile uint32_t second_samp_trig_time;
183  volatile uint32_t nc_prd_iep_cnt;
185 
192 typedef struct SDFM_CfgIep_s
193 {
195  volatile uint8_t iep_inc_value;
196 
198  volatile uint32_t cnt_epwm_prd;
199 
200 }SDFM_CfgIep;
201 
202 
209 typedef struct SDFM_GpioParams_s{
210  volatile uint32_t write_val;
211  volatile uint32_t set_val_addr;
212  volatile uint32_t clr_val_addr;
214 
221 typedef struct SDFM_ChCtrl_s
222 {
224  volatile uint32_t sdfm_ch_id;
226  volatile uint16_t enable_comparator;
228  volatile uint8_t enFastDetect;
230  volatile uint8_t en_phase_delay;
232  volatile uint16_t clock_phase_delay;
234  volatile uint16_t clock_edge;
235 
236 } SDFM_ChCtrl;
237 
244 typedef struct SDFM_ClkSourceParms_s
245 {
247  volatile uint32_t clk_source;
249  volatile uint8_t clk_inv;
251 
258 typedef struct SDFM_ThresholdParms_s
259 {
261  volatile uint32_t high_threshold;
263  volatile uint32_t low_threshold;
265  volatile uint8_t highThStatus;
267  volatile uint8_t lowThStatus;
269  volatile uint8_t zeroCrossEn;
271  volatile uint8_t zeroCrossThstatus;
273  volatile uint32_t zeroCrossTh;
275 
282 typedef struct SDFM_Cfg_s
283 {
285  volatile uint8_t ch_id;
287  volatile uint8_t filter_type;
289  volatile uint8_t osr;
293  volatile uint8_t fd_window;
295  volatile uint8_t fd_zero_max;
297  volatile uint8_t fd_zero_min;
299  volatile uint8_t fd_one_max;
301  volatile uint8_t fd_one_min;
306 } SDFM_Cfg;
307 
315 typedef struct SDFM_Ctrl_s
316 {
318  volatile uint8_t sdfm_en;
320  volatile uint8_t sdfm_en_ack;
322  volatile uint8_t sdfm_pru_id;
323 } SDFM_Ctrl;
324 
325 typedef struct SDFM_Interface_s{
336  /*<sdfm time sampling interface pointer */
339  volatile uint32_t sampleBufferBaseAdd;
341  volatile uint64_t firmwareVersion;
343 
344 typedef struct SDFM_SampleOutInterface_s
345 {
346  uint32_t sampleOutput[NUM_CH_SUPPORTED_PER_AXIS];
354 typedef struct SDFM_s {
356  PRUICSS_Handle gPruIcssHandle;
357  uint8_t pruId;
358  uint32_t sdfmClock;
359  uint32_t iepClock;
360  uint32_t pruCoreClk;
361  uint8_t iepInc;
364  void *pruss_cfg;
365 } SDFM;
366 
367 
368 #include "sdfm_api.h"
369 
370 #ifdef __cplusplus
371 }
372 #endif
373 
374 #endif
SDFM::iepClock
uint32_t iepClock
Definition: sdfm_drv.h:359
SDFM_ChCtrl::clock_edge
volatile uint16_t clock_edge
Definition: sdfm_drv.h:234
SDFM_ChCtrl::sdfm_ch_id
volatile uint32_t sdfm_ch_id
Definition: sdfm_drv.h:224
SDFM::sdfmClock
uint32_t sdfmClock
Definition: sdfm_drv.h:358
SDFM_ThresholdParms::highThStatus
volatile uint8_t highThStatus
Definition: sdfm_drv.h:265
SDFM_CfgSdClk::sd_clk_inv
volatile uint8_t sd_clk_inv
Definition: sdfm_drv.h:161
SDFM_CfgIep::iep_inc_value
volatile uint8_t iep_inc_value
Definition: sdfm_drv.h:195
SDFM_Interface::sdfm_cfg_trigger
SDFM_CfgTrigger sdfm_cfg_trigger
Definition: sdfm_drv.h:337
SDFM_ChCtrl::en_phase_delay
volatile uint8_t en_phase_delay
Definition: sdfm_drv.h:230
SDFM::pruCoreClk
uint32_t pruCoreClk
Definition: sdfm_drv.h:360
SDFM_Cfg
Structure defining SDFM configuration interface.
Definition: sdfm_drv.h:283
SDFM_Cfg::ch_id
volatile uint8_t ch_id
Definition: sdfm_drv.h:285
SDFM_Interface::sdfm_cfg_iep_ptr
SDFM_CfgIep sdfm_cfg_iep_ptr
Definition: sdfm_drv.h:329
SDFM_Cfg::sdfm_clk_parms
SDFM_ClkSourceParms sdfm_clk_parms
Definition: sdfm_drv.h:303
SDFM::pruss_cfg
void * pruss_cfg
Definition: sdfm_drv.h:364
SDFM_Cfg::sdfm_gpio_params
SDFM_GpioParams sdfm_gpio_params
Definition: sdfm_drv.h:305
SDFM_Interface::sampleBufferBaseAdd
volatile uint32_t sampleBufferBaseAdd
Definition: sdfm_drv.h:339
SDFM_CfgTrigger::en_double_nc_sampling
volatile uint8_t en_double_nc_sampling
Definition: sdfm_drv.h:177
SDFM_Cfg::fd_one_max
volatile uint8_t fd_one_max
Definition: sdfm_drv.h:299
SDFM_Interface::sdfm_ctrl
SDFM_Ctrl sdfm_ctrl
Definition: sdfm_drv.h:327
SDFM::iepInc
uint8_t iepInc
Definition: sdfm_drv.h:361
SDFM_Ctrl::sdfm_pru_id
volatile uint8_t sdfm_pru_id
Definition: sdfm_drv.h:322
SDFM_ThresholdParms::lowThStatus
volatile uint8_t lowThStatus
Definition: sdfm_drv.h:267
SDFM_ChCtrl::enable_comparator
volatile uint16_t enable_comparator
Definition: sdfm_drv.h:226
SDFM_Ctrl::sdfm_en_ack
volatile uint8_t sdfm_en_ack
Definition: sdfm_drv.h:320
SDFM_GpioParams
Structure defining SDFM base address and values to toggle GPIO pins.
Definition: sdfm_drv.h:209
SDFM_Cfg::osr
volatile uint8_t osr
Definition: sdfm_drv.h:289
SDFM_ThresholdParms::zeroCrossTh
volatile uint32_t zeroCrossTh
Definition: sdfm_drv.h:273
SDFM_GpioParams::clr_val_addr
volatile uint32_t clr_val_addr
Definition: sdfm_drv.h:212
SDFM_Cfg::fd_one_min
volatile uint8_t fd_one_min
Definition: sdfm_drv.h:301
SDFM_ChCtrl::clock_phase_delay
volatile uint16_t clock_phase_delay
Definition: sdfm_drv.h:232
SDFM_CfgIep::cnt_epwm_prd
volatile uint32_t cnt_epwm_prd
Definition: sdfm_drv.h:198
SDFM_ThresholdParms
Structure defining SDFM thresholds parametrs.
Definition: sdfm_drv.h:259
SDFM::pruId
uint8_t pruId
Definition: sdfm_drv.h:357
SDFM_CfgTrigger::en_continuous_mode
volatile uint8_t en_continuous_mode
Definition: sdfm_drv.h:175
SDFM_Cfg::fd_zero_min
volatile uint8_t fd_zero_min
Definition: sdfm_drv.h:297
SDFM_CfgTrigger::second_samp_trig_time
volatile uint32_t second_samp_trig_time
Definition: sdfm_drv.h:181
SDFM::sampleOutputInterface
SDFM_SampleOutInterface * sampleOutputInterface
Definition: sdfm_drv.h:363
SDFM_GpioParams::set_val_addr
volatile uint32_t set_val_addr
Definition: sdfm_drv.h:211
SDFM::p_sdfm_interface
SDFM_Interface * p_sdfm_interface
Definition: sdfm_drv.h:362
SDFM_ClkSourceParms::clk_inv
volatile uint8_t clk_inv
Definition: sdfm_drv.h:249
SDFM_Interface::sdfm_ch_ctrl
SDFM_ChCtrl sdfm_ch_ctrl
Definition: sdfm_drv.h:333
SDFM_Interface
Definition: sdfm_drv.h:325
SDFM_Cfg::fd_window
volatile uint8_t fd_window
Definition: sdfm_drv.h:293
SDFM_Cfg::filter_type
volatile uint8_t filter_type
Definition: sdfm_drv.h:287
SDFM_ThresholdParms::zeroCrossEn
volatile uint8_t zeroCrossEn
Definition: sdfm_drv.h:269
sdfm_api.h
SDFM_CfgIep
Structure defining SDFM IEP configuration.
Definition: sdfm_drv.h:193
SDFM_CfgSdClk::sd_prd_clocks
volatile uint8_t sd_prd_clocks
Definition: sdfm_drv.h:159
SDFM_CfgTrigger::first_samp_trig_time
volatile uint32_t first_samp_trig_time
Definition: sdfm_drv.h:179
SDFM_Ctrl::sdfm_en
volatile uint8_t sdfm_en
Definition: sdfm_drv.h:318
SDFM_CfgSdClk
Structure defining SDFM clock configuration parameters.
Definition: sdfm_drv.h:157
SDFM_ThresholdParms::zeroCrossThstatus
volatile uint8_t zeroCrossThstatus
Definition: sdfm_drv.h:271
SDFM_Cfg::sdfm_threshold_parms
SDFM_ThresholdParms sdfm_threshold_parms
Definition: sdfm_drv.h:291
SDFM_ClkSourceParms
Structure defining clk source for sdfm ch.
Definition: sdfm_drv.h:245
SDFM_CfgTrigger
Structure defining SDFM triggered mode trigger times.
Definition: sdfm_drv.h:173
SDFM_Ctrl
Structure defining SDFM control fields.
Definition: sdfm_drv.h:316
SDFM_CfgTrigger::nc_prd_iep_cnt
volatile uint32_t nc_prd_iep_cnt
Definition: sdfm_drv.h:183
SDFM::gPruIcssHandle
PRUICSS_Handle gPruIcssHandle
Definition: sdfm_drv.h:356
SDFM_Interface::sd_clk
SDFM_CfgSdClk sd_clk
Definition: sdfm_drv.h:331
SDFM_Interface::firmwareVersion
volatile uint64_t firmwareVersion
Definition: sdfm_drv.h:341
SDFM_Cfg::fd_zero_max
volatile uint8_t fd_zero_max
Definition: sdfm_drv.h:295
SDFM_ChCtrl::enFastDetect
volatile uint8_t enFastDetect
Definition: sdfm_drv.h:228
SDFM
Structure defining SDFM interface.
Definition: sdfm_drv.h:354
SDFM_ThresholdParms::high_threshold
volatile uint32_t high_threshold
Definition: sdfm_drv.h:261
SDFM_ChCtrl
Structure defining SDFM channel control fields.
Definition: sdfm_drv.h:222
SDFM_GpioParams::write_val
volatile uint32_t write_val
Definition: sdfm_drv.h:210
SDFM_ThresholdParms::low_threshold
volatile uint32_t low_threshold
Definition: sdfm_drv.h:263
SDFM_SampleOutInterface
Definition: sdfm_drv.h:345
SDFM_ClkSourceParms::clk_source
volatile uint32_t clk_source
Definition: sdfm_drv.h:247
NUM_CH_SUPPORTED_PER_AXIS
#define NUM_CH_SUPPORTED_PER_AXIS
Definition: sdfm_drv.h:120