AM243x Motor Control SDK  09.00.00
sdfm_drv.h
Go to the documentation of this file.
1 /*
2  * Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
3  *
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  *
9  * * Redistributions of source code must retain the above copyright
10  * notice, this list of conditions and the following disclaimer.
11  *
12  * * Redistributions in binary form must reproduce the above copyright
13  * notice, this list of conditions and the following disclaimer in the
14  * documentation and/or other materials provided with the
15  * distribution.
16  *
17  * * Neither the name of Texas Instruments Incorporated nor the names of
18  * its contributors may be used to endorse or promote products derived
19  * from this software without specific prior written permission.
20  *
21  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32  */
33 
34 #ifndef _SDFM_DRV_H_
35 #define _SDFM_DRV_H_
36 
37 #ifdef __cplusplus
38 extern "C" {
39 #endif
40 
41 #include <drivers/soc.h>
42 
43 
44 
45 /* ========================================================================== */
46 /* Macros */
47 /* ========================================================================== */
48 
49 
51 #define PRU_ICSSG_DRAM0_SLV_RAM ( CSL_PRU_ICSSG0_DRAM0_SLV_RAM_BASE )
52 #define PRU_ICSSG_DRAM1_SLV_RAM ( CSL_PRU_ICSSG0_DRAM1_SLV_RAM_BASE )
53 
55 #define DEF_SD_CH_CTRL_CH_EN ( 0 ) /* default all chs disabled */
56 #define BF_CH_EN_MASK ( 0x1 )
57 #define SDFM_CH_CTRL_CH_EN_BF_CH0_EN_SHIFT ( 0 )
58 #define SDFM_CH_CTRL_CH_EN_BF_CH0_EN_MASK ( BF_CH_EN_MASK << SDFM_CH_CTRL_CH_EN_BF_CH0_EN_SHIFT )
59 #define SDFM_CH_CTRL_CH_EN_BF_CH1_EN_SHIFT ( 1 )
60 #define SDFM_CH_CTRL_CH_EN_BF_CH1_EN_MASK ( BF_CH_EN_MASK << SDFM_CH_CTRL_CH_EN_BF_CH1_EN_SHIFT )
61 #define SDFM_CH_CTRL_CH_EN_BF_CH2_EN_SHIFT ( 2 )
62 #define SDFM_CH_CTRL_CH_EN_BF_CH2_EN_MASK ( BF_CH_EN_MASK << SDFM_CH_CTRL_CH_EN_BF_CH2_EN_SHIFT )
63 #define SDFM_CH_CTRL_CH_EN_BF_CH3_EN_SHIFT ( 3 )
64 #define SDFM_CH_CTRL_CH_EN_BF_CH3_EN_MASK ( BF_CH_EN_MASK << SDFM_CH_CTRL_CH_EN_BF_CH3_EN_SHIFT )
65 #define SDFM_CH_CTRL_CH_EN_BF_CH4_EN_SHIFT ( 4 )
66 #define SDFM_CH_CTRL_CH_EN_BF_CH4_EN_MASK ( BF_CH_EN_MASK << SDFM_CH_CTRL_CH_EN_BF_CH4_EN_SHIFT )
67 #define SDFM_CH_CTRL_CH_EN_BF_CH5_EN_SHIFT ( 5 )
68 #define SDFM_CH_CTRL_CH_EN_BF_CH5_EN_MASK ( BF_CH_EN_MASK << SDFM_CH_CTRL_CH_EN_BF_CH5_EN_SHIFT )
69 #define SDFM_CH_CTRL_CH_EN_BF_CH6_EN_SHIFT ( 6 )
70 #define SDFM_CH_CTRL_CH_EN_BF_CH6_EN_MASK ( BF_CH_EN_MASK << SDFM_CH_CTRL_CH_EN_BF_CH6_EN_SHIFT )
71 #define SDFM_CH_CTRL_CH_EN_BF_CH7_EN_SHIFT ( 7 )
72 #define SDFM_CH_CTRL_CH_EN_BF_CH7_EN_MASK ( BF_CH_EN_MASK << SDFM_CH_CTRL_CH_EN_BF_CH7_EN_SHIFT )
73 #define SDFM_CH_CTRL_CH_EN_BF_CH8_EN_SHIFT ( 8 )
74 #define SDFM_CH_CTRL_CH_EN_BF_CH8_EN_MASK ( BF_CH_EN_MASK << SDFM_CH_CTRL_CH_EN_BF_CH8_EN_SHIFT )
75 #define SDFM_CH_CTRL_CH_EN_BF_CH9_EN_SHIFT ( 9 )
76 #define SDFM_CH_CTRL_CH_EN_BF_CH9_EN_MASK ( BF_CH_EN_MASK << SDFM_CH_CTRL_CH_EN_BF_CH9_EN_SHIFT )
77 #define SDFM_CH_CTRL_CH_EN_SHIFT ( SDFM_CH_CTRL_CH_EN_BF_CH0_EN_SHIFT )
78 #define SDFM_CH_CTRL_CH_EN_MASK \
79  ( SDFM_CH_CTRL_CH_EN_BF_CH0_EN_MASK | \
80  SDFM_CH_CTRL_CH_EN_BF_CH1_EN_MASK | \
81  SDFM_CH_CTRL_CH_EN_BF_CH2_EN_MASK | \
82  SDFM_CH_CTRL_CH_EN_BF_CH3_EN_MASK | \
83  SDFM_CH_CTRL_CH_EN_BF_CH4_EN_MASK | \
84  SDFM_CH_CTRL_CH_EN_BF_CH5_EN_MASK | \
85  SDFM_CH_CTRL_CH_EN_BF_CH6_EN_MASK | \
86  SDFM_CH_CTRL_CH_EN_BF_CH7_EN_MASK | \
87  SDFM_CH_CTRL_CH_EN_BF_CH8_EN_MASK | \
88  SDFM_CH_CTRL_CH_EN_BF_CH9_EN_MASK )
89 
90 #define SDFM_MAIN_FILTER_MASK ( 1 )
91 #define SDFM_MAIN_FILTER_SHIFT ( 0 )
92 
93 #define SDFM_MAIN_INTERRUPT_MASK ( 1 )
94 #define SDFM_MAIN_INTERRUPT_SHIFT ( 1 )
95 
97 #define SDFM_RECFG_REINIT ( SDFM_RECFG_BF_RECFG_REINIT_MASK )
98 
99 #define SDFM_RECFG_CLK ( SDFM_RECFG_BF_RECFG_CLK_MASK )
100 
101 #define SDFM_RECFG_OSR ( SDFM_RECFG_BF_RECFG_OSR_MASK )
102 
103 #define SDFM_RECFG_TRIG_SAMP_TIME ( SDFM_RECFG_BF_RECFG_TRIG_SAMPLE_TIME_MASK )
104 
105 #define SDFM_RECFG_TRIG_SAMP_CNT ( SDFM_RECFG_BF_RECFG_TRIG_SAMPLE_CNT_MASK )
106 
107 #define SDFM_RECFG_CH_EN ( 1<<6 )
108 
109 #define SDFM_RECFG_FD ( SDFM_RECFG_BF_RECFG_FD_MASK )
110 
111 #define SDFM_RECFG_TRIG_OUT_SAMP_BUF ( SDFM_RECFG_BF_RECFG_TRIG_OUT_SAMP_BUF_MASK )
112 
113 #define IEP_DEFAULT_INC 0x1
114 
115 
116 /* SDFM output buffer size in 32-bit words */
117 
118 
119 #define ICSSG_SD_SAMP_CH_BUF_SZ ( 128 )
120 #define NUM_CH_SUPPORTED ( 3 )
121 
122 /* ========================================================================== */
123 /* Structures */
124 /* ========================================================================== */
125 
132 typedef struct SDFM_CfgSdClk_s
133 {
135  volatile uint8_t sd_prd_clocks;
137  volatile uint8_t sd_clk_inv;
138 } SDFM_CfgSdClk;
139 
148 typedef struct SDFM_CfgTrigger_s
149 {
151  volatile uint16_t en_double_nc_sampling;
153  volatile uint32_t first_samp_trig_time;
155  volatile uint32_t second_samp_trig_time;
157  volatile uint32_t nc_prd_iep_cnt;
159 
166 typedef struct SDFM_CfgIep_s
167 {
169  volatile uint8_t iep_inc_value;
170 
172  volatile uint32_t cnt_epwm_prd;
173 
174 }SDFM_CfgIep;
175 
176 
183 typedef struct SDFM_GpioParams_s{
184  volatile uint32_t write_val;
185  volatile uint32_t set_val_addr;
186  volatile uint32_t clr_val_addr;
188 
195 typedef struct SDFM_ChCtrl_s
196 {
198  volatile uint32_t sdfm_ch_id;
200  volatile uint16_t enable_comparator;
202  volatile uint16_t output_data_format;
204  volatile uint16_t reserved1;
206  volatile uint16_t reserved2;
207 
208 } SDFM_ChCtrl;
209 
216 typedef struct SDFM_ClkSourceParms_s
217 {
219  volatile uint32_t clk_source;
221  volatile uint8_t clk_inv;
223 
230 typedef struct SDFM_ThresholdParms_s
231 {
233  volatile uint32_t high_threshold;
235  volatile uint32_t low_threshold;
237  volatile uint32_t reserved3;
239 
246 typedef struct SDFM_Cfg_s
247 {
249  volatile uint8_t ch_id;
251  volatile uint8_t filter_type;
253  volatile uint8_t osr;
257  volatile uint32_t reserved1;
259  volatile uint8_t reserved2;
263  SDFM_GpioParams sdfm_gpio_params[3];
264 } SDFM_Cfg;
265 
273 typedef struct SDFM_Ctrl_s
274 {
276  volatile uint8_t sdfm_en;
278  volatile uint8_t sdfm_en_ack;
280  volatile uint8_t sdfm_pru_id;
281 } SDFM_Ctrl;
282 
283 typedef struct SDFM_Interface_s{
293  SDFM_Cfg sdfm_cfg_ptr[NUM_CH_SUPPORTED];
294  /*<sdfm time sampling interface pointer */
297  volatile uint32_t curr_out_samp_buf[NUM_CH_SUPPORTED];
299 
306 typedef struct SDFM_s {
308  uint8_t pru_id;
309  uint32_t sdfm_clock;
310  uint32_t iep_clock;
311  uint8_t iep_inc;
313 } SDFM;
314 
315 
316 #include "sdfm_api.h"
317 
318 #ifdef __cplusplus
319 }
320 #endif
321 
322 #endif
SDFM_ChCtrl::sdfm_ch_id
volatile uint32_t sdfm_ch_id
Definition: sdfm_drv.h:198
SDFM_CfgSdClk::sd_clk_inv
volatile uint8_t sd_clk_inv
Definition: sdfm_drv.h:137
SDFM_CfgIep::iep_inc_value
volatile uint8_t iep_inc_value
Definition: sdfm_drv.h:169
SDFM_Interface::sdfm_cfg_trigger
SDFM_CfgTrigger sdfm_cfg_trigger
Definition: sdfm_drv.h:295
SDFM_ChCtrl::reserved2
volatile uint16_t reserved2
Definition: sdfm_drv.h:206
SDFM::iep_clock
uint32_t iep_clock
Definition: sdfm_drv.h:310
SDFM_Cfg
Structure defining SDFM configuration interface.
Definition: sdfm_drv.h:247
SDFM_Cfg::ch_id
volatile uint8_t ch_id
Definition: sdfm_drv.h:249
SDFM_Interface::sdfm_cfg_iep_ptr
SDFM_CfgIep sdfm_cfg_iep_ptr
Definition: sdfm_drv.h:287
SDFM_Cfg::sdfm_clk_parms
SDFM_ClkSourceParms sdfm_clk_parms
Definition: sdfm_drv.h:261
SDFM_Cfg::reserved1
volatile uint32_t reserved1
Definition: sdfm_drv.h:257
SDFM_Interface::sdfm_ctrl
SDFM_Ctrl sdfm_ctrl
Definition: sdfm_drv.h:285
SDFM_ThresholdParms::reserved3
volatile uint32_t reserved3
Definition: sdfm_drv.h:237
SDFM_Ctrl::sdfm_pru_id
volatile uint8_t sdfm_pru_id
Definition: sdfm_drv.h:280
SDFM_ChCtrl::enable_comparator
volatile uint16_t enable_comparator
Definition: sdfm_drv.h:200
NUM_CH_SUPPORTED
#define NUM_CH_SUPPORTED
Definition: sdfm_drv.h:120
SDFM_Ctrl::sdfm_en_ack
volatile uint8_t sdfm_en_ack
Definition: sdfm_drv.h:278
SDFM::sdfm_clock
uint32_t sdfm_clock
Definition: sdfm_drv.h:309
SDFM_GpioParams
Structure defining SDFM base address and values to toggle GPIO pins.
Definition: sdfm_drv.h:183
SDFM_Cfg::osr
volatile uint8_t osr
Definition: sdfm_drv.h:253
SDFM_GpioParams::clr_val_addr
volatile uint32_t clr_val_addr
Definition: sdfm_drv.h:186
SDFM_CfgIep::cnt_epwm_prd
volatile uint32_t cnt_epwm_prd
Definition: sdfm_drv.h:172
SDFM_ThresholdParms
Structure defining SDFM thresholds parametrs.
Definition: sdfm_drv.h:231
SDFM_CfgTrigger::second_samp_trig_time
volatile uint32_t second_samp_trig_time
Definition: sdfm_drv.h:155
SDFM_GpioParams::set_val_addr
volatile uint32_t set_val_addr
Definition: sdfm_drv.h:185
SDFM::p_sdfm_interface
SDFM_Interface * p_sdfm_interface
Definition: sdfm_drv.h:312
SDFM_ClkSourceParms::clk_inv
volatile uint8_t clk_inv
Definition: sdfm_drv.h:221
SDFM_Interface::sdfm_ch_ctrl
SDFM_ChCtrl sdfm_ch_ctrl
Definition: sdfm_drv.h:291
SDFM::iep_inc
uint8_t iep_inc
Definition: sdfm_drv.h:311
SDFM_Interface
Definition: sdfm_drv.h:283
SDFM_Cfg::filter_type
volatile uint8_t filter_type
Definition: sdfm_drv.h:251
SDFM_Cfg::reserved2
volatile uint8_t reserved2
Definition: sdfm_drv.h:259
sdfm_api.h
SDFM_CfgIep
Structure defining SDFM IEP configuration.
Definition: sdfm_drv.h:167
SDFM_CfgSdClk::sd_prd_clocks
volatile uint8_t sd_prd_clocks
Definition: sdfm_drv.h:135
SDFM_CfgTrigger::first_samp_trig_time
volatile uint32_t first_samp_trig_time
Definition: sdfm_drv.h:153
SDFM_Ctrl::sdfm_en
volatile uint8_t sdfm_en
Definition: sdfm_drv.h:276
SDFM_CfgSdClk
Structure defining SDFM clock configuration parameters.
Definition: sdfm_drv.h:133
SDFM_Cfg::sdfm_threshold_parms
SDFM_ThresholdParms sdfm_threshold_parms
Definition: sdfm_drv.h:255
SDFM_ChCtrl::reserved1
volatile uint16_t reserved1
Definition: sdfm_drv.h:204
SDFM_ClkSourceParms
Structure defining clk source for sdfm ch.
Definition: sdfm_drv.h:217
SDFM_CfgTrigger
Structure defining SDFM triggered mode trigger times.
Definition: sdfm_drv.h:149
SDFM_CfgTrigger::en_double_nc_sampling
volatile uint16_t en_double_nc_sampling
Definition: sdfm_drv.h:151
SDFM_Ctrl
Structure defining SDFM control fields.
Definition: sdfm_drv.h:274
SDFM_CfgTrigger::nc_prd_iep_cnt
volatile uint32_t nc_prd_iep_cnt
Definition: sdfm_drv.h:157
SDFM_Interface::sd_clk
SDFM_CfgSdClk sd_clk
Definition: sdfm_drv.h:289
SDFM::pru_id
uint8_t pru_id
Definition: sdfm_drv.h:308
SDFM_ChCtrl::output_data_format
volatile uint16_t output_data_format
Definition: sdfm_drv.h:202
SDFM
Structure defining SDFM interface.
Definition: sdfm_drv.h:306
SDFM_ThresholdParms::high_threshold
volatile uint32_t high_threshold
Definition: sdfm_drv.h:233
SDFM_ChCtrl
Structure defining SDFM channel control fields.
Definition: sdfm_drv.h:196
SDFM_GpioParams::write_val
volatile uint32_t write_val
Definition: sdfm_drv.h:184
SDFM_ThresholdParms::low_threshold
volatile uint32_t low_threshold
Definition: sdfm_drv.h:235
SDFM_ClkSourceParms::clk_source
volatile uint32_t clk_source
Definition: sdfm_drv.h:219