Structure defining SDFM clock configuration parameters.
Firmware SD clock configuration interface exposed through PRU data
memory - used by driver to configure firmware parameters
Data Fields | |
volatile uint8_t | sd_prd_clocks |
volatile uint8_t | sd_clk_inv |
volatile uint8_t SDFM_CfgSdClk::sd_prd_clocks |
< clock count to generate SD clock (eCAP PWM) with desired frequency
invert SD clock post clock selection mux
volatile uint8_t SDFM_CfgSdClk::sd_clk_inv |