2. Memory blocks available¶
The following table lists the memories available in the device and their accessibility across cores. Please check the device datasheet for the actual size of the memories.
Memory |
C28x |
CLA |
CM |
Notes |
|---|---|---|---|---|
Mx/Dx RAM
|
Y
|
N
|
N
|
Each CPU subsystem has dedicated RAM blocks.
|
LSx RAM
|
Y
|
Y
|
N
|
Each CPU subsystem has dedicated RAM blocks.
Can be used as CLA data/program memory.
|
GSx RAM
|
Y
|
N
|
N
|
Shared between C28x1 and C28x2.
Shared with DMA on each of the CPU subsystem.
|
Cx RAM
|
N
|
N
|
Y
|
|
Sx/Ex RAM
|
N
|
N
|
Y
|
Shared with UDMA on CM subsystem.
|
CPUx-CPUx MSG RAM
|
Y
|
N
|
N
|
Separate RAM blocks for CPU1 to CPU2 and
CPU2 to CPU1 communication.
|
CPUx-CM MSG RAM
|
Y
|
N
|
Y
|
Separate RAM blocks for CPUx to CM and
CM to CPUx communication.
|
CLA Message RAM
|
Y
|
Y
|
N
|
Each CPU subsystem has dedicated RAM blocks.
Separate RAM blocks for CPU to CLA and
CLA to CPU communication.
|
CLA-DMA Message RAM
|
N
|
Y
|
N
|
Each CPU subsystem has dedicated RAM blocks.
Separate RAM blocks for CLA to DMA and
DMA to CLA communication.
|
Flash
|
Y
|
N
|
Y
|
CPU1, CPU2 and CM has dedicated flash memory
blocks.
|