xWRL6432 MMWAVE-L-SDK  05.05.00.00
hwa/v0/hwa.h
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1 /*
2  * Copyright (C) 2021 Texas Instruments Incorporated
3  *
4  * Redistribution and use in source and binary forms, with or without
5  * modification, are permitted provided that the following conditions
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9  * notice, this list of conditions and the following disclaimer.
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12  * notice, this list of conditions and the following disclaimer in the
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14  * distribution.
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18  * from this software without specific prior written permission.
19  *
20  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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33 
67 #ifndef HWA_H_
68 #define HWA_H_
69 
70 /* ========================================================================== */
71 /* Include Files */
72 /* ========================================================================== */
73 
74 #include <stdint.h>
75 #include <stddef.h>
76 #include <stdbool.h>
77 #include <drivers/hw_include/csl_complex_math_types.h>
78 #include <kernel/dpl/HwiP.h>
79 #include <kernel/nortos/dpl/m4/HwiP_armv7m.h>
80 #include <drivers/hw_include/cslr_hwa.h>
81 
82 #ifdef __cplusplus
83 extern "C" {
84 #endif
85 
86 /* ========================================================================== */
87 /* Macros & Typedefs */
88 /* ========================================================================== */
89 
90 #define HWA_RAM_WINDOW_SIZE_IN_BYTES (1024U*4U)
93 #define HWADRV_ADDR_TRANSLATE_CPU_TO_HWA(x) (uint32_t)((uint32_t)(x) & 0x000FFFFFU)
94 
102 #define HWA_ERRNO_BASE (-2800)
103 
104 #define HWA_EINVAL (HWA_ERRNO_BASE-1)
105 
106 #define HWA_ENOINIT (HWA_ERRNO_BASE-2)
107 
108 #define HWA_EOUTOFRANGE (HWA_ERRNO_BASE-3)
109 
110 #define HWA_EOUTOFMEM (HWA_ERRNO_BASE-4)
111 
112 #define HWA_ENOTSUPP (HWA_ERRNO_BASE-5)
113 
114 #define HWA_EINUSE (HWA_ERRNO_BASE-6)
115 
116 #define HWA_ENOTALIGNED (HWA_ERRNO_BASE-7)
117 
118 #define HWA_EINVAL_COMMON_REGISTER_PARAMSET (HWA_ERRNO_BASE-8)
119 
120 #define HWA_EINVAL_COMMON_REGISTER_PARAMSET_ALT (HWA_ERRNO_BASE-9)
121 
122 #define HWA_EINVAL_COMMON_REGISTER_FFTCONFIG (HWA_ERRNO_BASE-10)
123 
124 #define HWA_EINVAL_COMMON_REGISTER_DCEST (HWA_ERRNO_BASE-11)
125 
126 #define HWA_EINVAL_COMMON_REGISTER_CFAR (HWA_ERRNO_BASE-12)
127 
128 #define HWA_EINVAL_COMMON_REGISTER_INTERFERENCE (HWA_ERRNO_BASE-13)
129 
130 #define HWA_EINVAL_COMMON_REGISTER_COMPLEXMULT (HWA_ERRNO_BASE-14)
131 
132 #define HWA_EINVAL_COMMON_REGISTER_CHANCOMB (HWA_ERRNO_BASE-15)
133 
134 #define HWA_EINVAL_COMMON_REGISTER_ZEROINSERT (HWA_ERRNO_BASE-16)
135 
136 #define HWA_EINVAL_COMMON_REGISTER_ADVSTAT (HWA_ERRNO_BASE-17)
137 
138 #define HWA_EINVAL_COMMON_REGISTER_COMPRESS (HWA_ERRNO_BASE-18)
139 
140 #define HWA_EINVAL_COMMON_REGISTER_LOCALMAXIMUM (HWA_ERRNO_BASE-19)
141 
142 #define HWA_EINVAL_PARAMSET_GENERALCONFIG (HWA_ERRNO_BASE - 20)
143 
144 #define HWA_EINVAL_PARAMSET_SOURCE (HWA_ERRNO_BASE - 21)
145 
146 #define HWA_EINVAL_PARAMSET_DEST (HWA_ERRNO_BASE - 22)
147 
148 #define HWA_EINVAL_PARAMSET_SRCDST_ADDRESS (HWA_ERRNO_BASE - 23)
149 
150 #define HWA_EINVAL_PARAMSET_FFTMODE_GENERALCONFIG (HWA_ERRNO_BASE - 24)
151 
152 #define HWA_EINVAL_PARAMSET_FFTMODE_SIZE (HWA_ERRNO_BASE - 25)
153 
154 #define HWA_EINVAL_PARAMSET_FFTMODE_POSTPROC (HWA_ERRNO_BASE - 26)
155 
156 #define HWA_EINVAL_PARAMSET_FFTMODE_PREPROC (HWA_ERRNO_BASE - 27)
157 
158 #define HWA_EINVAL_PARAMSET_FFTMODE_PREPROC_INTERF (HWA_ERRNO_BASE - 28)
159 
160 #define HWA_EINVAL_PARAMSET_FFTMODE_PREPROC_COMPLEXMULT (HWA_ERRNO_BASE - 29)
161 
162 #define HWA_EINVAL_PARAMSET_CFARMODE_GENERALCONFIG (HWA_ERRNO_BASE - 30)
163 
164 #define HWA_EINVAL_PARAMSET_CFARMODE_OSCONFIG (HWA_ERRNO_BASE - 31)
165 
166 #define HWA_EINVAL_PARAMSET_CFARMODE_CACONFIG (HWA_ERRNO_BASE - 32)
167 
168 #define HWA_EINVAL_PARAMSET_COMPRESSMODE (HWA_ERRNO_BASE - 33)
169 
170 #define HWA_EINVAL_PARAMSET_LOCALMAXMODE (HWA_ERRNO_BASE - 34)
171 
172 #define HWA_PARAMSET_POLLINGNOTALLOWED (HWA_ERRNO_BASE - 35)
173 
176 #define HWA_NUM_RXCHANNELS (12U)
177 
178 #define HWA_NUM_INTERFMITG_WINARRAY (5U)
179 
180 #define HWA_BPMPATTERN_LENGTH_INWORDS (8U)
181 
182 #define HWA_CHANCOMB_LENGTH_INWORDS (8U)
183 
184 #define HWA_ZEROINSERT_LENGTH_INWORDS (8U)
185 
186 #define HWA_NUM_RAMS (3U)
187 
188 #define HWA_MAXNUM_LOOPS (4095U)
189 
190 #define HWA_CMP_K_ARR_LEN (8)
191 
205 #define HWA_DONE_INTERRUPT_PRIORITY (HwiP_MAX_PRIORITY - 1U)
206 
207 #define HWA_PARAMSETDONE_INTERRUPT1_PRIORITY (HwiP_MAX_PRIORITY - 1U)
208 
209 #define HWA_PARAMSETDONE_INTERRUPT2_PRIORITY (HwiP_MAX_PRIORITY - 1U)
210 
217 #define HWA_FEATURE_BIT_ENABLE ((uint8_t)1U)
218 #define HWA_FEATURE_BIT_DISABLE ((uint8_t)0U)
226 #define HWA_SAMPLES_WIDTH_16BIT ((uint8_t)0U)
227 #define HWA_SAMPLES_WIDTH_32BIT ((uint8_t)1U)
235 #define HWA_SAMPLES_FORMAT_COMPLEX ((uint8_t)0U)
236 #define HWA_SAMPLES_FORMAT_REAL ((uint8_t)1U)
244 #define HWA_SAMPLES_UNSIGNED ((uint8_t)0U)
245 #define HWA_SAMPLES_SIGNED ((uint8_t)1U)
253 #define HWA_FFT_WINDOW_NONSYMMETRIC ((uint8_t)0U)
254 #define HWA_FFT_WINDOW_SYMMETRIC ((uint8_t)1U)
266 #define HWA_FFT_WINDOW_INTERPOLATE_MODE_NONE ((uint8_t)0U)
267 #define HWA_FFT_WINDOW_INTERPOLATE_MODE_4K ((uint8_t)1U)
268 #define HWA_FFT_WINDOW_INTERPOLATE_MODE_2K ((uint8_t)2U)
276 #define HWA_FFT_MODE_MAGNITUDE_LOG2_DISABLED ((uint8_t)0U)
277 #define HWA_FFT_MODE_MAGNITUDE_ONLY_ENABLED ((uint8_t)2U)
278 #define HWA_FFT_MODE_MAGNITUDE_LOG2_ENABLED ((uint8_t)3U)
286 #define HWA_FFT_MODE_OUTPUT_DEFAULT ((uint8_t)0U)
287 #define HWA_FFT_MODE_OUTPUT_MAX_STATS ((uint8_t)2U)
288 #define HWA_FFT_MODE_OUTPUT_SUM_STATS ((uint8_t)3U)
296 #define HWA_NOISE_AVG_MODE_CFAR_CA ((uint8_t)0U)
297 #define HWA_NOISE_AVG_MODE_CFAR_CAGO ((uint8_t)1U)
298 #define HWA_NOISE_AVG_MODE_CFAR_CASO ((uint8_t)2U)
299 #define HWA_NOISE_AVG_MODE_CFAR_OS ((uint8_t)3U)
307 #define HWA_TRIG_MODE_IMMEDIATE ((uint8_t)0U)
308 #define HWA_TRIG_MODE_SOFTWARE ((uint8_t)1U)
309 #define HWA_TRIG_MODE_RESERVED1 ((uint8_t)2U)
310 #define HWA_TRIG_MODE_DMA ((uint8_t)3U)
311 #define HWA_TRIG_MODE_HARDWARE ((uint8_t)4U)
312 #define HWA_TRIG_MODE_RESERVED2 ((uint8_t)5U)
313 #define HWA_TRIG_MODE_RESERVED3 ((uint8_t)6U)
314 #define HWA_TRIG_MODE_M4CONTROL ((uint8_t)7U)
322 #define HWA_ACCELMODE_FFT ((uint8_t)0U)
323 #define HWA_ACCELMODE_CFAR ((uint8_t)1U)
324 #define HWA_ACCELMODE_COMPRESS ((uint8_t)2U)
325 #define HWA_ACCELMODE_NONE ((uint8_t)7U)
345 #define HWA_CFAR_OPER_MODE_LOG_INPUT_REAL 0U
346 #define HWA_CFAR_OPER_MODE_LOG_INPUT_COMPLEX 1U
347 #define HWA_CFAR_OPER_MODE_MAG_INPUT_REAL 2U
348 #define HWA_CFAR_OPER_MODE_MAG_INPUT_COMPLEX 3U
349 #define HWA_CFAR_OPER_MODE_MAG_SQR_INPUT_REAL 4U
350 #define HWA_CFAR_OPER_MODE_MAG_SQR_INPUT_COMPLEX 5U
368 #define HWA_CFAR_OUTPUT_MODE_I_nAVG_ALL_Q_CUT ((uint8_t)0U)
370 #define HWA_CFAR_OUTPUT_MODE_I_nAVG_ALL_Q_DET_FLAG ((uint8_t)1U)
372 #define HWA_CFAR_OUTPUT_MODE_I_PEAK_IDX_Q_NEIGHBOR_NOISE_VAL ((uint8_t)2U)
374 #define HWA_CFAR_OUTPUT_MODE_I_PEAK_IDX_Q_CUT ((uint8_t)3U)
390 #define HWA_CMP_DCMP_COMPRESS ((uint8_t)0U)
391 #define HWA_CMP_DCMP_DECOMPRESS ((uint8_t)1U) /*HWA_COMPRESS_MODE*/
393 
394 
405 #define HWA_COMPRESS_METHOD_EGE ((uint8_t)0U)
406 #define HWA_COMPRESS_METHOD_BFP ((uint8_t)1U) /*HWA_CMP_METHOD*/
408 
422 #define HWA_COMPRESS_PATHSELECT_BOTHPASSES ((uint8_t)3U) /*HWA_COMPRESS_PATHSELECT*/
424 
430 #define HWA_RAM_TYPE_WINDOW_RAM ((uint8_t)0U)
431 #define HWA_RAM_TYPE_INTERNAL_RAM ((uint8_t)1U) /*HWA_RAM_TYPE*/
433 
442 #define HWA_INTERFERENCE_ENABLE ((uint8_t)1U)
443 #define HWA_INTERFERENCE_DISABLE ((uint8_t)0U)
444 
456 #define HWA_INTERFERENCE_THRESH_MODE_MAG_OR_MAGDIFF ((uint8_t)0U)
457 #define HWA_INTERFERENCE_THRESH_MODE_MAG ((uint8_t)1U)
458 #define HWA_INTERFERENCE_THRESH_MODE_MAGDIFF ((uint8_t)2U)
459 #define HWA_INTERFERENCE_THRESH_MODE_MAG_AND_MAGDIFF ((uint8_t)3U)
460 
470 #define HWA_INTERFERENCE_THRESH_SELECT_USER_DEFINED ((uint8_t)0U)
471 #define HWA_INTERFERENCE_THRESH_SELECT_BUILTIN_SUM_STATS ((uint8_t)1U)
472 #define HWA_INTERFERENCE_THRESH_SELECT_BUILTIN ((uint8_t)2U)
473 
485 #define HWA_INTERFERENCE_STATS_RESET_HOLD ((uint8_t)0U)
486 #define HWA_INTERFERENCE_STATS_RESET_FREE_RUNNING ((uint8_t)1U)
487 #define HWA_INTERFERENCE_STATS_RESET_PER_CHIRP ((uint8_t)2U)
488 #define HWA_INTERFERENCE_STATS_RESET_PER_FRAME ((uint8_t)3U)
489 
496 #define HWA_ACCUMULATORREG_TYPE_DC ((uint8_t)0U)
497 #define HWA_ACCUMULATORREG_TYPE_INTERF_MAG ((uint8_t)1U)
498 #define HWA_ACCUMULATORREG_TYPE_INTERF_MAGDIFF ((uint8_t)2U)
499 #define HWA_ACCUMULATORREG_TYPE_INTERF ((uint8_t)3U)
507 #define HWA_INTERFERENCE_THRESHOLD_TYPE_MAG ((uint8_t)0U)
508 #define HWA_INTERFERENCE_THRESHOLD_TYPE_MAGDIFF ((uint8_t)1U)
518 #define HWA_PARAMDONE_INTERRUPT_TYPE_CPU ((uint8_t)1U)
519 #define HWA_PARAMDONE_INTERRUPT_TYPE_DMA ((uint8_t)2U)
528 #define HWA_COMMONCONFIG_MASK_NUMLOOPS 0x00000001U
529 #define HWA_COMMONCONFIG_MASK_PARAMSTARTIDX 0x00000002U
530 #define HWA_COMMONCONFIG_MASK_PARAMSTOPIDX 0x00000004U
531 #define HWA_COMMONCONFIG_MASK_FFT1DENABLE 0x00000008U
532 #define HWA_COMMONCONFIG_MASK_BPMRATE 0x00000010U
533 #define HWA_COMMONCONFIG_MASK_BPMPATTERN 0x00000020U
534 #define HWA_COMMONCONFIG_MASK_INTERFERENCETHRESHOLD 0x00000040
535 #define HWA_COMMONCONFIG_MASK_TWIDDITHERENABLE 0x00000080U
536 #define HWA_COMMONCONFIG_MASK_LFSRSEED 0x00000100U
537 #define HWA_COMMONCONFIG_MASK_FFTSUMDIV 0x00000200U
538 #define HWA_COMMONCONFIG_MASK_CFARTHRESHOLDSCALE 0x00000400U
539 #define HWA_COMMONCONFIG_MASK_I_CMULT_SCALE 0x00000800U
540 #define HWA_COMMONCONFIG_MASK_Q_CMULT_SCALE 0x00001000U
541 #define HWA_COMMONCONFIG_MASK_DCEST_SCALESHIFT 0x00002000U
542 #define HWA_COMMONCONFIG_MASK_DCSUB_SWVAL 0x00004000U
543 #define HWA_COMMONCONFIG_MASK_INTERFMAG_THRESHOLD 0x00008000U
544 #define HWA_COMMONCONFIG_MASK_INTERFMAGDIFF_THRESHOLD 0x00010000U
545 #define HWA_COMMONCONFIG_MASK_INTERFSUM_MAG 0x00020000U
546 #define HWA_COMMONCONFIG_MASK_INTERFSUM_MAGDIFF 0x00040000U
547 // #define HWA_COMMONCONFIG_MASK_COMPLEXMULT_SCALEARRAY ((uint64_t)0x00004000U)
550 // #define HWA_COMMONCONFIG_MASK_COMPLEXMULT_SCALECONST ((uint64_t)0x00008000U)
553 // #define HWA_COMMONCONFIG_MASK_INTERF_MITG_WINDOW_PARAM ((uint64_t)0x40000000U)
554 #define HWA_COMMONCONFIG_MASK_EGECOMRESS_KPARAM 0x000080000U
562 #define HWA_COMPLEX_MULTIPLY_MODE_DISABLE ((uint8_t)0U)
563 #define HWA_COMPLEX_MULTIPLY_MODE_FREQ_SHIFTER ((uint8_t)1U)
564 #define HWA_COMPLEX_MULTIPLY_MODE_SLOW_DFT ((uint8_t)2U)
565 #define HWA_COMPLEX_MULTIPLY_MODE_FFT_STITCHING ((uint8_t)3U)
566 #define HWA_COMPLEX_MULTIPLY_MODE_MAG_SQUARED ((uint8_t)4U)
567 #define HWA_COMPLEX_MULTIPLY_MODE_SCALAR_MULT ((uint8_t)5U)
568 #define HWA_COMPLEX_MULTIPLY_MODE_VECTOR_MULT ((uint8_t)6U)
569 #define HWA_COMPLEX_MULTIPLY_MODE_VECTOR_MULT_2 ((uint8_t)7U)
578 #define HWA_DCEST_INTERFSUM_RESET_MODE_NOUPDATE ((uint8_t)0U)
579 #define HWA_DCEST_INTERFSUM_RESET_MODE_SOFTWARERESET ((uint8_t)1U)
580 #define HWA_DCEST_INTERFSUM_RESET_MODE_PARAMRESET ((uint8_t)2U)
581 #define HWA_DCEST_INTERFSUM_RESET_MODE_PARAMRESET_ZEROLPCONT ((uint8_t)3U)
589 #define HWA_DCSUB_SELECT_DCSW ((uint8_t)0U)
590 #define HWA_DCSUB_SELECT_DCEST ((uint8_t)1U)
599 #define HWA_FFT_STITCHING_TWID_PATTERN_2K ((uint8_t)0U)
600 #define HWA_FFT_STITCHING_TWID_PATTERN_4K ((uint8_t)1U)
605 /* ========================================================================== */
606 /* Structures and Enums */
607 /* ========================================================================== */
608 
612 typedef void* HWA_Handle;
613 
620 typedef void (*HWA_ParamDone_IntHandlerFuncPTR)(uint32_t paramSet, void * arg);
621 
628 typedef void (*HWA_Done_IntHandlerFuncPTR)(void * arg);
629 
636 typedef struct HWA_Attrs_t {
637  uint32_t instanceNum;
638  volatile uint32_t ctrlBaseAddr;
639  volatile uint32_t paramBaseAddr;
640  volatile uint32_t ramBaseAddr;
641  volatile uint32_t dssBaseAddr;
642  uint32_t numHwaParamSets;
643  uint32_t intNumParamSet;
644  uint32_t intNumDone;
645  uint32_t numDmaChannels;
646  volatile uint32_t accelMemBaseAddr;
647  uint32_t accelMemSize;
651 } HWA_Attrs;
652 
659 typedef struct HWA_RAMAttrs_t
660 {
661  uint32_t ramBaseAddress;
662  uint32_t ramSizeInBytes;
663 } HWA_RAMAttrs;
664 
676 typedef struct HWA_SrcDMAConfig_t {
677  uint32_t srcAddr;
678  uint32_t destAddr;
679  uint16_t aCnt;
680  uint16_t bCnt;
681  uint16_t cCnt;
683 
690 typedef struct HWA_CommonConfig_t {
691  uint32_t configMask;
694  uint16_t numLoops;
697  uint8_t paramStartIdx;
700  uint8_t paramStopIdx;
704  struct {
705  uint8_t fft1DEnable;
711  uint16_t bpmRate;
714  uint32_t bpmPattern[2];
727  uint32_t lfsrSeed;
728  uint8_t fftSumDiv;
731  } fftConfig;
732 
733  struct {
734  uint16_t scale;
740  uint8_t shift;
745  } dcEstimateConfig;
746 
747  struct
748  {
749  int32_t swIVal[HWA_NUM_RXCHANNELS];
754  int32_t swQVal[HWA_NUM_RXCHANNELS];
758  } dcSubtractConfig;
759 
760 
761  struct {
762 
763  uint32_t thresholdMagSw[6U];
769  uint32_t thresholdMagDiffSw[6U];
777  uint8_t sumMagScale;
784  int8_t sumMagShift;
789  uint8_t sumMagDiffScale;
798  } interfConfig;
799 
800 
801  struct {
802 
803  int32_t Iscale[HWA_NUM_RXCHANNELS];
807  int32_t Qscale[HWA_NUM_RXCHANNELS];
819  uint8_t recWindowReset;
822  } complexMultiplyConfig;
823 
824 
825  struct {
832  } cfarConfig;
833 
834  struct {
835  uint32_t i_cmult_scale[6U];
838  uint32_t q_cmult_scale[6U];
841  } scalarMult;
842 
843  struct {
844  uint8_t EGEKparam[HWA_CMP_K_ARR_LEN];
846  } compressMode;
847 
849 
856 typedef struct HWA_SourceConfig_t {
857  uint16_t srcAddr;
862  uint16_t srcAcnt;
866  int16_t srcAIdx;
869  uint16_t srcBcnt;
871  int16_t srcBIdx;
875  uint16_t srcShift;
882  uint8_t srcRealComplex;
885  uint8_t srcWidth;
888  uint8_t srcSign;
894  uint8_t srcConjugate;
902  uint8_t srcScale;
911  uint8_t bpmEnable;
916  uint8_t bpmPhase;
920 
927 typedef struct HWA_DestConfig_t {
928  uint16_t dstAddr;
933  uint16_t dstAcnt;
937  int16_t dstAIdx;
940  int16_t dstBIdx;
944  uint8_t dstRealComplex;
947  uint8_t dstWidth;
950  uint8_t dstSign;
956  uint8_t dstConjugate;
964  uint8_t dstScale;
970  uint16_t dstSkipInit;
975 
982 typedef struct HWA_AccelModeFFT_t{
983  uint8_t fftEn;
988  uint8_t fftSize;
992  uint16_t butterflyScaling;
998  uint8_t interfZeroOutEn;
1003  uint8_t windowEn;
1006  uint16_t windowStart;
1011  uint8_t winSymm;
1020  uint8_t magLogEn;
1023  uint8_t fftOutMode;
1030 
1038 typedef struct HWA_AccelModeCompress_t{
1044  uint8_t method;
1048  uint8_t ditherEnable;
1051  uint8_t passSelect;
1054  uint8_t headerEnable;
1060  uint8_t scaleFactorBW;
1064  uint8_t BFPMantissaBW;
1067  uint8_t scaleFactor;
1074 
1081 typedef struct HWA_ComplexMultiply_t {
1082  uint8_t mode;
1085  union {
1086  uint16_t twidIncrement;
1091  struct {
1092  uint16_t startFreq;
1095  uint8_t freqIncrement;
1100  } dft;
1108  }cmpMulArgs;
1110 
1117 typedef struct HWA_PreProcessing_t {
1118 
1119  uint8_t dcEstResetMode;
1124  uint8_t dcSubEnable;
1128  uint8_t dcSubSelect;
1131  struct {
1136  uint8_t thresholdMode;
1145  } interfLocalize;
1146 
1147  struct {
1148  uint8_t resetMode;
1153  } interfStat;
1154 
1155  // struct {
1156 
1157  // uint8_t enable; /**< enable/disable interference mitigation path, see \ref HWA_FEATURE_BIT macros
1158  // for the correct values
1159  // sets the bits INTF_MITG_EN of register PRE_PROCESSING in paramset */
1160 
1161  // uint8_t countThreshold; /**< 5 bits value: the number of non-zero IIB within the hysteresis window
1162  // should exceed the threshold for the CUT to be considered to be affected
1163  // by interference. valid values are from 0 to 31.
1164  // sets the bits INTF_MITG_CNTTHRESH of the register PRE_PROCESSING in paramset */
1165 
1166  // uint8_t pathSelect; /**< see \ref HWA_INTERFMITIGATION_PATH_SELECT macros for the correct values, select
1167  // one of the three paths in the interference mitigation module
1168  // sets the bits INFT_MITG_PATH_SEL of register PRE_PROCESSING in paramset */
1169 
1170  // uint8_t leftHystOrder; /**< 4 bits value: the length of the IIB array considered on the left side of the CUT,
1171  // valid values from 0 to 15.
1172  // sets the bits INTF_MITG_LEFT_HYST_ORD of the register PRE_PROCESSING in paramset */
1173 
1174  // uint8_t rightHystOrder; /**< 4 bits value: he length of the IIB array considered on the right side of the CUT,
1175  // valid values from 0 to 15.
1176  // sets the bits INTF_MITG_RIGHT_HYST_ORD of the register PRE_PROCESSING in paramset */
1177 
1178  // } interfMitigation;
1179 
1180  // uint8_t chanCombEn; /**< enable/disable synthetic channel combining, see \ref HWA_FEATURE_BIT
1181  // macros for the correct values. if set into HWA_FEATURE_BIT_DISABLE to disable
1182  // the channel combining.
1183  // sets the bits CHANCOMB_EN of the register PREPROC in paramset */
1184 
1185  // uint8_t zeroInsertEn; /**< enable/disable zero-insertion, fill the zeros at arbitrary
1186  // locations in the A-dimension, prior to windowing and FFT, only applied to FFTSIZE
1187  // upto 256. see \ref HWA_FEATURE_BIT macros for the correct values
1188  // sets the bits ZEROINSERT_EN of register BFLYFFT in paramset */
1189 
1190  //HWA_ComplexMultiply complexMultiply; /**< Complex multiply related params used when \ref HWA_ParamConfig::accelMode
1191  // is not \ref HWA_ACCELMODE_CFAR */
1193 
1200 typedef struct HWA_AccelModeCFAR_t{
1211  uint8_t numGuardCells;
1213  uint8_t nAvgDivFactor;
1219  uint8_t nAvgMode;
1222  uint8_t operMode;
1224  uint8_t outputMode;
1227  uint8_t peakGroupEn;
1235  uint8_t cyclicModeEn;
1241 
1248 typedef struct HWA_ParamConfig_t {
1249  uint8_t triggerMode;
1251  uint8_t dmaTriggerSrc;
1255  uint8_t accelMode;
1261  union {
1265  }accelModeArgs;
1266 
1271 
1278 typedef struct HWA_InterruptConfig_t {
1285  struct {
1287  void *callbackArg;
1288  } cpu;
1289  struct {
1290  uint8_t dstChannel;
1292  } dma;
1294 
1301 typedef struct HWA_Stats_t {
1302  uint32_t maxValue;
1303  uint16_t maxIndex;
1304  uint8_t iSumMSB;
1305  uint8_t qSumMSB;
1306  uint32_t iSumLSB;
1307  uint32_t qSumLSB;
1308 } HWA_Stats;
1309 
1316 typedef struct HWA_DebugStats_t {
1322  uint16_t currentLoopCount;
1324  uint16_t dmaTrigStatus;
1326  uint8_t swTrigStatus;
1328 
1335 typedef struct HWA_MemInfo_t {
1336  uint32_t baseAddress;
1337  uint16_t bankSize;
1338  uint16_t numBanks;
1339 }HWA_MemInfo;
1340 
1345 typedef struct HWA_InterruptPriority_t {
1346 
1347  uint32_t backgroundDone;
1348  //TO DO: CLEAN uint32_t ALTDone; /**< \brief HWA interrupt priority for the ALT thread done */
1349  uint32_t paramsetDone1;
1350  uint32_t paramsetDone2;
1353 
1358 typedef struct HWA_OpenConfig_t {
1359 
1373 } HWA_OpenConfig;
1374  /* end of HWA_DRIVER_EXTERNAL_DATA_STRUCTURE*/
1376 
1377 /* ========================================================================== */
1378 /* Internal/Private Structure Declarations */
1379 /* ========================================================================== */
1380 
1389 typedef struct HWA_InterruptCtx_t {
1391  void *callbackArg;
1393 
1402 typedef struct HWA_DoneInterruptCtx_t {
1403  bool bIsEnabled;
1405  void *callbackArg;
1407 
1411 typedef struct HWA_Driver_t {
1415  uint32_t instanceNum;
1419  uint32_t refCnt;
1435 
1440 
1445 
1449  //TO DO: CLEAN HwiP_Object hwiHandleParamSetALT;
1450 
1454  //TO DO: CLEAN HwiP_Object hwiHandleDoneALT;
1455 
1456 
1460  HWA_InterruptCtx *interruptCtxParamSet; /*[NUM_HWA_PARAMSETS_PER_INSTANCE];*/
1461 
1466 
1471 } HWA_Object;
1472 
1474 extern HWA_Attrs gHwaAttrs[];
1478 extern HWA_Object gHwaObject[];
1480 extern HWA_Object *gHwaObjectPtr[];
1482 extern uint32_t gHwaConfigNum;
1483 
1484 /* ========================================================================== */
1485 /* Global Variables Declarations */
1486 /* ========================================================================== */
1487 
1488 /* None */
1489 
1490 /* ========================================================================== */
1491 /* Function Declarations */
1492 /* ========================================================================== */
1493 
1504 extern void HWA_init(void);
1505 
1509 extern void HWA_deinit(void);
1510 
1528 extern HWA_Handle HWA_open(uint32_t index, HWA_OpenConfig * hwaCfg, int32_t* errCode);
1529 
1541 extern int32_t HWA_close(HWA_Handle handle);
1542 
1554 extern int32_t HWA_reset(HWA_Handle handle);
1555 
1556 
1569 extern DSSHWACCRegs *HWA_getCommonCtrlAddr(HWA_Handle handle);
1570 
1585 extern DSSHWACCPARAMRegs *HWA_getParamSetAddr(HWA_Handle handle, uint8_t paramsetIdx);
1586 
1601 extern int32_t HWA_configCommon(HWA_Handle handle, HWA_CommonConfig *commonConfig);
1602 
1622 extern int32_t HWA_configParamSet(HWA_Handle handle, uint8_t paramsetIdx, HWA_ParamConfig *paramConfig, HWA_SrcDMAConfig *dmaConfig);
1623 
1646 extern int32_t HWA_getDMAconfig(HWA_Handle handle, uint8_t dmaTriggerSrc, HWA_SrcDMAConfig *dmaConfig);
1661 extern int32_t HWA_getCfarPeakCntRegAddress(HWA_Handle handle, uint32_t *peakCntAddr);
1662 
1663 
1683 extern int32_t HWA_configRam(HWA_Handle handle, uint8_t ramType, uint8_t *data, uint32_t dataSize, uint32_t startIdx);
1684 
1702 extern int32_t HWA_enableParamSetInterrupt(HWA_Handle handle, uint8_t paramsetIdx, HWA_InterruptConfig *intrConfig);
1703 
1704 
1720 extern int32_t HWA_enableDoneInterrupt(HWA_Handle handle, HWA_Done_IntHandlerFuncPTR callbackFn, void * callbackArg);
1721 
1737 extern int32_t HWA_disableParamSetInterrupt(HWA_Handle handle, uint8_t paramsetIdx, uint8_t interruptTypeFlag);
1738 
1750 extern int32_t HWA_disableDoneInterrupt(HWA_Handle handle);
1751 
1766 extern int32_t HWA_enable(HWA_Handle handle, uint8_t flagEnDis);
1767 
1768 
1783 extern int32_t HWA_setSoftwareTrigger(HWA_Handle handle);
1784 
1785 
1799 extern int32_t HWA_setDMA2ACCManualTrig(HWA_Handle handle, uint8_t idx);
1800 
1816 extern int32_t HWA_setSourceAddress(HWA_Handle handle, uint16_t paramIdx, uint32_t sourceAddress);
1817 
1836 extern int32_t HWA_readStatsReg(HWA_Handle handle, HWA_Stats *pStats, uint8_t numIter);
1837 
1855 extern int32_t HWA_readCFARPeakCountReg(HWA_Handle handle, uint8_t *pbuf, uint8_t size);
1856 
1871 extern int32_t HWA_readDebugReg(HWA_Handle handle, HWA_DebugStats *pStats);
1872 
1884 extern int32_t HWA_clearDebugReg(HWA_Handle handle);
1885 
1900 extern int32_t HWA_getHWAMemInfo(HWA_Handle handle, HWA_MemInfo *memInfo);
1901 
1919 extern int32_t HWA_getDMAChanIndex(HWA_Handle handle, uint8_t edmaChanId, uint8_t *hwaDestChan);
1920 
1936 extern int32_t HWA_getEDMAChanId(HWA_Handle handle, uint8_t hwaDMAdestChan);
1937 
1957 extern int32_t HWA_readDCEstimateReg(HWA_Handle handle, cmplx32ImRe_t *pbuf, uint8_t startIdx, uint8_t size);
1958 
1979 extern int32_t HWA_readIntfAccReg(HWA_Handle handle, uint64_t *accBuf, uint8_t type, uint8_t startIdx, uint8_t size);
1980 
1999 extern int32_t HWA_readDCAccReg(HWA_Handle handle, cmplx64ImRe_t *accbuf, uint8_t startIdx, uint8_t size);
2000 
2014 extern int32_t HWA_readInterfChirpCountReg(HWA_Handle handle, uint16_t *numInterfSamplesChirp);
2015 
2029 extern int32_t HWA_readInterfFrameCountReg(HWA_Handle handle, uint32_t *numInterfSamplesFrame);
2030 
2050 extern int32_t HWA_readInterfThreshReg(HWA_Handle handle, uint32_t *pbuf, uint8_t startIdx, uint8_t size, uint8_t type);
2051 
2065 int32_t HWA_softwareResetAccumulators(HWA_Handle handle, uint8_t accumulatortype);
2066  /* end of addgroup HWA_DRIVER_EXTERNAL_FUNCTION*/
2068 
2069 #ifdef __cplusplus
2070 }
2071 #endif
2072 
2073 #endif /* HWA_H_ */
2074 
2075 
HWA_disableDoneInterrupt
int32_t HWA_disableDoneInterrupt(HWA_Handle handle)
Function to disable the CPU interrupt after all programmed paramSets have been completed.
HWA_Object::interrupt1ParamSetMask
uint64_t interrupt1ParamSetMask
interrupt enable mask for background thread
Definition: hwa/v0/hwa.h:1465
HWA_Object::refCnt
uint32_t refCnt
HWA instance reference (open) count.
Definition: hwa/v0/hwa.h:1419
HWA_CommonConfig::sumMagDiffScale
uint8_t sumMagDiffScale
Definition: hwa/v0/hwa.h:789
HWA_SourceConfig
HWA Paramset Config for Input Formatter/Source block.
Definition: hwa/v0/hwa.h:856
HWA_SrcDMAConfig::destAddr
uint32_t destAddr
Definition: hwa/v0/hwa.h:678
HWA_readInterfThreshReg
int32_t HWA_readInterfThreshReg(HWA_Handle handle, uint32_t *pbuf, uint8_t startIdx, uint8_t size, uint8_t type)
Function to read the interference statistics INTF_LOC_THRESH_MAG_VAL or INTF_LOC_THRESH_MAG_VAL regis...
HWA_enable
int32_t HWA_enable(HWA_Handle handle, uint8_t flagEnDis)
Function to enable the state machine of the HWA. This should be called after paramset and RAM have be...
HWA_reset
int32_t HWA_reset(HWA_Handle handle)
Function to reset the internal state machine of the HWA.
HWA_AccelModeCFAR::numNoiseSamplesRight
uint8_t numNoiseSamplesRight
Definition: hwa/v0/hwa.h:1206
HWA_ComplexMultiply::startFreq
uint16_t startFreq
Definition: hwa/v0/hwa.h:1092
HWA_AccelModeCFAR::nAvgDivFactor
uint8_t nAvgDivFactor
Definition: hwa/v0/hwa.h:1213
HWA_Done_IntHandlerFuncPTR
void(* HWA_Done_IntHandlerFuncPTR)(void *arg)
HWA Interrupt callback function after all paramsets completion.
Definition: hwa/v0/hwa.h:628
HWA_AccelModeCFAR::peakGroupEn
uint8_t peakGroupEn
Definition: hwa/v0/hwa.h:1227
HWA_AccelModeFFT
HWA Paramset Config for FFT block.
Definition: hwa/v0/hwa.h:982
HWA_SourceConfig::srcConjugate
uint8_t srcConjugate
Definition: hwa/v0/hwa.h:894
HWA_setDMA2ACCManualTrig
int32_t HWA_setDMA2ACCManualTrig(HWA_Handle handle, uint8_t idx)
Function to manually trigger the execution of the state machine waiting on DMA via software.
HWA_CommonConfig::sumMagDiffShift
int8_t sumMagDiffShift
Definition: hwa/v0/hwa.h:794
HWA_Stats::maxIndex
uint16_t maxIndex
Definition: hwa/v0/hwa.h:1303
HWA_DestConfig::dstSkipInit
uint16_t dstSkipInit
Definition: hwa/v0/hwa.h:970
HWA_clearDebugReg
int32_t HWA_clearDebugReg(HWA_Handle handle)
Function to clear the debug registers (acc_trig_in_clr)
HWA_MemInfo
HWA Local memory Information.
Definition: hwa/v0/hwa.h:1335
HWA_ParamConfig::dmaTriggerSrc
uint8_t dmaTriggerSrc
Definition: hwa/v0/hwa.h:1251
HWA_Stats::iSumLSB
uint32_t iSumLSB
Definition: hwa/v0/hwa.h:1306
gHwaConfigNum
uint32_t gHwaConfigNum
Externally defined driver configuration array size.
HWA_SrcDMAConfig::srcAddr
uint32_t srcAddr
Definition: hwa/v0/hwa.h:677
HWA_open
HWA_Handle HWA_open(uint32_t index, HWA_OpenConfig *hwaCfg, int32_t *errCode)
Function to initialize HWA specified by the particular index value.
HWA_MemInfo::bankSize
uint16_t bankSize
Definition: hwa/v0/hwa.h:1337
HWA_SourceConfig::bpmEnable
uint8_t bpmEnable
Definition: hwa/v0/hwa.h:911
HWA_AccelModeCompress::passSelect
uint8_t passSelect
Definition: hwa/v0/hwa.h:1051
HWA_getDMAChanIndex
int32_t HWA_getDMAChanIndex(HWA_Handle handle, uint8_t edmaChanId, uint8_t *hwaDestChan)
Function to get the dma destination index with a given EDMA channel number This function assumes the ...
HWA_enableParamSetInterrupt
int32_t HWA_enableParamSetInterrupt(HWA_Handle handle, uint8_t paramsetIdx, HWA_InterruptConfig *intrConfig)
Function to enable the CPU and/or DMA interrupt after a paramSet completion. The CPU interrupt for ev...
HWA_enableDoneInterrupt
int32_t HWA_enableDoneInterrupt(HWA_Handle handle, HWA_Done_IntHandlerFuncPTR callbackFn, void *callbackArg)
Function to enable the CPU interrupt after all programmed paramSets have been completed in the backgr...
HWA_CommonConfig::shift
uint8_t shift
Definition: hwa/v0/hwa.h:740
HWA_InterruptPriority::backgroundDone
uint32_t backgroundDone
HWA interrupt priority for the background thread done.
Definition: hwa/v0/hwa.h:1347
HWA_AccelModeCompress::headerEnable
uint8_t headerEnable
Definition: hwa/v0/hwa.h:1054
HWA_ComplexMultiply
HWA Paramset Config for ComplexMultiply block.
Definition: hwa/v0/hwa.h:1081
HWA_ParamConfig::fftMode
HWA_AccelModeFFT fftMode
Definition: hwa/v0/hwa.h:1262
HWA_SourceConfig::srcWidth
uint8_t srcWidth
Definition: hwa/v0/hwa.h:885
HWA_PreProcessing::resetMode
uint8_t resetMode
Definition: hwa/v0/hwa.h:1148
HWA_Attrs::intNumDone
uint32_t intNumDone
Definition: hwa/v0/hwa.h:644
HWA_MemInfo::baseAddress
uint32_t baseAddress
Definition: hwa/v0/hwa.h:1336
HWA_AccelModeCFAR
HWA Paramset Config for CFAR block.
Definition: hwa/v0/hwa.h:1200
HWA_Attrs::numHwaParamSets
uint32_t numHwaParamSets
Definition: hwa/v0/hwa.h:642
HWA_InterruptConfig::dstChannel
uint8_t dstChannel
Definition: hwa/v0/hwa.h:1290
HWA_AccelModeCompress::method
uint8_t method
Definition: hwa/v0/hwa.h:1044
HWA_DestConfig::dstAddr
uint16_t dstAddr
Definition: hwa/v0/hwa.h:928
HWA_CommonConfig::numLoops
uint16_t numLoops
Definition: hwa/v0/hwa.h:694
HWA_DestConfig::dstConjugate
uint8_t dstConjugate
Definition: hwa/v0/hwa.h:956
HWA_InterruptPriority::paramsetDone1
uint32_t paramsetDone1
HWA interrupt priority for paramset done interrupt 1.
Definition: hwa/v0/hwa.h:1349
HWA_ComplexMultiply::freqIncrement
uint8_t freqIncrement
Definition: hwa/v0/hwa.h:1095
HWA_AccelModeCompress::compressDecompress
uint8_t compressDecompress
Definition: hwa/v0/hwa.h:1039
HWA_init
void HWA_init(void)
Function to initialize the HWA module.
gHwaAttrs
HWA_Attrs gHwaAttrs[]
Externally defined driver configuration array.
HWA_Attrs::ctrlBaseAddr
volatile uint32_t ctrlBaseAddr
Definition: hwa/v0/hwa.h:638
HWA_CMP_K_ARR_LEN
#define HWA_CMP_K_ARR_LEN
The length of EGE compression/decompression K-paramseters array.
Definition: hwa/v0/hwa.h:190
HWA_OpenConfig
HWA configuration structure, which describes the configuration information, needed for hwa handle ope...
Definition: hwa/v0/hwa.h:1358
HWA_Attrs::isConcurrentAccessAllowed
bool isConcurrentAccessAllowed
Definition: hwa/v0/hwa.h:648
HWA_InterruptConfig::interruptTypeFlag
uint8_t interruptTypeFlag
Definition: hwa/v0/hwa.h:1279
HWA_SrcDMAConfig::cCnt
uint16_t cCnt
Definition: hwa/v0/hwa.h:681
HWA_OpenConfig::interruptPriority
HWA_InterruptPriority interruptPriority
structure holds the HWA interrupt priorities. This structure is applicable for processors that suppor...
Definition: hwa/v0/hwa.h:1360
HWA_CommonConfig::paramStartIdx
uint8_t paramStartIdx
Definition: hwa/v0/hwa.h:697
HWA_DestConfig::dstWidth
uint8_t dstWidth
Definition: hwa/v0/hwa.h:947
HWA_CommonConfig::twidDitherEnable
uint8_t twidDitherEnable
Definition: hwa/v0/hwa.h:722
HWA_getCfarPeakCntRegAddress
int32_t HWA_getCfarPeakCntRegAddress(HWA_Handle handle, uint32_t *peakCntAddr)
Function to get the address of CFAR Peak Count register.
HWA_DebugStats::dfePingPongStatus
uint8_t dfePingPongStatus
Definition: hwa/v0/hwa.h:1325
HWA_PreProcessing::dcSubEnable
uint8_t dcSubEnable
Definition: hwa/v0/hwa.h:1124
HWA_getDMAconfig
int32_t HWA_getDMAconfig(HWA_Handle handle, uint8_t dmaTriggerSrc, HWA_SrcDMAConfig *dmaConfig)
Function to get the config to program the DMA for a given DMA Trigger channel. Application should use...
HWA_Object::paramSetMapInProgress
uint16_t paramSetMapInProgress
HWA paramset config is in progress [used as bitmap]. Protects Paramset register access in HWA_configP...
Definition: hwa/v0/hwa.h:1430
HWA_PreProcessing::thresholdEnable
uint8_t thresholdEnable
Definition: hwa/v0/hwa.h:1132
HWA_DebugStats
HWA Debug statistics.
Definition: hwa/v0/hwa.h:1316
HWA_readInterfFrameCountReg
int32_t HWA_readInterfFrameCountReg(HWA_Handle handle, uint32_t *numInterfSamplesFrame)
Function to read the number of samples that exceeded the threshold in a frame.
HWA_AccelModeCFAR::numNoiseSamplesLeft
uint8_t numNoiseSamplesLeft
Definition: hwa/v0/hwa.h:1201
HWA_Object::hwiHandleParamSet
HwiP_Object hwiHandleParamSet
Registered Interrupt Handler for each paramset completion.
Definition: hwa/v0/hwa.h:1439
HWA_Stats::qSumMSB
uint8_t qSumMSB
Definition: hwa/v0/hwa.h:1305
HWA_CommonConfig::fft1DEnable
uint8_t fft1DEnable
Definition: hwa/v0/hwa.h:705
HWA_close
int32_t HWA_close(HWA_Handle handle)
Function to close a HWA peripheral specified by the HWA handle.
HWA_ParamConfig::triggerMode
uint8_t triggerMode
Definition: hwa/v0/hwa.h:1249
HWA_CommonConfig::sumMagShift
int8_t sumMagShift
Definition: hwa/v0/hwa.h:784
HWA_DebugStats::currentParamSet
uint8_t currentParamSet
Definition: hwa/v0/hwa.h:1317
HWA_readCFARPeakCountReg
int32_t HWA_readCFARPeakCountReg(HWA_Handle handle, uint8_t *pbuf, uint8_t size)
Function to read the PEAKCNT register.
HWA_AccelModeCFAR::cyclicModeEn
uint8_t cyclicModeEn
Definition: hwa/v0/hwa.h:1235
HWA_DoneInterruptCtx::callbackArg
void * callbackArg
Definition: hwa/v0/hwa.h:1405
HWA_CommonConfig::paramStopIdx
uint8_t paramStopIdx
Definition: hwa/v0/hwa.h:700
HWA_AccelModeCompress::BFPMantissaBW
uint8_t BFPMantissaBW
Definition: hwa/v0/hwa.h:1064
HWA_InterruptConfig::callbackFn
HWA_ParamDone_IntHandlerFuncPTR callbackFn
Definition: hwa/v0/hwa.h:1286
HWA_PreProcessing::dcEstResetMode
uint8_t dcEstResetMode
Definition: hwa/v0/hwa.h:1119
HWA_getParamSetAddr
DSSHWACCPARAMRegs * HWA_getParamSetAddr(HWA_Handle handle, uint8_t paramsetIdx)
Function to returns the HWA paramSet base address.
HWA_readDCAccReg
int32_t HWA_readDCAccReg(HWA_Handle handle, cmplx64ImRe_t *accbuf, uint8_t startIdx, uint8_t size)
Function to read the DC estimation accumulator register,.
HWA_Attrs::accelMemBaseAddr
volatile uint32_t accelMemBaseAddr
Definition: hwa/v0/hwa.h:646
HWA_AccelModeFFT::butterflyScaling
uint16_t butterflyScaling
Definition: hwa/v0/hwa.h:992
HWA_getEDMAChanId
int32_t HWA_getEDMAChanId(HWA_Handle handle, uint8_t hwaDMAdestChan)
Function to get the edma EDMA channel number from a given HWA paramset destination channel....
HWA_SrcDMAConfig::aCnt
uint16_t aCnt
Definition: hwa/v0/hwa.h:679
HWA_Object::interruptCtxParamSet
HWA_InterruptCtx * interruptCtxParamSet
Registered Interrupt Handler for each paramset completion in the ALT thread.
Definition: hwa/v0/hwa.h:1460
HWA_AccelModeCFAR::nAvgMode
uint8_t nAvgMode
Definition: hwa/v0/hwa.h:1219
HWA_InterruptCtx::callbackFn
HWA_ParamDone_IntHandlerFuncPTR callbackFn
Definition: hwa/v0/hwa.h:1390
HWA_SourceConfig::srcBIdx
int16_t srcBIdx
Definition: hwa/v0/hwa.h:871
HWA_AccelModeFFT::fftEn
uint8_t fftEn
Definition: hwa/v0/hwa.h:983
HWA_DebugStats::dmaTrigStatus
uint16_t dmaTrigStatus
Definition: hwa/v0/hwa.h:1324
HWA_AccelModeCompress::scaleFactor
uint8_t scaleFactor
Definition: hwa/v0/hwa.h:1067
HWA_Object::hwiHandleDone
HwiP_Object hwiHandleDone
Registered Interrupt Handler for interrupt at the end of group of paramsets.
Definition: hwa/v0/hwa.h:1444
HWA_getCommonCtrlAddr
DSSHWACCRegs * HWA_getCommonCtrlAddr(HWA_Handle handle)
Function to returns the HWA common control base address.
HWA_Attrs::ramBaseAddr
volatile uint32_t ramBaseAddr
Definition: hwa/v0/hwa.h:640
HWA_AccelModeCompress::EGEKarrayLength
uint8_t EGEKarrayLength
Definition: hwa/v0/hwa.h:1070
gHwaRamCfg
HWA_RAMAttrs gHwaRamCfg[HWA_NUM_RAMS]
Externally defined driver RAM configuration array.
HWA_ParamConfig::cfarMode
HWA_AccelModeCFAR cfarMode
Definition: hwa/v0/hwa.h:1263
HWA_PreProcessing
HWA Paramset Config for pre-processing block.
Definition: hwa/v0/hwa.h:1117
HWA_RAMAttrs::ramSizeInBytes
uint32_t ramSizeInBytes
Definition: hwa/v0/hwa.h:662
HWA_SourceConfig::srcBcnt
uint16_t srcBcnt
Definition: hwa/v0/hwa.h:869
HWA_PreProcessing::dcSubSelect
uint8_t dcSubSelect
Definition: hwa/v0/hwa.h:1128
HWA_AccelModeCFAR::operMode
uint8_t operMode
Definition: hwa/v0/hwa.h:1222
HWA_AccelModeFFT::interfZeroOutEn
uint8_t interfZeroOutEn
Definition: hwa/v0/hwa.h:998
HWA_CommonConfig::interferenceThreshold
uint32_t interferenceThreshold
Definition: hwa/v0/hwa.h:717
HWA_CommonConfig::sumMagScale
uint8_t sumMagScale
Definition: hwa/v0/hwa.h:777
HWA_CommonConfig::fftSumDiv
uint8_t fftSumDiv
Definition: hwa/v0/hwa.h:728
HWA_configCommon
int32_t HWA_configCommon(HWA_Handle handle, HWA_CommonConfig *commonConfig)
Function to set the common HWA configuration parameters needed for the next operations/iterations/par...
HwiP.h
HWA_NUM_RXCHANNELS
#define HWA_NUM_RXCHANNELS
Number of RX channels in pre-processing block.
Definition: hwa/v0/hwa.h:176
HWA_CommonConfig::configMask
uint32_t configMask
Definition: hwa/v0/hwa.h:691
HWA_DebugStats::swTrigStatus
uint8_t swTrigStatus
Definition: hwa/v0/hwa.h:1326
HWA_Attrs::numDmaChannels
uint32_t numDmaChannels
Definition: hwa/v0/hwa.h:645
HWA_getHWAMemInfo
int32_t HWA_getHWAMemInfo(HWA_Handle handle, HWA_MemInfo *memInfo)
Function to get HWA processing Memory information including address, size and number of banks.
gHwaObject
HWA_Object gHwaObject[]
Externally defined driver object.
HWA_configRam
int32_t HWA_configRam(HWA_Handle handle, uint8_t ramType, uint8_t *data, uint32_t dataSize, uint32_t startIdx)
Function to set the HWA RAM : HWA_RAM_TYPE_WINDOW_RAM, HWA_RAM_TYPE_VECTORMULTIPLY_RAM,...
HWA_AccelModeFFT::winSymm
uint8_t winSymm
Definition: hwa/v0/hwa.h:1011
HWA_SourceConfig::srcSign
uint8_t srcSign
Definition: hwa/v0/hwa.h:888
HWA_InterruptPriority
HWA interrupt priority for HWA background thread done, ALT thread done, paramset done interrupt 1 and...
Definition: hwa/v0/hwa.h:1345
HWA_SourceConfig::srcScale
uint8_t srcScale
Definition: hwa/v0/hwa.h:902
HWA_ParamDone_IntHandlerFuncPTR
void(* HWA_ParamDone_IntHandlerFuncPTR)(uint32_t paramSet, void *arg)
HWA Interrupt callback function after every paramset completion.
Definition: hwa/v0/hwa.h:620
HWA_ParamConfig::compressMode
HWA_AccelModeCompress compressMode
Definition: hwa/v0/hwa.h:1264
HWA_AccelModeFFT::magLogEn
uint8_t magLogEn
Definition: hwa/v0/hwa.h:1020
HWA_Attrs::accelMemSize
uint32_t accelMemSize
Definition: hwa/v0/hwa.h:647
HWA_configParamSet
int32_t HWA_configParamSet(HWA_Handle handle, uint8_t paramsetIdx, HWA_ParamConfig *paramConfig, HWA_SrcDMAConfig *dmaConfig)
Function to set the HWA configuration parameters for a given paramSet.
HWA_SourceConfig::srcRealComplex
uint8_t srcRealComplex
Definition: hwa/v0/hwa.h:882
HWA_AccelModeCFAR::numGuardCells
uint8_t numGuardCells
Definition: hwa/v0/hwa.h:1211
HWA_InterruptConfig
HWA Interrupt Config.
Definition: hwa/v0/hwa.h:1278
HWA_ComplexMultiply::twidIncrement
uint16_t twidIncrement
Definition: hwa/v0/hwa.h:1086
HWA_Stats::iSumMSB
uint8_t iSumMSB
Definition: hwa/v0/hwa.h:1304
HWA_SrcDMAConfig
Source trigger DMA parameters.
Definition: hwa/v0/hwa.h:676
HWA_ComplexMultiply::mode
uint8_t mode
Definition: hwa/v0/hwa.h:1082
HWA_RAMAttrs::ramBaseAddress
uint32_t ramBaseAddress
Definition: hwa/v0/hwa.h:661
HWA_DoneInterruptCtx
HWA Interrupt context structure for done interrupt.
Definition: hwa/v0/hwa.h:1402
HWA_AccelModeFFT::fftOutMode
uint8_t fftOutMode
Definition: hwa/v0/hwa.h:1023
HWA_Attrs::paramBaseAddr
volatile uint32_t paramBaseAddr
Definition: hwa/v0/hwa.h:639
HWA_AccelModeFFT::windowStart
uint16_t windowStart
Definition: hwa/v0/hwa.h:1006
HWA_CommonConfig
HWA Common Config.
Definition: hwa/v0/hwa.h:690
HWA_ParamConfig::dest
HWA_DestConfig dest
Definition: hwa/v0/hwa.h:1260
HWA_Attrs::dssBaseAddr
volatile uint32_t dssBaseAddr
Definition: hwa/v0/hwa.h:641
HWA_InterruptCtx::callbackArg
void * callbackArg
Definition: hwa/v0/hwa.h:1391
HWA_DestConfig::dstSign
uint8_t dstSign
Definition: hwa/v0/hwa.h:950
HWA_CommonConfig::twiddleDeltaFrac
int16_t twiddleDeltaFrac
Definition: hwa/v0/hwa.h:811
HWA_disableParamSetInterrupt
int32_t HWA_disableParamSetInterrupt(HWA_Handle handle, uint8_t paramsetIdx, uint8_t interruptTypeFlag)
Function to disable the CPU and/or DMA interrupt after a paramSet completion.
HWA_Object::configInProgress
uint8_t configInProgress
HWA instance config is in progress. Protects Common register acccess in HWA_configCommon() and HWA_co...
Definition: hwa/v0/hwa.h:1424
HWA_CommonConfig::bpmRate
uint16_t bpmRate
Definition: hwa/v0/hwa.h:711
HWA_CommonConfig::cfarThresholdScale
uint32_t cfarThresholdScale
Definition: hwa/v0/hwa.h:826
HwiP_Object
Opaque Hwi object used with the Hwi APIs.
Definition: HwiP.h:91
HWA_CommonConfig::recWindowReset
uint8_t recWindowReset
Definition: hwa/v0/hwa.h:819
HWA_PreProcessing::thresholdSelect
uint8_t thresholdSelect
Definition: hwa/v0/hwa.h:1140
HWA_AccelModeFFT::winInterpolateMode
uint8_t winInterpolateMode
Definition: hwa/v0/hwa.h:1014
HWA_SourceConfig::srcShift
uint16_t srcShift
Definition: hwa/v0/hwa.h:875
HWA_DestConfig::dstAIdx
int16_t dstAIdx
Definition: hwa/v0/hwa.h:937
HWA_ParamConfig::preProcCfg
HWA_PreProcessing preProcCfg
Definition: hwa/v0/hwa.h:1269
HWA_ParamConfig
HWA Paramset Config.
Definition: hwa/v0/hwa.h:1248
HWA_InterruptPriority::paramsetDone2
uint32_t paramsetDone2
HWA interrupt priority for paramset done interrupt 2.
Definition: hwa/v0/hwa.h:1350
HWA_SourceConfig::srcAcnt
uint16_t srcAcnt
Definition: hwa/v0/hwa.h:862
HWA_readDCEstimateReg
int32_t HWA_readDCEstimateReg(HWA_Handle handle, cmplx32ImRe_t *pbuf, uint8_t startIdx, uint8_t size)
Function to read the DC_EST_I/Q register.
HWA_AccelModeCompress
HWA Paramset Config for Compression/Decompression block.
Definition: hwa/v0/hwa.h:1038
HWA_AccelModeCFAR::outputMode
uint8_t outputMode
Definition: hwa/v0/hwa.h:1224
HWA_InterruptConfig::callbackArg
void * callbackArg
Definition: hwa/v0/hwa.h:1287
HWA_ParamConfig::source
HWA_SourceConfig source
Definition: hwa/v0/hwa.h:1259
HWA_NUM_RAMS
#define HWA_NUM_RAMS
The number of RAM types in HWA.
Definition: hwa/v0/hwa.h:186
HWA_AccelModeCompress::ditherEnable
uint8_t ditherEnable
Definition: hwa/v0/hwa.h:1048
HWA_Object::interruptCtxDone
HWA_DoneInterruptCtx interruptCtxDone
interrupt context for all paramset done interrupt
Definition: hwa/v0/hwa.h:1470
HWA_DoneInterruptCtx::bIsEnabled
bool bIsEnabled
Definition: hwa/v0/hwa.h:1403
HWA_PreProcessing::thresholdMode
uint8_t thresholdMode
Definition: hwa/v0/hwa.h:1136
HWA_DestConfig::dstScale
uint8_t dstScale
Definition: hwa/v0/hwa.h:964
HWA_InterruptCtx
HWA Interrupt context structure for paramset done interrupt.
Definition: hwa/v0/hwa.h:1389
HWA_ComplexMultiply::twidFactorPattern
uint8_t twidFactorPattern
Definition: hwa/v0/hwa.h:1101
HWA_DestConfig::dstRealComplex
uint8_t dstRealComplex
Definition: hwa/v0/hwa.h:944
HWA_setSoftwareTrigger
int32_t HWA_setSoftwareTrigger(HWA_Handle handle)
Function to manually trigger the execution of the state machine via software, the software trigger th...
HWA_Attrs::intNumParamSet
uint32_t intNumParamSet
Definition: hwa/v0/hwa.h:643
HWA_Object::hwAttrs
HWA_Attrs const * hwAttrs
HWA Hardware related params.
Definition: hwa/v0/hwa.h:1434
HWA_AccelModeCompress::scaleFactorBW
uint8_t scaleFactorBW
Definition: hwa/v0/hwa.h:1060
HWA_SrcDMAConfig::bCnt
uint16_t bCnt
Definition: hwa/v0/hwa.h:680
HWA_ParamConfig::complexMultiply
HWA_ComplexMultiply complexMultiply
Definition: hwa/v0/hwa.h:1267
HWA_RAMAttrs
HWA RAM Parameters.
Definition: hwa/v0/hwa.h:660
HWA_readDebugReg
int32_t HWA_readDebugReg(HWA_Handle handle, HWA_DebugStats *pStats)
Function to read the debug registers (paramcurr, loopcou, acc_trig_in_stat)
HWA_CommonConfig::scale
uint16_t scale
Definition: hwa/v0/hwa.h:734
HWA_Attrs::instanceNum
uint32_t instanceNum
Definition: hwa/v0/hwa.h:637
HWA_DestConfig
HWA Paramset Config for Output Formatter/Destination block.
Definition: hwa/v0/hwa.h:927
HWA_Attrs::isCompressionEnginePresent
bool isCompressionEnginePresent
Definition: hwa/v0/hwa.h:650
HWA_readInterfChirpCountReg
int32_t HWA_readInterfChirpCountReg(HWA_Handle handle, uint16_t *numInterfSamplesChirp)
Function to read the number of samples that exceeded the threshold in a chirp.
HWA_Handle
void * HWA_Handle
A handle that is returned from a HWA_open() call.
Definition: hwa/v0/hwa.h:612
HWA_Object::instanceNum
uint32_t instanceNum
HWA instance number.
Definition: hwa/v0/hwa.h:1415
HWA_DoneInterruptCtx::callbackFn
HWA_Done_IntHandlerFuncPTR callbackFn
Definition: hwa/v0/hwa.h:1404
HWA_MemInfo::numBanks
uint16_t numBanks
Definition: hwa/v0/hwa.h:1338
HWA_SourceConfig::srcAddr
uint16_t srcAddr
Definition: hwa/v0/hwa.h:857
HWA_Stats
HWA Statistics from the STATISTICS block.
Definition: hwa/v0/hwa.h:1301
HWA_setSourceAddress
int32_t HWA_setSourceAddress(HWA_Handle handle, uint16_t paramIdx, uint32_t sourceAddress)
Function to set the source address for one paramset.
HWA_deinit
void HWA_deinit(void)
Function to deinitialize the HWA module.
HWA_SourceConfig::srcAIdx
int16_t srcAIdx
Definition: hwa/v0/hwa.h:866
HWA_readStatsReg
int32_t HWA_readStatsReg(HWA_Handle handle, HWA_Stats *pStats, uint8_t numIter)
Function to read the 4 sets of 'MAX' statistics register.
HWA_CommonConfig::lfsrSeed
uint32_t lfsrSeed
Definition: hwa/v0/hwa.h:727
HWA_DestConfig::dstBIdx
int16_t dstBIdx
Definition: hwa/v0/hwa.h:940
HWA_DestConfig::dstAcnt
uint16_t dstAcnt
Definition: hwa/v0/hwa.h:933
HWA_Stats::maxValue
uint32_t maxValue
Definition: hwa/v0/hwa.h:1302
HWA_SourceConfig::bpmPhase
uint8_t bpmPhase
Definition: hwa/v0/hwa.h:916
HWA_AccelModeFFT::fftSize
uint8_t fftSize
Definition: hwa/v0/hwa.h:988
HWA_ParamConfig::accelMode
uint8_t accelMode
Definition: hwa/v0/hwa.h:1255
HWA_Stats::qSumLSB
uint32_t qSumLSB
Definition: hwa/v0/hwa.h:1307
HWA_AccelModeFFT::windowEn
uint8_t windowEn
Definition: hwa/v0/hwa.h:1003
HWA_Object
HWA driver internal Config.
Definition: hwa/v0/hwa.h:1411
HWA_DebugStats::currentLoopCount
uint16_t currentLoopCount
Definition: hwa/v0/hwa.h:1322
HWA_Attrs
HWA H/W Parameters.
Definition: hwa/v0/hwa.h:636
HWA_readIntfAccReg
int32_t HWA_readIntfAccReg(HWA_Handle handle, uint64_t *accBuf, uint8_t type, uint8_t startIdx, uint8_t size)
Function to read the interference threshold MAG or MAGDIFF Accumulator register.
gHwaObjectPtr
HWA_Object * gHwaObjectPtr[]
Externally defined driver object pointer.
HWA_softwareResetAccumulators
int32_t HWA_softwareResetAccumulators(HWA_Handle handle, uint8_t accumulatortype)
Function for software to reset the DC accumulators or interference statistics accumulators.
HWA_SourceConfig::srcCircShiftWrap
uint8_t srcCircShiftWrap
Definition: hwa/v0/hwa.h:879