xWRL6432 MMWAVE-L-SDK  05.01.00.04
hwa/v0/hwa.h
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1 /*
2  * Copyright (C) 2021 Texas Instruments Incorporated
3  *
4  * Redistribution and use in source and binary forms, with or without
5  * modification, are permitted provided that the following conditions
6  * are met:
7  *
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9  * notice, this list of conditions and the following disclaimer.
10  *
11  * Redistributions in binary form must reproduce the above copyright
12  * notice, this list of conditions and the following disclaimer in the
13  * documentation and/or other materials provided with the
14  * distribution.
15  *
16  * Neither the name of Texas Instruments Incorporated nor the names of
17  * its contributors may be used to endorse or promote products derived
18  * from this software without specific prior written permission.
19  *
20  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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30  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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32  */
33 
67 #ifndef HWA_H_
68 #define HWA_H_
69 
70 /* ========================================================================== */
71 /* Include Files */
72 /* ========================================================================== */
73 
74 #include <stdint.h>
75 #include <stddef.h>
76 #include <stdbool.h>
77 #include <drivers/hw_include/csl_complex_math_types.h>
78 #include <kernel/dpl/HwiP.h>
79 #include <drivers/hw_include/cslr_hwa.h>
80 
81 #ifdef __cplusplus
82 extern "C" {
83 #endif
84 
85 /* ========================================================================== */
86 /* Macros & Typedefs */
87 /* ========================================================================== */
88 
89 #define HWA_RAM_WINDOW_SIZE_IN_BYTES 1024*4
92 #define HWADRV_ADDR_TRANSLATE_CPU_TO_HWA(x) (uint32_t)((uint32_t)(x) & 0x000FFFFFU)
93 
101 #define HWA_ERRNO_BASE (-2800)
102 
103 #define HWA_EINVAL (HWA_ERRNO_BASE-1)
104 
105 #define HWA_ENOINIT (HWA_ERRNO_BASE-2)
106 
107 #define HWA_EOUTOFRANGE (HWA_ERRNO_BASE-3)
108 
109 #define HWA_EOUTOFMEM (HWA_ERRNO_BASE-4)
110 
111 #define HWA_ENOTSUPP (HWA_ERRNO_BASE-5)
112 
113 #define HWA_EINUSE (HWA_ERRNO_BASE-6)
114 
115 #define HWA_ENOTALIGNED (HWA_ERRNO_BASE-7)
116 
117 #define HWA_EINVAL_COMMON_REGISTER_PARAMSET (HWA_ERRNO_BASE-8)
118 
119 #define HWA_EINVAL_COMMON_REGISTER_PARAMSET_ALT (HWA_ERRNO_BASE-9)
120 
121 #define HWA_EINVAL_COMMON_REGISTER_FFTCONFIG (HWA_ERRNO_BASE-10)
122 
123 #define HWA_EINVAL_COMMON_REGISTER_DCEST (HWA_ERRNO_BASE-11)
124 
125 #define HWA_EINVAL_COMMON_REGISTER_CFAR (HWA_ERRNO_BASE-12)
126 
127 #define HWA_EINVAL_COMMON_REGISTER_INTERFERENCE (HWA_ERRNO_BASE-13)
128 
129 #define HWA_EINVAL_COMMON_REGISTER_COMPLEXMULT (HWA_ERRNO_BASE-14)
130 
131 #define HWA_EINVAL_COMMON_REGISTER_CHANCOMB (HWA_ERRNO_BASE-15)
132 
133 #define HWA_EINVAL_COMMON_REGISTER_ZEROINSERT (HWA_ERRNO_BASE-16)
134 
135 #define HWA_EINVAL_COMMON_REGISTER_ADVSTAT (HWA_ERRNO_BASE-17)
136 
137 #define HWA_EINVAL_COMMON_REGISTER_COMPRESS (HWA_ERRNO_BASE-18)
138 
139 #define HWA_EINVAL_COMMON_REGISTER_LOCALMAXIMUM (HWA_ERRNO_BASE-19)
140 
141 #define HWA_EINVAL_PARAMSET_GENERALCONFIG (HWA_ERRNO_BASE - 20)
142 
143 #define HWA_EINVAL_PARAMSET_SOURCE (HWA_ERRNO_BASE - 21)
144 
145 #define HWA_EINVAL_PARAMSET_DEST (HWA_ERRNO_BASE - 22)
146 
147 #define HWA_EINVAL_PARAMSET_SRCDST_ADDRESS (HWA_ERRNO_BASE - 23)
148 
149 #define HWA_EINVAL_PARAMSET_FFTMODE_GENERALCONFIG (HWA_ERRNO_BASE - 24)
150 
151 #define HWA_EINVAL_PARAMSET_FFTMODE_SIZE (HWA_ERRNO_BASE - 25)
152 
153 #define HWA_EINVAL_PARAMSET_FFTMODE_POSTPROC (HWA_ERRNO_BASE - 26)
154 
155 #define HWA_EINVAL_PARAMSET_FFTMODE_PREPROC (HWA_ERRNO_BASE - 27)
156 
157 #define HWA_EINVAL_PARAMSET_FFTMODE_PREPROC_INTERF (HWA_ERRNO_BASE - 28)
158 
159 #define HWA_EINVAL_PARAMSET_FFTMODE_PREPROC_COMPLEXMULT (HWA_ERRNO_BASE - 29)
160 
161 #define HWA_EINVAL_PARAMSET_CFARMODE_GENERALCONFIG (HWA_ERRNO_BASE - 30)
162 
163 #define HWA_EINVAL_PARAMSET_CFARMODE_OSCONFIG (HWA_ERRNO_BASE - 31)
164 
165 #define HWA_EINVAL_PARAMSET_CFARMODE_CACONFIG (HWA_ERRNO_BASE - 32)
166 
167 #define HWA_EINVAL_PARAMSET_COMPRESSMODE (HWA_ERRNO_BASE - 33)
168 
169 #define HWA_EINVAL_PARAMSET_LOCALMAXMODE (HWA_ERRNO_BASE - 34)
170 
171 #define HWA_PARAMSET_POLLINGNOTALLOWED (HWA_ERRNO_BASE - 35)
172 
175 #define HWA_NUM_RXCHANNELS (12U)
176 
177 #define HWA_NUM_INTERFMITG_WINARRAY (5U)
178 
179 #define HWA_BPMPATTERN_LENGTH_INWORDS (8U)
180 
181 #define HWA_CHANCOMB_LENGTH_INWORDS (8U)
182 
183 #define HWA_ZEROINSERT_LENGTH_INWORDS (8U)
184 
185 #define HWA_NUM_RAMS (3U)
186 
187 #define HWA_MAXNUM_LOOPS (4095U)
188 
189 #define HWA_CMP_K_ARR_LEN (8U)
190 
204 #define HWA_DONE_INTERRUPT_PRIORITY (1U)
205 
206 //TO DO: CLEAN #define HWA_ALTDONE_INTERRUPT_PRIORITY (1U)
208 #define HWA_PARAMSETDONE_INTERRUPT1_PRIORITY (1U)
209 
210 #define HWA_PARAMSETDONE_INTERRUPT2_PRIORITY (1U)
211 
218 #define HWA_FEATURE_BIT_ENABLE ((uint8_t)1U)
219 #define HWA_FEATURE_BIT_DISABLE ((uint8_t)0U)
227 #define HWA_SAMPLES_WIDTH_16BIT ((uint8_t)0U)
228 #define HWA_SAMPLES_WIDTH_32BIT ((uint8_t)1U)
236 #define HWA_SAMPLES_FORMAT_COMPLEX ((uint8_t)0U)
237 #define HWA_SAMPLES_FORMAT_REAL ((uint8_t)1U)
245 #define HWA_SAMPLES_UNSIGNED ((uint8_t)0U)
246 #define HWA_SAMPLES_SIGNED ((uint8_t)1U)
254 #define HWA_FFT_WINDOW_NONSYMMETRIC ((uint8_t)0U)
255 #define HWA_FFT_WINDOW_SYMMETRIC ((uint8_t)1U)
267 #define HWA_FFT_WINDOW_INTERPOLATE_MODE_NONE ((uint8_t)0U)
268 #define HWA_FFT_WINDOW_INTERPOLATE_MODE_4K ((uint8_t)1U)
269 #define HWA_FFT_WINDOW_INTERPOLATE_MODE_2K ((uint8_t)2U)
277 #define HWA_FFT_MODE_MAGNITUDE_LOG2_DISABLED ((uint8_t)0U)
278 #define HWA_FFT_MODE_MAGNITUDE_ONLY_ENABLED ((uint8_t)2U)
279 #define HWA_FFT_MODE_MAGNITUDE_LOG2_ENABLED ((uint8_t)3U)
287 #define HWA_FFT_MODE_OUTPUT_DEFAULT ((uint8_t)0U)
288 #define HWA_FFT_MODE_OUTPUT_MAX_STATS ((uint8_t)2U)
289 #define HWA_FFT_MODE_OUTPUT_SUM_STATS ((uint8_t)3U)
297 #define HWA_NOISE_AVG_MODE_CFAR_CA ((uint8_t)0U)
298 #define HWA_NOISE_AVG_MODE_CFAR_CAGO ((uint8_t)1U)
299 #define HWA_NOISE_AVG_MODE_CFAR_CASO ((uint8_t)2U)
300 #define HWA_NOISE_AVG_MODE_CFAR_OS ((uint8_t)3U)
308 #define HWA_TRIG_MODE_IMMEDIATE ((uint8_t)0U)
309 #define HWA_TRIG_MODE_SOFTWARE ((uint8_t)1U)
310 #define HWA_TRIG_MODE_RESERVED1 ((uint8_t)2U)
311 #define HWA_TRIG_MODE_DMA ((uint8_t)3U)
312 #define HWA_TRIG_MODE_HARDWARE ((uint8_t)4U)
313 #define HWA_TRIG_MODE_RESERVED2 ((uint8_t)5U)
314 #define HWA_TRIG_MODE_RESERVED3 ((uint8_t)6U)
315 #define HWA_TRIG_MODE_M4CONTROL ((uint8_t)7U)
323 #define HWA_ACCELMODE_FFT ((uint8_t)0U)
324 #define HWA_ACCELMODE_CFAR ((uint8_t)1U)
325 #define HWA_ACCELMODE_COMPRESS ((uint8_t)2U)
326 #define HWA_ACCELMODE_NONE ((uint8_t)7U)
346 #define HWA_CFAR_OPER_MODE_LOG_INPUT_REAL 0U
347 #define HWA_CFAR_OPER_MODE_LOG_INPUT_COMPLEX 1U
348 #define HWA_CFAR_OPER_MODE_MAG_INPUT_REAL 2U
349 #define HWA_CFAR_OPER_MODE_MAG_INPUT_COMPLEX 3U
350 #define HWA_CFAR_OPER_MODE_MAG_SQR_INPUT_REAL 4U
351 #define HWA_CFAR_OPER_MODE_MAG_SQR_INPUT_COMPLEX 5U
369 #define HWA_CFAR_OUTPUT_MODE_I_nAVG_ALL_Q_CUT ((uint8_t)0U)
371 #define HWA_CFAR_OUTPUT_MODE_I_nAVG_ALL_Q_DET_FLAG ((uint8_t)1U)
373 #define HWA_CFAR_OUTPUT_MODE_I_PEAK_IDX_Q_NEIGHBOR_NOISE_VAL ((uint8_t)2U)
375 #define HWA_CFAR_OUTPUT_MODE_I_PEAK_IDX_Q_CUT ((uint8_t)3U)
391 #define HWA_CMP_DCMP_COMPRESS ((uint8_t)0U)
392 #define HWA_CMP_DCMP_DECOMPRESS ((uint8_t)1U) /*HWA_COMPRESS_MODE*/
394 
395 
401 #define HWA_CMP_K_ARR_LEN (8U) /*HWA_CMP_MISC_PARAMS*/
403 
413 #define HWA_COMPRESS_METHOD_EGE ((uint8_t)0U) /*HWA_CMP_METHOD*/
415 
429 #define HWA_COMPRESS_PATHSELECT_BOTHPASSES ((uint8_t)3U) /*HWA_COMPRESS_PATHSELECT*/
431 
437 #define HWA_RAM_TYPE_WINDOW_RAM ((uint8_t)0U)
438 #define HWA_RAM_TYPE_INTERNAL_RAM ((uint8_t)1U) /*HWA_RAM_TYPE*/
440 
441 
447 #define HWA_ACCUMULATORREG_TYPE_DC ((uint8_t)0U)
448 #define HWA_ACCUMULATORREG_TYPE_INTERF_MAG ((uint8_t)1U)
449 #define HWA_ACCUMULATORREG_TYPE_INTERF_MAGDIFF ((uint8_t)2U)
450 #define HWA_ACCUMULATORREG_TYPE_INTERF ((uint8_t)3U)
458 #define HWA_INTERFERENCE_THRESHOLD_TYPE_MAG ((uint8_t)0U)
459 #define HWA_INTERFERENCE_THRESHOLD_TYPE_MAGDIFF ((uint8_t)1U)
469 #define HWA_PARAMDONE_INTERRUPT_TYPE_CPU ((uint8_t)1U)
470 #define HWA_PARAMDONE_INTERRUPT_TYPE_DMA ((uint8_t)2U)
479 #define HWA_COMMONCONFIG_MASK_NUMLOOPS 0x00000001
480 #define HWA_COMMONCONFIG_MASK_PARAMSTARTIDX 0x00000002
481 #define HWA_COMMONCONFIG_MASK_PARAMSTOPIDX 0x00000004
482 #define HWA_COMMONCONFIG_MASK_FFT1DENABLE 0x00000008
483 #define HWA_COMMONCONFIG_MASK_BPMRATE 0x00000010
484 #define HWA_COMMONCONFIG_MASK_BPMPATTERN 0x00000020
485 #define HWA_COMMONCONFIG_MASK_INTERFERENCETHRESHOLD 0x00000040
486 #define HWA_COMMONCONFIG_MASK_TWIDDITHERENABLE 0x00000080
487 #define HWA_COMMONCONFIG_MASK_LFSRSEED 0x00000100
488 #define HWA_COMMONCONFIG_MASK_FFTSUMDIV 0x00000200
489 #define HWA_COMMONCONFIG_MASK_CFARTHRESHOLDSCALE 0x00000400
490 #define HWA_COMMONCONFIG_MASK_I_CMULT_SCALE 0x00001000
491 #define HWA_COMMONCONFIG_MASK_Q_CMULT_SCALE 0x00002000
492 // #define HWA_COMMONCONFIG_MASK_DCEST_SCALESHIFT ((uint64_t)0x00000100U)
493 // #define HWA_COMMONCONFIG_MASK_DCSUB_SWVAL ((uint64_t)0x00000200U)
494 // #define HWA_COMMONCONFIG_MASK_INTERFMAG_THRESHOLD ((uint64_t)0x00000400U)
495 // #define HWA_COMMONCONFIG_MASK_INTERFMAGDIFF_THRESHOLD ((uint64_t)0x00000800U)
496 // #define HWA_COMMONCONFIG_MASK_INTERFSUM_MAG ((uint64_t)0x00001000U)
497 // #define HWA_COMMONCONFIG_MASK_INTERFSUM_MAGDIFF ((uint64_t)0x00002000U)
498 // #define HWA_COMMONCONFIG_MASK_COMPLEXMULT_SCALEARRAY ((uint64_t)0x00004000U)
501 // #define HWA_COMMONCONFIG_MASK_COMPLEXMULT_SCALECONST ((uint64_t)0x00008000U)
504 // #define HWA_COMMONCONFIG_MASK_INTERF_MITG_WINDOW_PARAM ((uint64_t)0x40000000U)
505 #define HWA_COMMONCONFIG_MASK_EGECOMRESS_KPARAM 0x00004000
514 #define HWA_COMPLEX_MULTIPLY_MODE_DISABLE ((uint8_t)0U)
515 #define HWA_COMPLEX_MULTIPLY_MODE_FREQ_SHIFTER ((uint8_t)1U)
516 #define HWA_COMPLEX_MULTIPLY_MODE_SLOW_DFT ((uint8_t)2U)
517 #define HWA_COMPLEX_MULTIPLY_MODE_FFT_STITCHING ((uint8_t)3U)
518 #define HWA_COMPLEX_MULTIPLY_MODE_MAG_SQUARED ((uint8_t)4U)
519 #define HWA_COMPLEX_MULTIPLY_MODE_SCALAR_MULT ((uint8_t)5U)
520 #define HWA_COMPLEX_MULTIPLY_MODE_VECTOR_MULT ((uint8_t)6U)
521 #define HWA_COMPLEX_MULTIPLY_MODE_VECTOR_MULT_2 ((uint8_t)7U)
530 #define HWA_FFT_STITCHING_TWID_PATTERN_2K ((uint8_t)0U)
531 #define HWA_FFT_STITCHING_TWID_PATTERN_4K ((uint8_t)1U)
536 /* ========================================================================== */
537 /* Structures and Enums */
538 /* ========================================================================== */
539 
543 typedef void* HWA_Handle;
544 
551 typedef void (*HWA_ParamDone_IntHandlerFuncPTR)(uint32_t paramSet, void * arg);
552 
559 typedef void (*HWA_Done_IntHandlerFuncPTR)(void * arg);
560 
567 typedef struct HWA_Attrs_t {
568  uint32_t instanceNum;
569  volatile uint32_t ctrlBaseAddr;
570  volatile uint32_t paramBaseAddr;
571  volatile uint32_t ramBaseAddr;
572  volatile uint32_t dssBaseAddr;
573  uint32_t numHwaParamSets;
574  uint32_t intNumParamSet;
575  uint32_t intNumDone;
576  uint32_t numDmaChannels;
577  volatile uint32_t accelMemBaseAddr;
578  uint32_t accelMemSize;
582 } HWA_Attrs;
583 
590 typedef struct HWA_RAMAttrs_t
591 {
592  uint32_t ramBaseAddress;
593  uint32_t ramSizeInBytes;
594 } HWA_RAMAttrs;
595 
607 typedef struct HWA_SrcDMAConfig_t {
608  uint32_t srcAddr;
609  uint32_t destAddr;
610  uint16_t aCnt;
611  uint16_t bCnt;
612  uint16_t cCnt;
614 
621 typedef struct HWA_CommonConfig_t {
622  uint32_t configMask;
625  uint16_t numLoops;
628  uint8_t paramStartIdx;
631  uint8_t paramStopIdx;
635  struct {
636  uint8_t fft1DEnable;
642  uint16_t bpmRate;
645  uint32_t bpmPattern[2];
658  uint32_t lfsrSeed;
659  uint8_t fftSumDiv;
662  } fftConfig;
663 
664  struct {
671  } cfarConfig;
672 
673  struct {
674  uint32_t i_cmult_scale;
677  uint32_t q_cmult_scale;
680  } scalarMult;
681 
682  struct {
683  uint8_t EGEKparam[HWA_CMP_K_ARR_LEN];
685  } compressMode;
686 
688 
695 typedef struct HWA_SourceConfig_t {
696  uint16_t srcAddr;
701  uint16_t srcAcnt;
705  int16_t srcAIdx;
708  uint16_t srcBcnt;
710  int16_t srcBIdx;
714  uint16_t srcShift;
721  uint8_t srcRealComplex;
724  uint8_t srcWidth;
727  uint8_t srcSign;
733  uint8_t srcConjugate;
741  uint8_t srcScale;
750  uint8_t bpmEnable;
755  uint8_t bpmPhase;
759 
766 typedef struct HWA_DestConfig_t {
767  uint16_t dstAddr;
772  uint16_t dstAcnt;
776  int16_t dstAIdx;
779  int16_t dstBIdx;
783  uint8_t dstRealComplex;
786  uint8_t dstWidth;
789  uint8_t dstSign;
795  uint8_t dstConjugate;
803  uint8_t dstScale;
809  uint16_t dstSkipInit;
814 
821 typedef struct HWA_AccelModeFFT_t{
822  uint8_t fftEn;
827  uint8_t fftSize;
831  uint16_t butterflyScaling;
837  uint8_t interfZeroOutEn;
842  uint8_t windowEn;
845  uint16_t windowStart;
850  uint8_t winSymm;
859  uint8_t magLogEn;
862  uint8_t fftOutMode;
869 
877 typedef struct HWA_AccelModeCompress_t{
883  uint8_t method;
887  uint8_t ditherEnable;
890  uint8_t passSelect;
893  uint8_t headerEnable;
899  uint8_t scaleFactorBW;
904  uint8_t EGEKarrayLength;
908 
915 typedef struct HWA_ComplexMultiply_t {
916  uint8_t mode;
919  union {
920  uint16_t twidIncrement;
925  struct {
926  uint16_t startFreq;
929  uint8_t freqIncrement;
934  } dft;
942  }cmpMulArgs;
944 
951 typedef struct HWA_AccelModeCFAR_t{
962  uint8_t numGuardCells;
964  uint8_t nAvgDivFactor;
970  uint8_t nAvgMode;
973  uint8_t operMode;
975  uint8_t outputMode;
978  uint8_t peakGroupEn;
986  uint8_t cyclicModeEn;
992 
999 typedef struct HWA_ParamConfig_t {
1000  uint8_t triggerMode;
1002  uint8_t dmaTriggerSrc;
1006  uint8_t dmaTriggerEn; /* Sets DMATRIGEN bits in PARAM1_0*/
1007  uint8_t accelMode;
1011  uint8_t accTriggerDst; /* Sets ACC2DMA_CHANNEL_TRIGDST bits of PARAM1_0*/
1014  union {
1018  }accelModeArgs;
1021 
1028 typedef struct HWA_InterruptConfig_t {
1035  struct {
1037  void *callbackArg;
1038  } cpu;
1039  struct {
1040  uint8_t dstChannel;
1042  } dma;
1044 
1051 typedef struct HWA_Stats_t {
1052  uint32_t maxValue;
1053  uint16_t maxIndex;
1054  uint8_t iSumMSB;
1055  uint8_t qSumMSB;
1056  uint32_t iSumLSB;
1057  uint32_t qSumLSB;
1058 } HWA_Stats;
1059 
1066 typedef struct HWA_DebugStats_t {
1072  uint16_t currentLoopCount;
1074  uint16_t dmaTrigStatus;
1076  uint8_t swTrigStatus;
1078 
1085 typedef struct HWA_MemInfo_t {
1086  uint32_t baseAddress;
1087  uint16_t bankSize;
1088  uint16_t numBanks;
1089 }HWA_MemInfo;
1090 
1095 typedef struct HWA_InterruptPriority_t {
1096 
1097  uint32_t backgroundDone;
1098  //TO DO: CLEAN uint32_t ALTDone; /**< \brief HWA interrupt priority for the ALT thread done */
1099  uint32_t paramsetDone1;
1100  uint32_t paramsetDone2;
1103 
1108 typedef struct HWA_OpenConfig_t {
1109 
1123 } HWA_OpenConfig;
1124  /* end of HWA_DRIVER_EXTERNAL_DATA_STRUCTURE*/
1126 
1127 /* ========================================================================== */
1128 /* Internal/Private Structure Declarations */
1129 /* ========================================================================== */
1130 
1139 typedef struct HWA_InterruptCtx_t {
1141  void *callbackArg;
1143 
1152 typedef struct HWA_DoneInterruptCtx_t {
1153  bool bIsEnabled;
1155  void *callbackArg;
1157 
1161 typedef struct HWA_Driver_t {
1165  uint32_t instanceNum;
1169  uint32_t refCnt;
1185 
1190 
1195 
1199  //TO DO: CLEAN HwiP_Object hwiHandleParamSetALT;
1200 
1204  //TO DO: CLEAN HwiP_Object hwiHandleDoneALT;
1205 
1206 
1210  HWA_InterruptCtx *interruptCtxParamSet; /*[NUM_HWA_PARAMSETS_PER_INSTANCE];*/
1211 
1216 
1221 } HWA_Object;
1222 
1224 extern HWA_Attrs gHwaAttrs[];
1228 extern HWA_Object gHwaObject[];
1230 extern HWA_Object *gHwaObjectPtr[];
1232 extern uint32_t gHwaConfigNum;
1233 
1234 /* ========================================================================== */
1235 /* Global Variables Declarations */
1236 /* ========================================================================== */
1237 
1238 /* None */
1239 
1240 /* ========================================================================== */
1241 /* Function Declarations */
1242 /* ========================================================================== */
1243 
1254 extern void HWA_init(void);
1255 
1259 extern void HWA_deinit(void);
1260 
1278 extern HWA_Handle HWA_open(uint32_t index, HWA_OpenConfig * hwaCfg, int32_t* errCode);
1279 
1291 extern int32_t HWA_close(HWA_Handle handle);
1292 
1304 extern int32_t HWA_reset(HWA_Handle handle);
1305 
1306 
1319 extern DSSHWACCRegs *HWA_getCommonCtrlAddr(HWA_Handle handle);
1320 
1335 extern DSSHWACCPARAMRegs *HWA_getParamSetAddr(HWA_Handle handle, uint8_t paramsetIdx);
1336 
1351 extern int32_t HWA_configCommon(HWA_Handle handle, HWA_CommonConfig *commonConfig);
1352 
1372 extern int32_t HWA_configParamSet(HWA_Handle handle, uint8_t paramsetIdx, HWA_ParamConfig *paramConfig, HWA_SrcDMAConfig *dmaConfig);
1373 
1396 extern int32_t HWA_getDMAconfig(HWA_Handle handle, uint8_t dmaTriggerSrc, HWA_SrcDMAConfig *dmaConfig);
1411 extern int32_t HWA_getCfarPeakCntRegAddress(HWA_Handle handle, uint32_t *peakCntAddr);
1412 
1413 
1433 extern int32_t HWA_configRam(HWA_Handle handle, uint8_t ramType, uint8_t *data, uint32_t dataSize, uint32_t startIdx);
1434 
1452 extern int32_t HWA_enableParamSetInterrupt(HWA_Handle handle, uint8_t paramsetIdx, HWA_InterruptConfig *intrConfig);
1453 
1454 
1470 extern int32_t HWA_enableDoneInterrupt(HWA_Handle handle, HWA_Done_IntHandlerFuncPTR callbackFn, void * callbackArg);
1471 
1487 extern int32_t HWA_disableParamSetInterrupt(HWA_Handle handle, uint8_t paramsetIdx, uint8_t interruptTypeFlag);
1488 
1500 extern int32_t HWA_disableDoneInterrupt(HWA_Handle handle);
1501 
1516 extern int32_t HWA_enable(HWA_Handle handle, uint8_t flagEnDis);
1517 
1518 
1533 extern int32_t HWA_setSoftwareTrigger(HWA_Handle handle);
1534 
1535 
1549 extern int32_t HWA_setDMA2ACCManualTrig(HWA_Handle handle, uint8_t idx);
1550 
1566 extern int32_t HWA_setSourceAddress(HWA_Handle handle, uint16_t paramIdx, uint32_t sourceAddress);
1567 
1586 extern int32_t HWA_readStatsReg(HWA_Handle handle, HWA_Stats *pStats, uint8_t numIter);
1587 
1605 extern int32_t HWA_readCFARPeakCountReg(HWA_Handle handle, uint8_t *pbuf, uint8_t size);
1606 
1621 extern int32_t HWA_readDebugReg(HWA_Handle handle, HWA_DebugStats *pStats);
1622 
1634 extern int32_t HWA_clearDebugReg(HWA_Handle handle);
1635 
1650 extern int32_t HWA_getHWAMemInfo(HWA_Handle handle, HWA_MemInfo *memInfo);
1651 
1669 extern int32_t HWA_getDMAChanIndex(HWA_Handle handle, uint8_t edmaChanId, uint8_t *hwaDestChan);
1670 
1686 extern int32_t HWA_getEDMAChanId(HWA_Handle handle, uint8_t hwaDMAdestChan);
1687 
1707 extern int32_t HWA_readDCEstimateReg(HWA_Handle handle, cmplx32ImRe_t *pbuf, uint8_t startIdx, uint8_t size);
1708 
1729 extern int32_t HWA_readIntfAccReg(HWA_Handle handle, uint64_t *accBuf, uint8_t type, uint8_t startIdx, uint8_t size);
1730 
1749 extern int32_t HWA_readDCAccReg(HWA_Handle handle, cmplx64ImRe_t *accbuf, uint8_t startIdx, uint8_t size);
1750 
1764 extern int32_t HWA_readInterfChirpCountReg(HWA_Handle handle, uint16_t *numInterfSamplesChirp);
1765 
1779 extern int32_t HWA_readInterfFrameCountReg(HWA_Handle handle, uint32_t *numInterfSamplesFrame);
1780 
1800 extern int32_t HWA_readInterfThreshReg(HWA_Handle handle, uint32_t *pbuf, uint8_t startIdx, uint8_t size, uint8_t type);
1801 
1814 //extern int32_t HWA_controlPeripheralSuspendMode(HWA_Handle handle, uint8_t flagEnDis);
1815  /* end of addgroup HWA_DRIVER_EXTERNAL_FUNCTION*/
1817 
1818 #ifdef __cplusplus
1819 }
1820 #endif
1821 
1822 #endif /* HWA_H_ */
1823 
1824 
HWA_disableDoneInterrupt
int32_t HWA_disableDoneInterrupt(HWA_Handle handle)
Function to disable the CPU interrupt after all programmed paramSets have been completed.
HWA_Object::interrupt1ParamSetMask
uint64_t interrupt1ParamSetMask
interrupt enable mask for background thread
Definition: hwa/v0/hwa.h:1215
HWA_Object::refCnt
uint32_t refCnt
HWA instance reference (open) count.
Definition: hwa/v0/hwa.h:1169
HWA_SourceConfig
HWA Paramset Config for Input Formatter/Source block.
Definition: hwa/v0/hwa.h:695
HWA_SrcDMAConfig::destAddr
uint32_t destAddr
Definition: hwa/v0/hwa.h:609
HWA_readInterfThreshReg
int32_t HWA_readInterfThreshReg(HWA_Handle handle, uint32_t *pbuf, uint8_t startIdx, uint8_t size, uint8_t type)
Function to read the interference statistics INTF_LOC_THRESH_MAG_VAL or INTF_LOC_THRESH_MAG_VAL regis...
HWA_enable
int32_t HWA_enable(HWA_Handle handle, uint8_t flagEnDis)
Function to enable the state machine of the HWA. This should be called after paramset and RAM have be...
HWA_reset
int32_t HWA_reset(HWA_Handle handle)
Function to reset the internal state machine of the HWA.
HWA_AccelModeCFAR::numNoiseSamplesRight
uint8_t numNoiseSamplesRight
Definition: hwa/v0/hwa.h:957
HWA_ComplexMultiply::startFreq
uint16_t startFreq
Definition: hwa/v0/hwa.h:926
HWA_AccelModeCFAR::nAvgDivFactor
uint8_t nAvgDivFactor
Definition: hwa/v0/hwa.h:964
HWA_Done_IntHandlerFuncPTR
void(* HWA_Done_IntHandlerFuncPTR)(void *arg)
HWA Interrupt callback function after all paramsets completion.
Definition: hwa/v0/hwa.h:559
HWA_AccelModeCFAR::peakGroupEn
uint8_t peakGroupEn
Definition: hwa/v0/hwa.h:978
HWA_AccelModeFFT
HWA Paramset Config for FFT block.
Definition: hwa/v0/hwa.h:821
HWA_SourceConfig::srcConjugate
uint8_t srcConjugate
Definition: hwa/v0/hwa.h:733
HWA_setDMA2ACCManualTrig
int32_t HWA_setDMA2ACCManualTrig(HWA_Handle handle, uint8_t idx)
Function to manually trigger the execution of the state machine waiting on DMA via software.
HWA_Stats::maxIndex
uint16_t maxIndex
Definition: hwa/v0/hwa.h:1053
HWA_DestConfig::dstSkipInit
uint16_t dstSkipInit
Definition: hwa/v0/hwa.h:809
HWA_clearDebugReg
int32_t HWA_clearDebugReg(HWA_Handle handle)
Function to clear the debug registers (acc_trig_in_clr)
HWA_MemInfo
HWA Local memory Information.
Definition: hwa/v0/hwa.h:1085
HWA_ParamConfig::dmaTriggerEn
uint8_t dmaTriggerEn
Definition: hwa/v0/hwa.h:1006
HWA_ParamConfig::dmaTriggerSrc
uint8_t dmaTriggerSrc
Definition: hwa/v0/hwa.h:1002
HWA_Stats::iSumLSB
uint32_t iSumLSB
Definition: hwa/v0/hwa.h:1056
gHwaConfigNum
uint32_t gHwaConfigNum
Externally defined driver configuration array size.
HWA_SrcDMAConfig::srcAddr
uint32_t srcAddr
Definition: hwa/v0/hwa.h:608
HWA_open
HWA_Handle HWA_open(uint32_t index, HWA_OpenConfig *hwaCfg, int32_t *errCode)
Function to initialize HWA specified by the particular index value.
HWA_MemInfo::bankSize
uint16_t bankSize
Definition: hwa/v0/hwa.h:1087
HWA_SourceConfig::bpmEnable
uint8_t bpmEnable
Definition: hwa/v0/hwa.h:750
HWA_AccelModeCompress::passSelect
uint8_t passSelect
Definition: hwa/v0/hwa.h:890
HWA_getDMAChanIndex
int32_t HWA_getDMAChanIndex(HWA_Handle handle, uint8_t edmaChanId, uint8_t *hwaDestChan)
Function to get the dma destination index with a given EDMA channel number This function assumes the ...
HWA_enableParamSetInterrupt
int32_t HWA_enableParamSetInterrupt(HWA_Handle handle, uint8_t paramsetIdx, HWA_InterruptConfig *intrConfig)
Function to enable the CPU and/or DMA interrupt after a paramSet completion. The CPU interrupt for ev...
HWA_enableDoneInterrupt
int32_t HWA_enableDoneInterrupt(HWA_Handle handle, HWA_Done_IntHandlerFuncPTR callbackFn, void *callbackArg)
Function to enable the CPU interrupt after all programmed paramSets have been completed in the backgr...
HWA_InterruptPriority::backgroundDone
uint32_t backgroundDone
HWA interrupt priority for the background thread done.
Definition: hwa/v0/hwa.h:1097
HWA_AccelModeCompress::headerEnable
uint8_t headerEnable
Definition: hwa/v0/hwa.h:893
HWA_ComplexMultiply
HWA Paramset Config for ComplexMultiply block.
Definition: hwa/v0/hwa.h:915
HWA_ParamConfig::fftMode
HWA_AccelModeFFT fftMode
Definition: hwa/v0/hwa.h:1015
HWA_SourceConfig::srcWidth
uint8_t srcWidth
Definition: hwa/v0/hwa.h:724
HWA_Attrs::intNumDone
uint32_t intNumDone
Definition: hwa/v0/hwa.h:575
HWA_MemInfo::baseAddress
uint32_t baseAddress
Definition: hwa/v0/hwa.h:1086
HWA_AccelModeCFAR
HWA Paramset Config for CFAR block.
Definition: hwa/v0/hwa.h:951
HWA_Attrs::numHwaParamSets
uint32_t numHwaParamSets
Definition: hwa/v0/hwa.h:573
HWA_InterruptConfig::dstChannel
uint8_t dstChannel
Definition: hwa/v0/hwa.h:1040
HWA_AccelModeCompress::method
uint8_t method
Definition: hwa/v0/hwa.h:883
HWA_DestConfig::dstAddr
uint16_t dstAddr
Definition: hwa/v0/hwa.h:767
HWA_CommonConfig::numLoops
uint16_t numLoops
Definition: hwa/v0/hwa.h:625
HWA_DestConfig::dstConjugate
uint8_t dstConjugate
Definition: hwa/v0/hwa.h:795
HWA_InterruptPriority::paramsetDone1
uint32_t paramsetDone1
HWA interrupt priority for paramset done interrupt 1.
Definition: hwa/v0/hwa.h:1099
HWA_ComplexMultiply::freqIncrement
uint8_t freqIncrement
Definition: hwa/v0/hwa.h:929
HWA_AccelModeCompress::compressDecompress
uint8_t compressDecompress
Definition: hwa/v0/hwa.h:878
HWA_init
void HWA_init(void)
Function to initialize the HWA module.
gHwaAttrs
HWA_Attrs gHwaAttrs[]
Externally defined driver configuration array.
HWA_Attrs::ctrlBaseAddr
volatile uint32_t ctrlBaseAddr
Definition: hwa/v0/hwa.h:569
HWA_OpenConfig
HWA configuration structure, which describes the configuration information, needed for hwa handle ope...
Definition: hwa/v0/hwa.h:1108
HWA_Attrs::isConcurrentAccessAllowed
bool isConcurrentAccessAllowed
Definition: hwa/v0/hwa.h:579
HWA_InterruptConfig::interruptTypeFlag
uint8_t interruptTypeFlag
Definition: hwa/v0/hwa.h:1029
HWA_SrcDMAConfig::cCnt
uint16_t cCnt
Definition: hwa/v0/hwa.h:612
HWA_OpenConfig::interruptPriority
HWA_InterruptPriority interruptPriority
structure holds the HWA interrupt priorities. This structure is applicable for processors that suppor...
Definition: hwa/v0/hwa.h:1110
HWA_CommonConfig::paramStartIdx
uint8_t paramStartIdx
Definition: hwa/v0/hwa.h:628
HWA_ParamConfig::accTriggerDst
uint8_t accTriggerDst
Definition: hwa/v0/hwa.h:1011
HWA_DestConfig::dstWidth
uint8_t dstWidth
Definition: hwa/v0/hwa.h:786
HWA_CommonConfig::twidDitherEnable
uint8_t twidDitherEnable
Definition: hwa/v0/hwa.h:653
HWA_getCfarPeakCntRegAddress
int32_t HWA_getCfarPeakCntRegAddress(HWA_Handle handle, uint32_t *peakCntAddr)
Function to get the address of CFAR Peak Count register.
HWA_DebugStats::dfePingPongStatus
uint8_t dfePingPongStatus
Definition: hwa/v0/hwa.h:1075
HWA_getDMAconfig
int32_t HWA_getDMAconfig(HWA_Handle handle, uint8_t dmaTriggerSrc, HWA_SrcDMAConfig *dmaConfig)
Function to get the config to program the DMA for a given DMA Trigger channel. Application should use...
HWA_Object::paramSetMapInProgress
uint16_t paramSetMapInProgress
HWA paramset config is in progress [used as bitmap]. Protects Paramset register access in HWA_configP...
Definition: hwa/v0/hwa.h:1180
HWA_DebugStats
HWA Debug statistics.
Definition: hwa/v0/hwa.h:1066
HWA_readInterfFrameCountReg
int32_t HWA_readInterfFrameCountReg(HWA_Handle handle, uint32_t *numInterfSamplesFrame)
Function to read the number of samples that exceeded the threshold in a frame.
HWA_AccelModeCFAR::numNoiseSamplesLeft
uint8_t numNoiseSamplesLeft
Definition: hwa/v0/hwa.h:952
HWA_Object::hwiHandleParamSet
HwiP_Object hwiHandleParamSet
Registered Interrupt Handler for each paramset completion.
Definition: hwa/v0/hwa.h:1189
HWA_Stats::qSumMSB
uint8_t qSumMSB
Definition: hwa/v0/hwa.h:1055
HWA_CommonConfig::fft1DEnable
uint8_t fft1DEnable
Definition: hwa/v0/hwa.h:636
HWA_close
int32_t HWA_close(HWA_Handle handle)
Function to close a HWA peripheral specified by the HWA handle.
HWA_ParamConfig::triggerMode
uint8_t triggerMode
Definition: hwa/v0/hwa.h:1000
HWA_DebugStats::currentParamSet
uint8_t currentParamSet
Definition: hwa/v0/hwa.h:1067
HWA_readCFARPeakCountReg
int32_t HWA_readCFARPeakCountReg(HWA_Handle handle, uint8_t *pbuf, uint8_t size)
Function to read the PEAKCNT register.
HWA_AccelModeCFAR::cyclicModeEn
uint8_t cyclicModeEn
Definition: hwa/v0/hwa.h:986
HWA_DoneInterruptCtx::callbackArg
void * callbackArg
Definition: hwa/v0/hwa.h:1155
HWA_CommonConfig::paramStopIdx
uint8_t paramStopIdx
Definition: hwa/v0/hwa.h:631
HWA_InterruptConfig::callbackFn
HWA_ParamDone_IntHandlerFuncPTR callbackFn
Definition: hwa/v0/hwa.h:1036
HWA_getParamSetAddr
DSSHWACCPARAMRegs * HWA_getParamSetAddr(HWA_Handle handle, uint8_t paramsetIdx)
Function to returns the HWA paramSet base address.
HWA_readDCAccReg
int32_t HWA_readDCAccReg(HWA_Handle handle, cmplx64ImRe_t *accbuf, uint8_t startIdx, uint8_t size)
Function to read the DC estimation accumulator register,.
HWA_Attrs::accelMemBaseAddr
volatile uint32_t accelMemBaseAddr
Definition: hwa/v0/hwa.h:577
HWA_AccelModeFFT::butterflyScaling
uint16_t butterflyScaling
Definition: hwa/v0/hwa.h:831
HWA_getEDMAChanId
int32_t HWA_getEDMAChanId(HWA_Handle handle, uint8_t hwaDMAdestChan)
Function to get the edma EDMA channel number from a given HWA paramset destination channel....
HWA_SrcDMAConfig::aCnt
uint16_t aCnt
Definition: hwa/v0/hwa.h:610
HWA_Object::interruptCtxParamSet
HWA_InterruptCtx * interruptCtxParamSet
Registered Interrupt Handler for each paramset completion in the ALT thread.
Definition: hwa/v0/hwa.h:1210
HWA_AccelModeCFAR::nAvgMode
uint8_t nAvgMode
Definition: hwa/v0/hwa.h:970
HWA_InterruptCtx::callbackFn
HWA_ParamDone_IntHandlerFuncPTR callbackFn
Definition: hwa/v0/hwa.h:1140
HWA_SourceConfig::srcBIdx
int16_t srcBIdx
Definition: hwa/v0/hwa.h:710
HWA_AccelModeFFT::fftEn
uint8_t fftEn
Definition: hwa/v0/hwa.h:822
HWA_DebugStats::dmaTrigStatus
uint16_t dmaTrigStatus
Definition: hwa/v0/hwa.h:1074
HWA_Object::hwiHandleDone
HwiP_Object hwiHandleDone
Registered Interrupt Handler for interrupt at the end of group of paramsets.
Definition: hwa/v0/hwa.h:1194
HWA_getCommonCtrlAddr
DSSHWACCRegs * HWA_getCommonCtrlAddr(HWA_Handle handle)
Function to returns the HWA common control base address.
HWA_Attrs::ramBaseAddr
volatile uint32_t ramBaseAddr
Definition: hwa/v0/hwa.h:571
HWA_AccelModeCompress::EGEKarrayLength
uint8_t EGEKarrayLength
Definition: hwa/v0/hwa.h:904
gHwaRamCfg
HWA_RAMAttrs gHwaRamCfg[HWA_NUM_RAMS]
Externally defined driver RAM configuration array.
HWA_ParamConfig::cfarMode
HWA_AccelModeCFAR cfarMode
Definition: hwa/v0/hwa.h:1016
HWA_RAMAttrs::ramSizeInBytes
uint32_t ramSizeInBytes
Definition: hwa/v0/hwa.h:593
HWA_SourceConfig::srcBcnt
uint16_t srcBcnt
Definition: hwa/v0/hwa.h:708
HWA_AccelModeCFAR::operMode
uint8_t operMode
Definition: hwa/v0/hwa.h:973
HWA_AccelModeFFT::interfZeroOutEn
uint8_t interfZeroOutEn
Definition: hwa/v0/hwa.h:837
HWA_CommonConfig::interferenceThreshold
uint32_t interferenceThreshold
Definition: hwa/v0/hwa.h:648
HWA_CommonConfig::fftSumDiv
uint8_t fftSumDiv
Definition: hwa/v0/hwa.h:659
HWA_configCommon
int32_t HWA_configCommon(HWA_Handle handle, HWA_CommonConfig *commonConfig)
Function to set the common HWA configuration parameters needed for the next operations/iterations/par...
HwiP.h
HWA_CommonConfig::configMask
uint32_t configMask
Definition: hwa/v0/hwa.h:622
HWA_DebugStats::swTrigStatus
uint8_t swTrigStatus
Definition: hwa/v0/hwa.h:1076
HWA_Attrs::numDmaChannels
uint32_t numDmaChannels
Definition: hwa/v0/hwa.h:576
HWA_getHWAMemInfo
int32_t HWA_getHWAMemInfo(HWA_Handle handle, HWA_MemInfo *memInfo)
Function to get HWA processing Memory information including address, size and number of banks.
gHwaObject
HWA_Object gHwaObject[]
Externally defined driver object.
HWA_configRam
int32_t HWA_configRam(HWA_Handle handle, uint8_t ramType, uint8_t *data, uint32_t dataSize, uint32_t startIdx)
Function to set the HWA RAM : HWA_RAM_TYPE_WINDOW_RAM, HWA_RAM_TYPE_VECTORMULTIPLY_RAM,...
HWA_AccelModeFFT::winSymm
uint8_t winSymm
Definition: hwa/v0/hwa.h:850
HWA_SourceConfig::srcSign
uint8_t srcSign
Definition: hwa/v0/hwa.h:727
HWA_InterruptPriority
HWA interrupt priority for HWA background thread done, ALT thread done, paramset done interrupt 1 and...
Definition: hwa/v0/hwa.h:1095
HWA_SourceConfig::srcScale
uint8_t srcScale
Definition: hwa/v0/hwa.h:741
HWA_ParamDone_IntHandlerFuncPTR
void(* HWA_ParamDone_IntHandlerFuncPTR)(uint32_t paramSet, void *arg)
HWA Interrupt callback function after every paramset completion.
Definition: hwa/v0/hwa.h:551
HWA_ParamConfig::compressMode
HWA_AccelModeCompress compressMode
Definition: hwa/v0/hwa.h:1017
HWA_AccelModeFFT::magLogEn
uint8_t magLogEn
Definition: hwa/v0/hwa.h:859
HWA_Attrs::accelMemSize
uint32_t accelMemSize
Definition: hwa/v0/hwa.h:578
HWA_configParamSet
int32_t HWA_configParamSet(HWA_Handle handle, uint8_t paramsetIdx, HWA_ParamConfig *paramConfig, HWA_SrcDMAConfig *dmaConfig)
Function to set the HWA configuration parameters for a given paramSet.
HWA_SourceConfig::srcRealComplex
uint8_t srcRealComplex
Definition: hwa/v0/hwa.h:721
HWA_AccelModeCFAR::numGuardCells
uint8_t numGuardCells
Definition: hwa/v0/hwa.h:962
HWA_InterruptConfig
HWA Interrupt Config.
Definition: hwa/v0/hwa.h:1028
HWA_ComplexMultiply::twidIncrement
uint16_t twidIncrement
Definition: hwa/v0/hwa.h:920
HWA_Stats::iSumMSB
uint8_t iSumMSB
Definition: hwa/v0/hwa.h:1054
HWA_SrcDMAConfig
Source trigger DMA parameters.
Definition: hwa/v0/hwa.h:607
HWA_ComplexMultiply::mode
uint8_t mode
Definition: hwa/v0/hwa.h:916
HWA_RAMAttrs::ramBaseAddress
uint32_t ramBaseAddress
Definition: hwa/v0/hwa.h:592
HWA_DoneInterruptCtx
HWA Interrupt context structure for done interrupt.
Definition: hwa/v0/hwa.h:1152
HWA_AccelModeFFT::fftOutMode
uint8_t fftOutMode
Definition: hwa/v0/hwa.h:862
HWA_CommonConfig::q_cmult_scale
uint32_t q_cmult_scale
Definition: hwa/v0/hwa.h:677
HWA_Attrs::paramBaseAddr
volatile uint32_t paramBaseAddr
Definition: hwa/v0/hwa.h:570
HWA_AccelModeFFT::windowStart
uint16_t windowStart
Definition: hwa/v0/hwa.h:845
HWA_CommonConfig
HWA Common Config.
Definition: hwa/v0/hwa.h:621
HWA_ParamConfig::dest
HWA_DestConfig dest
Definition: hwa/v0/hwa.h:1013
HWA_Attrs::dssBaseAddr
volatile uint32_t dssBaseAddr
Definition: hwa/v0/hwa.h:572
HWA_InterruptCtx::callbackArg
void * callbackArg
Definition: hwa/v0/hwa.h:1141
HWA_DestConfig::dstSign
uint8_t dstSign
Definition: hwa/v0/hwa.h:789
HWA_CMP_K_ARR_LEN
#define HWA_CMP_K_ARR_LEN
The length of EGE compression/decompression K-paramseters array.
Definition: hwa/v0/hwa.h:401
HWA_disableParamSetInterrupt
int32_t HWA_disableParamSetInterrupt(HWA_Handle handle, uint8_t paramsetIdx, uint8_t interruptTypeFlag)
Function to disable the CPU and/or DMA interrupt after a paramSet completion.
HWA_Object::configInProgress
uint8_t configInProgress
HWA instance config is in progress. Protects Common register acccess in HWA_configCommon() and HWA_co...
Definition: hwa/v0/hwa.h:1174
HWA_CommonConfig::bpmRate
uint16_t bpmRate
Definition: hwa/v0/hwa.h:642
HWA_CommonConfig::cfarThresholdScale
uint32_t cfarThresholdScale
Definition: hwa/v0/hwa.h:665
HwiP_Object
Opaque Hwi object used with the Hwi APIs.
Definition: HwiP.h:91
HWA_AccelModeFFT::winInterpolateMode
uint8_t winInterpolateMode
Definition: hwa/v0/hwa.h:853
HWA_SourceConfig::srcShift
uint16_t srcShift
Definition: hwa/v0/hwa.h:714
HWA_DestConfig::dstAIdx
int16_t dstAIdx
Definition: hwa/v0/hwa.h:776
HWA_ParamConfig
HWA Paramset Config.
Definition: hwa/v0/hwa.h:999
HWA_InterruptPriority::paramsetDone2
uint32_t paramsetDone2
HWA interrupt priority for paramset done interrupt 2.
Definition: hwa/v0/hwa.h:1100
HWA_SourceConfig::srcAcnt
uint16_t srcAcnt
Definition: hwa/v0/hwa.h:701
HWA_CommonConfig::i_cmult_scale
uint32_t i_cmult_scale
Definition: hwa/v0/hwa.h:674
HWA_readDCEstimateReg
int32_t HWA_readDCEstimateReg(HWA_Handle handle, cmplx32ImRe_t *pbuf, uint8_t startIdx, uint8_t size)
Function to read the DC_EST_I/Q register.
HWA_AccelModeCompress
HWA Paramset Config for Compression/Decompression block.
Definition: hwa/v0/hwa.h:877
HWA_AccelModeCFAR::outputMode
uint8_t outputMode
Definition: hwa/v0/hwa.h:975
HWA_InterruptConfig::callbackArg
void * callbackArg
Definition: hwa/v0/hwa.h:1037
HWA_ParamConfig::source
HWA_SourceConfig source
Definition: hwa/v0/hwa.h:1012
HWA_NUM_RAMS
#define HWA_NUM_RAMS
The number of RAM types in HWA.
Definition: hwa/v0/hwa.h:185
HWA_AccelModeCompress::ditherEnable
uint8_t ditherEnable
Definition: hwa/v0/hwa.h:887
HWA_Object::interruptCtxDone
HWA_DoneInterruptCtx interruptCtxDone
interrupt context for all paramset done interrupt
Definition: hwa/v0/hwa.h:1220
HWA_DoneInterruptCtx::bIsEnabled
bool bIsEnabled
Definition: hwa/v0/hwa.h:1153
HWA_DestConfig::dstScale
uint8_t dstScale
Definition: hwa/v0/hwa.h:803
HWA_InterruptCtx
HWA Interrupt context structure for paramset done interrupt.
Definition: hwa/v0/hwa.h:1139
HWA_ComplexMultiply::twidFactorPattern
uint8_t twidFactorPattern
Definition: hwa/v0/hwa.h:935
HWA_DestConfig::dstRealComplex
uint8_t dstRealComplex
Definition: hwa/v0/hwa.h:783
HWA_setSoftwareTrigger
int32_t HWA_setSoftwareTrigger(HWA_Handle handle)
Function to manually trigger the execution of the state machine via software, the software trigger th...
HWA_Attrs::intNumParamSet
uint32_t intNumParamSet
Definition: hwa/v0/hwa.h:574
HWA_Object::hwAttrs
HWA_Attrs const * hwAttrs
HWA Hardware related params.
Definition: hwa/v0/hwa.h:1184
HWA_AccelModeCompress::scaleFactorBW
uint8_t scaleFactorBW
Definition: hwa/v0/hwa.h:899
HWA_SrcDMAConfig::bCnt
uint16_t bCnt
Definition: hwa/v0/hwa.h:611
HWA_ParamConfig::complexMultiply
HWA_ComplexMultiply complexMultiply
Definition: hwa/v0/hwa.h:1019
HWA_RAMAttrs
HWA RAM Parameters.
Definition: hwa/v0/hwa.h:591
HWA_readDebugReg
int32_t HWA_readDebugReg(HWA_Handle handle, HWA_DebugStats *pStats)
Function to read the debug registers (paramcurr, loopcou, acc_trig_in_stat)
HWA_Attrs::instanceNum
uint32_t instanceNum
Definition: hwa/v0/hwa.h:568
HWA_DestConfig
HWA Paramset Config for Output Formatter/Destination block.
Definition: hwa/v0/hwa.h:766
HWA_Attrs::isCompressionEnginePresent
bool isCompressionEnginePresent
Definition: hwa/v0/hwa.h:581
HWA_readInterfChirpCountReg
int32_t HWA_readInterfChirpCountReg(HWA_Handle handle, uint16_t *numInterfSamplesChirp)
Function to read the number of samples that exceeded the threshold in a chirp.
HWA_Handle
void * HWA_Handle
A handle that is returned from a HWA_open() call.
Definition: hwa/v0/hwa.h:543
HWA_Object::instanceNum
uint32_t instanceNum
HWA instance number.
Definition: hwa/v0/hwa.h:1165
HWA_DoneInterruptCtx::callbackFn
HWA_Done_IntHandlerFuncPTR callbackFn
Definition: hwa/v0/hwa.h:1154
HWA_MemInfo::numBanks
uint16_t numBanks
Definition: hwa/v0/hwa.h:1088
HWA_SourceConfig::srcAddr
uint16_t srcAddr
Definition: hwa/v0/hwa.h:696
HWA_Stats
HWA Statistics from the STATISTICS block.
Definition: hwa/v0/hwa.h:1051
HWA_setSourceAddress
int32_t HWA_setSourceAddress(HWA_Handle handle, uint16_t paramIdx, uint32_t sourceAddress)
Function to set the source address for one paramset.
HWA_deinit
void HWA_deinit(void)
Function to deinitialize the HWA module.
HWA_SourceConfig::srcAIdx
int16_t srcAIdx
Definition: hwa/v0/hwa.h:705
HWA_readStatsReg
int32_t HWA_readStatsReg(HWA_Handle handle, HWA_Stats *pStats, uint8_t numIter)
Function to read the 4 sets of 'MAX' statistics register.
HWA_CommonConfig::lfsrSeed
uint32_t lfsrSeed
Definition: hwa/v0/hwa.h:658
HWA_DestConfig::dstBIdx
int16_t dstBIdx
Definition: hwa/v0/hwa.h:779
HWA_DestConfig::dstAcnt
uint16_t dstAcnt
Definition: hwa/v0/hwa.h:772
HWA_Stats::maxValue
uint32_t maxValue
Definition: hwa/v0/hwa.h:1052
HWA_SourceConfig::bpmPhase
uint8_t bpmPhase
Definition: hwa/v0/hwa.h:755
HWA_AccelModeFFT::fftSize
uint8_t fftSize
Definition: hwa/v0/hwa.h:827
HWA_ParamConfig::accelMode
uint8_t accelMode
Definition: hwa/v0/hwa.h:1007
HWA_Stats::qSumLSB
uint32_t qSumLSB
Definition: hwa/v0/hwa.h:1057
HWA_AccelModeFFT::windowEn
uint8_t windowEn
Definition: hwa/v0/hwa.h:842
HWA_Object
HWA driver internal Config.
Definition: hwa/v0/hwa.h:1161
HWA_DebugStats::currentLoopCount
uint16_t currentLoopCount
Definition: hwa/v0/hwa.h:1072
HWA_Attrs
HWA H/W Parameters.
Definition: hwa/v0/hwa.h:567
HWA_readIntfAccReg
int32_t HWA_readIntfAccReg(HWA_Handle handle, uint64_t *accBuf, uint8_t type, uint8_t startIdx, uint8_t size)
Function to read the interference threshold MAG or MAGDIFF Accumulator register.
gHwaObjectPtr
HWA_Object * gHwaObjectPtr[]
Externally defined driver object pointer.
HWA_SourceConfig::srcCircShiftWrap
uint8_t srcCircShiftWrap
Definition: hwa/v0/hwa.h:718