3.2.2.22. USB

3.2.2.22.1. Introduction

The USB subsystem has a SuperSpeed (SS) USB3.1 Gen1 Dual-Role-Device (DRD) controller with on-chip SS (USB3.1 Gen1) PHY and HS/FS/LS (USB2.0) PHY.

Note

LowSpeed (LS) is only supported in host mode.

3.2.2.22.2. TI SoC Integration

The USB subsystem is integrated in TI AM64x devices.

3.2.2.22.3. EVM

AM64X_EVM

The following diagram depicts USB integration in AM64x EVM.

../../../../../_images/usb_am64xx_evm.png

The following image shows the top view of AM64x EVM.

The USB controller operates in USB2.0 dual role mode on AM64x EVM with a microAB receptacle (labeled as J24).

A 2x3 header (labeled as J23) is provided on AM64x EVM to configure the port for host-only mode. Connecting Pin 1 and 2 to enable bulk capacitance on VBUS, and connecting Pin 5 and 6 to ground the ID pin.

SK-AM64B

The following diagram depicts USB integration in SK-AM64B.

../../../../../_images/usb_am64xx_skevm.png

On SK-AM64B, USB 3.0 HOST Interface is offered through USB Type-A Connector which supports data rate up-to 5Gbps.

USB3.0 lines from Type-A connector are connected to the SERDES-0 block of SoC via choke and ESD protection device. USB2.0 Lines of the Type-A Connector are directly interfaced to the USB0 port of AM64x SOC.