Data Structures
struct	SDFM_CfgSdClk
	Structure defining SDFM clock configuration parameters. More...

struct	SDFM_CfgTrigger
	Structure defining SDFM triggered mode trigger times. More...

struct	SDFM_CfgIep
	Structure defining SDFM IEP configuration. More...

struct	SDFM_GpioParams
	Structure defining SDFM base address and values to toggle GPIO pins. More...

struct	SDFM_ChCtrl
	Structure defining SDFM channel control fields. More...

struct	SDFM_ClkSourceParms
	Structure defining clk source for sdfm ch. More...

struct	SDFM_ThresholdParms
	Structure defining SDFM thresholds parametrs. More...

struct	SDFM_Cfg
	Structure defining SDFM configuration interface. More...

struct	SDFM_Ctrl
	Structure defining SDFM control fields. More...

struct	SDFM_Interface

struct	SDFM_SampleOutInterface

struct	SDFM
	Structure defining SDFM interface. More...

Macros
#define	DEF_SD_CH_CTRL_CH_EN ( 0 ) /* default all chs disabled */
	SD channel control, channel disable/enable. More...

#define	BF_CH_EN_MASK ( 0x1 )

#define	SDFM_CH_CTRL_CH_EN_BF_CH0_EN_SHIFT ( 0 )

#define	SDFM_CH_CTRL_CH_EN_BF_CH0_EN_MASK ( BF_CH_EN_MASK << SDFM_CH_CTRL_CH_EN_BF_CH0_EN_SHIFT )

#define	SDFM_CH_CTRL_CH_EN_BF_CH1_EN_SHIFT ( 1 )

#define	SDFM_CH_CTRL_CH_EN_BF_CH1_EN_MASK ( BF_CH_EN_MASK << SDFM_CH_CTRL_CH_EN_BF_CH1_EN_SHIFT )

#define	SDFM_CH_CTRL_CH_EN_BF_CH2_EN_SHIFT ( 2 )

#define	SDFM_CH_CTRL_CH_EN_BF_CH2_EN_MASK ( BF_CH_EN_MASK << SDFM_CH_CTRL_CH_EN_BF_CH2_EN_SHIFT )

#define	SDFM_CH_CTRL_CH_EN_BF_CH3_EN_SHIFT ( 3 )

#define	SDFM_CH_CTRL_CH_EN_BF_CH3_EN_MASK ( BF_CH_EN_MASK << SDFM_CH_CTRL_CH_EN_BF_CH3_EN_SHIFT )

#define	SDFM_CH_CTRL_CH_EN_BF_CH4_EN_SHIFT ( 4 )

#define	SDFM_CH_CTRL_CH_EN_BF_CH4_EN_MASK ( BF_CH_EN_MASK << SDFM_CH_CTRL_CH_EN_BF_CH4_EN_SHIFT )

#define	SDFM_CH_CTRL_CH_EN_BF_CH5_EN_SHIFT ( 5 )

#define	SDFM_CH_CTRL_CH_EN_BF_CH5_EN_MASK ( BF_CH_EN_MASK << SDFM_CH_CTRL_CH_EN_BF_CH5_EN_SHIFT )

#define	SDFM_CH_CTRL_CH_EN_BF_CH6_EN_SHIFT ( 6 )

#define	SDFM_CH_CTRL_CH_EN_BF_CH6_EN_MASK ( BF_CH_EN_MASK << SDFM_CH_CTRL_CH_EN_BF_CH6_EN_SHIFT )

#define	SDFM_CH_CTRL_CH_EN_BF_CH7_EN_SHIFT ( 7 )

#define	SDFM_CH_CTRL_CH_EN_BF_CH7_EN_MASK ( BF_CH_EN_MASK << SDFM_CH_CTRL_CH_EN_BF_CH7_EN_SHIFT )

#define	SDFM_CH_CTRL_CH_EN_BF_CH8_EN_SHIFT ( 8 )

#define	SDFM_CH_CTRL_CH_EN_BF_CH8_EN_MASK ( BF_CH_EN_MASK << SDFM_CH_CTRL_CH_EN_BF_CH8_EN_SHIFT )

#define	SDFM_CH_CTRL_CH_EN_BF_CH9_EN_SHIFT ( 9 )

#define	SDFM_CH_CTRL_CH_EN_BF_CH9_EN_MASK ( BF_CH_EN_MASK << SDFM_CH_CTRL_CH_EN_BF_CH9_EN_SHIFT )

#define	SDFM_CH_CTRL_CH_EN_SHIFT ( SDFM_CH_CTRL_CH_EN_BF_CH0_EN_SHIFT )

#define	SDFM_CH_CTRL_CH_EN_MASK

#define	SDFM_MAIN_FILTER_MASK ( 1 )

#define	SDFM_MAIN_FILTER_SHIFT ( 0 )

#define	SDFM_MAIN_INTERRUPT_MASK ( 1 )

#define	SDFM_MAIN_INTERRUPT_SHIFT ( 1 )

#define	SDFM_RECFG_REINIT ( SDFM_RECFG_BF_RECFG_REINIT_MASK )
	reinitialize PRU SDFM More...

#define	SDFM_RECFG_CLK ( SDFM_RECFG_BF_RECFG_CLK_MASK )
	reconfigure SD clock More...

#define	SDFM_RECFG_OSR ( SDFM_RECFG_BF_RECFG_OSR_MASK )
	reconfigure SD OSR More...

#define	SDFM_RECFG_TRIG_SAMP_TIME ( SDFM_RECFG_BF_RECFG_TRIG_SAMPLE_TIME_MASK )
	reconfigure Trigger mode sample time More...

#define	SDFM_RECFG_TRIG_SAMP_CNT ( SDFM_RECFG_BF_RECFG_TRIG_SAMPLE_CNT_MASK )
	reconfigure Trigger mode sample count More...

#define	SDFM_RECFG_CH_EN ( 1<<6 )
	reconfigure SD channel disable/enable More...

#define	SDFM_RECFG_FD ( SDFM_RECFG_BF_RECFG_FD_MASK )
	reconfigure SD channel disable/enable More...

#define	SDFM_RECFG_TRIG_OUT_SAMP_BUF ( SDFM_RECFG_BF_RECFG_TRIG_OUT_SAMP_BUF_MASK )
	reconfigure Trigger mode output sample buffer More...

#define	IEP_DEFAULT_INC 0x1
	IEP_CFG. More...

#define	ICSSG_SD_SAMP_CH_BUF_SZ ( 128 )

#define	NUM_CH_SUPPORTED_PER_AXIS ( 3 )

#define	SDFM_NINE_CH_MASK ( 0x1FF )

#define	SDFM_CH_MASK_FOR_CH0_CH3_CH6 ( 0x49 )

#define	SDFM_CH_MASK_FOR_CH1_CH4_CH7 ( 0x92 )

#define	SDFM_CH_MASK_FOR_CH2_CH5_CH8 ( 0x124 )

#define	SDFM_CHANNEL0 (0)

#define	SDFM_CHANNEL1 (1)

#define	SDFM_CHANNEL2 (2)

#define	SDFM_CHANNEL3 (3)

#define	SDFM_CHANNEL4 (4)

#define	SDFM_CHANNEL5 (5)

#define	SDFM_CHANNEL6 (6)

#define	SDFM_CHANNEL7 (7)

#define	SDFM_CHANNEL8 (8)

#define	SDFM_FW_VERSION_BIT_SHIFT (32)

#define	SDFM_FD_ERROR_MASK_FOR_TRIP_VEC ( 0x3800000 )

#define	SDFM_PHASE_DELAY_ACK_BIT_MASK (1)

#define	SDFM_PHASE_DELAY_CAL_LOOP_SIZE (8)

#define	SDFM_IEP_CMP1_EN_SHIFT (2)

#define	SDFM_IEP_CMP2_EN_SHIFT (3)

Macro Definition Documentation

◆ DEF_SD_CH_CTRL_CH_EN

#define DEF_SD_CH_CTRL_CH_EN ( 0 ) /* default all chs disabled */

SD channel control, channel disable/enable.

◆ BF_CH_EN_MASK

#define BF_CH_EN_MASK ( 0x1 )

◆ SDFM_CH_CTRL_CH_EN_BF_CH0_EN_SHIFT

#define SDFM_CH_CTRL_CH_EN_BF_CH0_EN_SHIFT ( 0 )

◆ SDFM_CH_CTRL_CH_EN_BF_CH0_EN_MASK

#define SDFM_CH_CTRL_CH_EN_BF_CH0_EN_MASK ( BF_CH_EN_MASK << SDFM_CH_CTRL_CH_EN_BF_CH0_EN_SHIFT )

◆ SDFM_CH_CTRL_CH_EN_BF_CH1_EN_SHIFT

#define SDFM_CH_CTRL_CH_EN_BF_CH1_EN_SHIFT ( 1 )

◆ SDFM_CH_CTRL_CH_EN_BF_CH1_EN_MASK

#define SDFM_CH_CTRL_CH_EN_BF_CH1_EN_MASK ( BF_CH_EN_MASK << SDFM_CH_CTRL_CH_EN_BF_CH1_EN_SHIFT )

◆ SDFM_CH_CTRL_CH_EN_BF_CH2_EN_SHIFT

#define SDFM_CH_CTRL_CH_EN_BF_CH2_EN_SHIFT ( 2 )

◆ SDFM_CH_CTRL_CH_EN_BF_CH2_EN_MASK

#define SDFM_CH_CTRL_CH_EN_BF_CH2_EN_MASK ( BF_CH_EN_MASK << SDFM_CH_CTRL_CH_EN_BF_CH2_EN_SHIFT )

◆ SDFM_CH_CTRL_CH_EN_BF_CH3_EN_SHIFT

#define SDFM_CH_CTRL_CH_EN_BF_CH3_EN_SHIFT ( 3 )

◆ SDFM_CH_CTRL_CH_EN_BF_CH3_EN_MASK

#define SDFM_CH_CTRL_CH_EN_BF_CH3_EN_MASK ( BF_CH_EN_MASK << SDFM_CH_CTRL_CH_EN_BF_CH3_EN_SHIFT )

◆ SDFM_CH_CTRL_CH_EN_BF_CH4_EN_SHIFT

#define SDFM_CH_CTRL_CH_EN_BF_CH4_EN_SHIFT ( 4 )

◆ SDFM_CH_CTRL_CH_EN_BF_CH4_EN_MASK

#define SDFM_CH_CTRL_CH_EN_BF_CH4_EN_MASK ( BF_CH_EN_MASK << SDFM_CH_CTRL_CH_EN_BF_CH4_EN_SHIFT )

◆ SDFM_CH_CTRL_CH_EN_BF_CH5_EN_SHIFT

#define SDFM_CH_CTRL_CH_EN_BF_CH5_EN_SHIFT ( 5 )

◆ SDFM_CH_CTRL_CH_EN_BF_CH5_EN_MASK

#define SDFM_CH_CTRL_CH_EN_BF_CH5_EN_MASK ( BF_CH_EN_MASK << SDFM_CH_CTRL_CH_EN_BF_CH5_EN_SHIFT )

◆ SDFM_CH_CTRL_CH_EN_BF_CH6_EN_SHIFT

#define SDFM_CH_CTRL_CH_EN_BF_CH6_EN_SHIFT ( 6 )

◆ SDFM_CH_CTRL_CH_EN_BF_CH6_EN_MASK

#define SDFM_CH_CTRL_CH_EN_BF_CH6_EN_MASK ( BF_CH_EN_MASK << SDFM_CH_CTRL_CH_EN_BF_CH6_EN_SHIFT )

◆ SDFM_CH_CTRL_CH_EN_BF_CH7_EN_SHIFT

#define SDFM_CH_CTRL_CH_EN_BF_CH7_EN_SHIFT ( 7 )

◆ SDFM_CH_CTRL_CH_EN_BF_CH7_EN_MASK

#define SDFM_CH_CTRL_CH_EN_BF_CH7_EN_MASK ( BF_CH_EN_MASK << SDFM_CH_CTRL_CH_EN_BF_CH7_EN_SHIFT )

◆ SDFM_CH_CTRL_CH_EN_BF_CH8_EN_SHIFT

#define SDFM_CH_CTRL_CH_EN_BF_CH8_EN_SHIFT ( 8 )

◆ SDFM_CH_CTRL_CH_EN_BF_CH8_EN_MASK

#define SDFM_CH_CTRL_CH_EN_BF_CH8_EN_MASK ( BF_CH_EN_MASK << SDFM_CH_CTRL_CH_EN_BF_CH8_EN_SHIFT )

◆ SDFM_CH_CTRL_CH_EN_BF_CH9_EN_SHIFT

#define SDFM_CH_CTRL_CH_EN_BF_CH9_EN_SHIFT ( 9 )

◆ SDFM_CH_CTRL_CH_EN_BF_CH9_EN_MASK

#define SDFM_CH_CTRL_CH_EN_BF_CH9_EN_MASK ( BF_CH_EN_MASK << SDFM_CH_CTRL_CH_EN_BF_CH9_EN_SHIFT )

◆ SDFM_CH_CTRL_CH_EN_SHIFT

#define SDFM_CH_CTRL_CH_EN_SHIFT ( SDFM_CH_CTRL_CH_EN_BF_CH0_EN_SHIFT )

◆ SDFM_CH_CTRL_CH_EN_MASK

#define SDFM_CH_CTRL_CH_EN_MASK

Value:

    ( SDFM_CH_CTRL_CH_EN_BF_CH0_EN_MASK | \
      SDFM_CH_CTRL_CH_EN_BF_CH1_EN_MASK | \
      SDFM_CH_CTRL_CH_EN_BF_CH2_EN_MASK | \
      SDFM_CH_CTRL_CH_EN_BF_CH3_EN_MASK | \
      SDFM_CH_CTRL_CH_EN_BF_CH4_EN_MASK | \
      SDFM_CH_CTRL_CH_EN_BF_CH5_EN_MASK | \
      SDFM_CH_CTRL_CH_EN_BF_CH6_EN_MASK | \
      SDFM_CH_CTRL_CH_EN_BF_CH7_EN_MASK | \
      SDFM_CH_CTRL_CH_EN_BF_CH8_EN_MASK | \
      SDFM_CH_CTRL_CH_EN_BF_CH9_EN_MASK )

◆ SDFM_MAIN_FILTER_MASK

#define SDFM_MAIN_FILTER_MASK ( 1 )

◆ SDFM_MAIN_FILTER_SHIFT

#define SDFM_MAIN_FILTER_SHIFT ( 0 )

◆ SDFM_MAIN_INTERRUPT_MASK

#define SDFM_MAIN_INTERRUPT_MASK ( 1 )

◆ SDFM_MAIN_INTERRUPT_SHIFT

#define SDFM_MAIN_INTERRUPT_SHIFT ( 1 )

◆ SDFM_RECFG_REINIT

#define SDFM_RECFG_REINIT ( SDFM_RECFG_BF_RECFG_REINIT_MASK )

reinitialize PRU SDFM

◆ SDFM_RECFG_CLK

#define SDFM_RECFG_CLK ( SDFM_RECFG_BF_RECFG_CLK_MASK )

reconfigure SD clock

◆ SDFM_RECFG_OSR

#define SDFM_RECFG_OSR ( SDFM_RECFG_BF_RECFG_OSR_MASK )

reconfigure SD OSR

◆ SDFM_RECFG_TRIG_SAMP_TIME

#define SDFM_RECFG_TRIG_SAMP_TIME ( SDFM_RECFG_BF_RECFG_TRIG_SAMPLE_TIME_MASK )

reconfigure Trigger mode sample time

◆ SDFM_RECFG_TRIG_SAMP_CNT

#define SDFM_RECFG_TRIG_SAMP_CNT ( SDFM_RECFG_BF_RECFG_TRIG_SAMPLE_CNT_MASK )

reconfigure Trigger mode sample count

◆ SDFM_RECFG_CH_EN

#define SDFM_RECFG_CH_EN ( 1<<6 )

reconfigure SD channel disable/enable

◆ SDFM_RECFG_FD

#define SDFM_RECFG_FD ( SDFM_RECFG_BF_RECFG_FD_MASK )

reconfigure SD channel disable/enable

◆ SDFM_RECFG_TRIG_OUT_SAMP_BUF

#define SDFM_RECFG_TRIG_OUT_SAMP_BUF ( SDFM_RECFG_BF_RECFG_TRIG_OUT_SAMP_BUF_MASK )

reconfigure Trigger mode output sample buffer

◆ IEP_DEFAULT_INC

#define IEP_DEFAULT_INC 0x1

IEP_CFG.

◆ ICSSG_SD_SAMP_CH_BUF_SZ

#define ICSSG_SD_SAMP_CH_BUF_SZ ( 128 )

◆ NUM_CH_SUPPORTED_PER_AXIS

#define NUM_CH_SUPPORTED_PER_AXIS ( 3 )

◆ SDFM_NINE_CH_MASK

#define SDFM_NINE_CH_MASK ( 0x1FF )

◆ SDFM_CH_MASK_FOR_CH0_CH3_CH6

#define SDFM_CH_MASK_FOR_CH0_CH3_CH6 ( 0x49 )

◆ SDFM_CH_MASK_FOR_CH1_CH4_CH7

#define SDFM_CH_MASK_FOR_CH1_CH4_CH7 ( 0x92 )

◆ SDFM_CH_MASK_FOR_CH2_CH5_CH8

#define SDFM_CH_MASK_FOR_CH2_CH5_CH8 ( 0x124 )

◆ SDFM_CHANNEL0

#define SDFM_CHANNEL0 (0)

◆ SDFM_CHANNEL1

#define SDFM_CHANNEL1 (1)

◆ SDFM_CHANNEL2

#define SDFM_CHANNEL2 (2)

◆ SDFM_CHANNEL3

#define SDFM_CHANNEL3 (3)

◆ SDFM_CHANNEL4

#define SDFM_CHANNEL4 (4)

◆ SDFM_CHANNEL5

#define SDFM_CHANNEL5 (5)

◆ SDFM_CHANNEL6

#define SDFM_CHANNEL6 (6)

◆ SDFM_CHANNEL7

#define SDFM_CHANNEL7 (7)

◆ SDFM_CHANNEL8

#define SDFM_CHANNEL8 (8)

◆ SDFM_FW_VERSION_BIT_SHIFT

#define SDFM_FW_VERSION_BIT_SHIFT (32)

◆ SDFM_FD_ERROR_MASK_FOR_TRIP_VEC

#define SDFM_FD_ERROR_MASK_FOR_TRIP_VEC ( 0x3800000 )

◆ SDFM_PHASE_DELAY_ACK_BIT_MASK

#define SDFM_PHASE_DELAY_ACK_BIT_MASK (1)

◆ SDFM_PHASE_DELAY_CAL_LOOP_SIZE

#define SDFM_PHASE_DELAY_CAL_LOOP_SIZE (8)

◆ SDFM_IEP_CMP1_EN_SHIFT

#define SDFM_IEP_CMP1_EN_SHIFT (2)

◆ SDFM_IEP_CMP2_EN_SHIFT

#define SDFM_IEP_CMP2_EN_SHIFT (3)

Data Structures

Macros