MCUSW

SoC's such as J721E/J7200/J721S2/J784S4/J742S2 integrate an MicroController Unit Subsystem (MCU SS) as an chip-in-chip. It operates using a separate voltage supply, clock sources and resets and includes the components needed for device management. This allows the MCUSS to function continuously regardless of the state of the rest of the device. MCU SS has one or more DUAL core Cortex R5F (number of instances varies on the variant of the device, please refer the device reference manual)

MCUSW consists of two main components, Microcontroller abstraction layer (MCAL) & Demonstration applications (MCUSS Demos). Its is expected to be hosted on Cortex R5F 0 in MCU Domain or other Cortex R5F in main domain. The table below lists SoC/Cores on which MCUSW can be hosted.

Supported Devices

Device Family	Devices	Also known by other names
Jacinto	J721E	AM752X, DRA829, TDA4VM, J7ES
Jacinto	J7200	DRA821, J7VCL
Jacinto	J721S2	DRA820, TDA4VL, J7AEP
Jacinto	J784S4	TDA4VH, TDA4AH, J7AHP
Jacinto	J742S2	NA

Core Naming Conventions

SoC Family	Cores Names	Referred as	Comments
J721E	MCU R5F Core 0	mcu 1 0	Please refer the "mcusw_release_notes.html" to determine if this release supports this platform. Note that all computing cores might not be supported in MCUSW
	MCU R5F Core 1	mcu 1 1
	1ST MCU Core 0	mcu 2 0
	1ST MCU Core 1	mcu 2 1
	2ND MCU Core 0	mcu 3 0
	2ND MCU Core 1	mcu 3 1
	A72 Core 0	mpu 1 0
	A72 Core 1	mpu 1 1
	1ST C66X DSP	c66x_1
	2ND C66X DSP	c66x_2
	C7X DSP	c7x_1
J7200	MCU R5F Core 0	mcu 1 0	Please refer the "mcusw_release_notes.html" to determine if this release supports this platform. Note that all computing cores might not be supported in MCUSW
	MCU R5F Core 1	mcu 1 1
	1ST MCU Core 0	mcu 2 0
	1ST MCU Core 1	mcu 2 1
	A72 Core 0	mpu 1 0
	A72 Core 1	mpu 1 1
J721S2	MCU R5F Core 0	mcu 1 0	Please refer the "mcusw_release_notes.html" to determine if this release supports this platform. Note that all computing cores might not be supported in MCUSW
	MCU R5F Core 1	mcu 1 1
	1ST MCU Core 0	mcu 2 0
	1ST MCU Core 1	mcu 2 1
	A72 Core 0	mpu 1 0
	A72 Core 1	mpu 1 1
J784S4	MCU R5F Core 0	mcu 1 0	Please refer the "mcusw_release_notes.html" to determine if this release supports this platform. Note that all computing cores might not be supported in MCUSW
	MCU R5F Core 1	mcu 1 1
	1ST MCU Core 0	mcu 2 0
	1ST MCU Core 1	mcu 2 1
	A72 Core 0	mpu 1 0
	A72 Core 1	mpu 1 1
J742S2	MCU R5F Core 0	mcu 1 0	Please refer the "mcusw_release_notes.html" to determine if this release supports this platform. Note that all computing cores might not be supported in MCUSW
	MCU R5F Core 1	mcu 1 1
	1ST MCU Core 0	mcu 2 0
	1ST MCU Core 1	mcu 2 1
	A72 Core 0	mpu 1 0
	A72 Core 1	mpu 1 1

Getting access to MCAL

In case of Jacinto, MCUSW is a part of Jacinto Processor SDK RTOS(PSDKRA) package.

Configurator is not included as a part of the package, it would require steps below to receive the configurator
Configurator and Compliance Support Package (CSP)
1. Configurator package is required to update/modify MCAL configurations
2. For Jacinto platforms, Separate Installer for EB Configurator and CSP. This package includes plugins for J721E, J7200, J721S2, J784S4, J742S2.
3. Please contact your TI representative to get access to the configurator and CSP for respective device.
Refer (Installation Steps) for detailed installation steps

License for Configurator

EB Tresos requires license to use it refer (Installing Elektrobit Tresos) for details
EB provides limited-pool of license that could be shared by TI with its customers
1. Classified as limited-period license & permanent license
2. Limited-period license are expected to be used during development (typically 3 months, 6 months) and permanent license for production
3. In cases where development is greater than license validity period, TI can provide additional licenses
Login to MySecureSW, and Request Access to the EB Tresos Tool and License from here License Request
Once license are received
1. Follows steps listed in (Client License Administrator)
2. IMPORTANT
  1. TI shares user details with EB on quarterly basis (name of organization and email id to whom license is released, fulfillment-id and user name). EB uses this data for license administration
  2. Share Fulfillment ID : Once license is activated, the "fulfillment-id" is to be shared with FAE/TI Engineer who provided license
Third party (AUTOSAR Vendor / Other co-development organizations)
1. TI can provide the EB licenses to other third party which is engaged by customers
2. Steps and procedure will remain same as listed above
Number of licenses
1. Since TI receives finite-set of licenses from EB, TI will have to ration these among it's customers
2. Based on customer needs / business needs number of license released to customer will be restricted
3. Please request licenses on need basis

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Package Contents

MCU Demos

Demonstrates usage of various drivers / software provided for MCU SS. These applications could employ FREERTOS as OS and use MCAL and/or PDK drivers.

Listed below are application supported, demo specific pages list the supported SoC/Cores

Demo	Comments	Refer	J721E	J7200	J721S2	J784S4	J742S2
Can Profiling	Application to determine the CPU load for transmission & reception of CAN messages	(CAN Profiling Application)	Yes	Yes	Yes	Yes	Yes
CDD IPC Profiling	Application to determine the time required for transmission & reception of messages of various sizes	(CDD IPC Profiling Application)	Yes	Yes	No	No	No
Execute In Place (XIP) - Can Response Demo	Application demonstrates operating MCU Domain R5F (MCU 1 0) in XIP mode	(Execute In Place (XIP) Application)	Yes	Yes	No	No	No
Multi-Core Boot Application	Application demonstrates Booting of all cores from MCU R5F (MCU 1 0) while simultaneously sending out CAN messages	(CAN Response Application)	Yes	Yes	No	No	No
Mode Switch Application	This application demonstrates steps to switch mode from ACTIVE (full SoC powered ON) to MCU Only mode and then from MCU Only to ACTIVE mode on J721E EVM.	(Mode Switch Application)	Yes	No	No	No	No
XIP FOTA	This application demonstrates execute-in-place, where in CAN Profiling Application is executed from OSPI memory.	(Execute In Place (XIP) + Firmware Over The Air (FOTA) Application)	Yes	Yes	Yes	Yes	No

MCAL

MCAL is the lowest layer of the AUTOSAR Basic Software architecture. MCAL contains drivers with direct access to the μC internal peripherals. MCAL is a hardware specific layer that ensures a standard interface to the Basic Software.

This user guide details procedure that are common to all MCAL drivers, please refer driver specific user guide for finer details of driver.

For Jacinto Family of Devices:

MCAL position within Processor SDK RTOS Automotive

Supported Drivers

Driver	Comments	Refer	Supported SoC	Supported Cores
Adc	Driver for built-in Adc peripheral	(Adc User Guide)	J721E	MCU 1 0, MCU 2 1, MCU 2 0, MCU 3 0
			J7200	MCU 1 0, MCU 2 1
			J721S2	MCU 1 0, MCU 2 1
			J784S4	MCU 1 0, MCU 2 1
			J742S2	MCU 1 0, MCU 2 1
Can	Driver for built-in CAN peripheral	(Can User Guide)	J721E	MCU 1 0, MCU 2 1, MCU 2 0, MCU 3 0
			J7200	MCU 1 0, MCU 2 1
			J721S2	MCU 1 0, MCU 2 1
			J784S4	MCU 1 0, MCU 2 1
			J742S2	MCU 1 0, MCU 2 1
			J722S	MCU 0 0
Cdd Ipc	Driver for inter-processor communication	(Cdd Ipc User Guide)	J721E	MCU 2 1, MCU 2 0, MCU 3 0
			J7200	MCU 2 1
			J721S2	MCU 1 0, MCU 2 1
			J784S4	MCU 1 0, MCU 2 1
			J742S2	MCU 1 0, MCU 2 1
			J722S	MCU 0 0
Eth	Driver for built in CPSW 2G port	(Eth & EthTrcv User Guide)	J721E	MCU 1 0
			J7200	MCU 1 0
			J721S2	MCU 1 0
			J722S	MCU 0 0
Eth Virt Mac	Driver for external Flash Device	(Eth & EthTrcv User Guide)	J721E	MCU 2 1
			J7200	MCU 2 1
			J721S2	MCU 2 1
EthTrcv	Driver for Ethernet Transceiver and tested with DP83867	(Eth & EthTrcv User Guide)	J721E	MCU 1 0
			J7200	MCU 1 0
			J721S2	MCU 1 0
			J722S	MCU 0 0
Fls	Driver for external Flash Device	(Fls User Guide)	J721E	MCU 1 0, MCU 2 1
			J7200	MCU 1 0, MCU 2 1
			J721S2	MCU 1 0, MCU 2 1
			J784S4	MCU 1 0, MCU 2 1
			J742S2	MCU 1 0, MCU 2 1
			J722S	MCU 0 0
Gpt	Driver for General purpose timer	(Gpt User Guide)	J721E	MCU 1 0, MCU 2 1, MCU 2 0, MCU 3 0
			J7200	MCU 1 0, MCU 2 1
			J721S2	MCU 1 0, MCU 2 1
			J784S4	MCU 1 0, MCU 2 1
			J742S2	MCU 1 0, MCU 2 1
			J722S	MCU 0 0
Pwm	Driver for Pulse-width-Modulation, uses built-in General purpose timer	(Pwm User Guide)	J721E	MCU 1 0, MCU 2 1, MCU 2 0, MCU 3 0
			J7200	MCU 1 0, MCU 2 1
			J721S2	MCU 1 0, MCU 2 1
			J784S4	MCU 1 0, MCU 2 1
			J742S2	MCU 1 0, MCU 2 1
Pwm	Driver for Pulse-width-Modulation, uses built-in enhanced PWM(ehrPwm)	(Pwm User Guide)	J721E	MCU 1 0, MCU 2 1, MCU 2 0, MCU 3 0
			J7200	MCU 1 0, MCU 2 1
			J721S2	MCU 1 0, MCU 2 1
			J784S4	MCU 1 0, MCU 2 1
			J742S2	MCU 1 0, MCU 2 1
Spi	Driver for Serial Peripheral Interface	(Spi User Guide)	J721E	MCU 1 0, MCU 2 1, MCU 2 0, MCU 3 0
			J7200	MCU 1 0, MCU 2 1
			J721S2	MCU 1 0, MCU 2 1
			J784S4	MCU 1 0, MCU 2 1
			J742S2	MCU 1 0, MCU 2 1
			J722S	MCU 0 0
Dio	Driver for control of GPIO	(Dio User Guide)	J721E	MCU 1 0, MCU 2 1, MCU 2 0, MCU 3 0
			J7200	MCU 1 0, MCU 2 1
			J721S2	MCU 1 0, MCU 2 1
			J784S4	MCU 1 0, MCU 2 1
			J742S2	MCU 1 0, MCU 2 1
			J722S	MCU 0 0
Wdg	Driver for built in WWDT(Windowed Watchdog Timer)	(Wdg User Guide)	J721E	MCU 1 0, MCU 2 1, MCU 2 0, MCU 3 0
			J7200	MCU 1 0, MCU 2 1
			J721S2	MCU 1 0, MCU 2 1
			J784S4	MCU 1 0, MCU 2 1
			J742S2	MCU 1 0, MCU 2 1
			J722S	MCU 0 0
Icu	Driver for built in ICU (ECAP hardware)	(Icu User Guide)	J721E	MCU 1 0, MCU 2 1
			J7200	MCU 1 0, MCU 2 1
			J721S2	MCU 1 0, MCU 2 1
			J784S4	MCU 1 0, MCU 2 1
			J742S2	MCU 1 0, MCU 2 1
Mcu	Driver for built in MCU (CLOCK hardware)	(Mcu User Guide)	J721E	MCU 1 0, MCU 2 1
			J7200	MCU 1 0, MCU 2 1
			J721S2	MCU 1 0, MCU 2 1
			J784S4	MCU 1 0, MCU 2 1
			J742S2	MCU 1 0, MCU 2 1
			J722S	MCU 0 0

*Demo Applications would require an update to map interrupts. Refer (Porting MCAL module example applications to other cores) for detailed steps

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Dependencies

Dependencies can be categorized as listed below. Please note that depending on the intended use, the dependencies vary (e.g. for integration vs running demo applications only)

Hardware Dependencies (Hardware Dependencies)
Software Dependencies (Software Dependencies)

Hardware Dependencies

Please refer to the Jacinto Device SDK User Guides for Hardware Boot Mode details.

Built in emulator

Jacinto EVMs includes an on-board XDS110 USB emulator, which could be used with CCS. Please refer to ti.com or contact your FAE for documents describing the EVM.

Emulator

An external emulator such as Spectrum Digital XDS560V2 could be used, all steps remain identical to steps listed in (Built in emulator) with creation of Target Configuration being the exception.

While creating the target, please select the emulator that is being used.

Software Dependencies

For Jacinto Family of Devices:

MCUSW is delivered as part of SDK. All SW dependencies will be part of the SDK packaging. Please refer to release notes per release for updated information on supported Compilers.

PDK

"PDK" is a component within PSDKRA. Following section list the sub-components of PDK that are used / required by MCAL modules.

Please check release note that came with this release for the compatible version of PDK/SDK

UDMA

UDMA is used to move data between peripherals and memory.

The Eth MCAL module relies on UDMA driver.
The SPI MCAL module relies on PDK UDMA driver.

MCAL Example Application

Applications rely on SCI Client to request interrupt number as resource
Applications rely on OSAL to register MCAL modules interrupts
Applications rely on UART driver to print on console

MCU SW Demo Application

Applications rely on FREERTOS for OS features such as
- Task's
- Sempahores
- Interrupt handling
Applications rely on PDK UART driver to print on console
For MCU21 applications, please note that sciserver_testapp needs to be run on mcu1_0 core.

MCAL module dependencies on PDK

The table below lists each module dependencies on PDK components

MCAL	CSL	UDMA PDK Library	SCIClient (Only MCAL Examples)	IPC Baremetal
Adc	NO	NO	YES	NO
Can	NO	NO	YES	NO
CddIpc	NO	NO	YES	NO
Dio	NO	NO	YES	NO
Eth	NO	NO	YES	YES
Fls	NO	NO	YES	NO
Gpt	NO	NO	YES	NO
Pwm	NO	NO	YES	NO
Spi	NO	YES	YES	NO
Wdg	NO	NO	YES	NO
Icu	NO	NO	YES	NO
Mcu	NO	NO	YES	NO

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MCAL Compiler and Assembler Settings Documentation

This document provides an overview of the compiler and assembler settings required for MCAL product line deliverables. These settings are essential for ensuring that the code is optimized for performance, code size, and safety compliance.

Summary of Compiler and Assembler Settings

Category	Flag/Value	Description
Target Architecture	`-mcpu=cortex-r5`	Targets the ARM Cortex-R5 processor.
	`-mfpu=vfpv3-d16`	Specifies the VFPv3-D16 FPU for floating-point operations.
	`-mthumb`	Enables Thumb instruction set for smaller code size and efficient memory usage.
Optimization Levels	`-Oz`	Optimizes for code size; minimizes the binary size at the expense of reduced execution speed.
	`-O3`	Optimizes for performance; maximizes execution speed but may increase code size.
Warning Suppressions	`-Wno-extern-initializer`	Suppresses warnings for external initializers.
	`-Wno-unused-command-line-argument`	Suppresses warnings for unused command-line arguments.
	`-Wno-unused-function`	Suppresses warnings for unused functions.
	`-Wno-excess-initializers`	Suppresses warnings for excess initializers in structures.
	Additional C++ warnings	Various flags such as `-Wno-c++11-narrowing`, `-Wno-writable-strings` to handle compatibility with older or special C++ features.
Error Handling	`-Werror`	Treats all warnings as errors, enforcing strict code quality.
Linker Flags	`--ram_model`	Configures the linker to optimize for execution from RAM.
	`--reread_libs`	Forces the linker to re-read libraries, ensuring all required symbols are available.
	`--diag_suppress=10083`	Suppresses specific linker diagnostics (e.g., warning codes).
Assembler Flags	`-me`	Specifies the endianness (`-me` for little-endian).
	`-g`	Generates debugging information in the assembled output, useful for debugging.
	`-mthumb`	Configures the assembler to use Thumb instructions, which generate compact and efficient code for embedded devices.
	`--diag_warning=225`	Converts diagnostic code `225` to a warning rather than an error.
Debug Symbols	`-g`	Enables debugging symbols in the compiled code, useful for stepping through code during debugging.

Detailed Descriptions

1. Target Architecture

The target architecture specifies the hardware environment for which the code is being built:

-mcpu=cortex-r5: This flag instructs the compiler to generate code optimized for the ARM Cortex-R5 CPU.
-mfpu=vfpv3-d16: Enables support for the VFPv3-D16 floating-point unit.
-mthumb: Generates code in the ARM Thumb instruction set, which is often used for its smaller instruction encoding, ideal for memory-constrained environments.

2. Optimization Levels

The optimization level impacts the performance and size of the generated code:

**-Oz**: Minimizes the code size, often used for memory-constrained systems where the main focus is on reducing the footprint.
**-O3**: Maximizes performance by applying aggressive optimizations that may increase the overall code size. Best suited for scenarios where performance is critical.

3. Warning Suppressions

To maintain focus on relevant warnings, the following flags suppress less relevant warnings:

-Wno-extern-initializer: Suppresses warnings regarding external initializers.
-Wno-unused-command-line-argument: Suppresses warnings for unused command-line arguments.
Additional C++ Flags: C++ builds use extra flags such as -Wno-c++11-narrowing to handle potential issues arising from compatibility with C++11 features.

4. Error Handling

To ensure high code quality, **-Werror** is used, treating all warnings as errors, thus stopping the build until all warnings are resolved.

5. Linker Flags

The following linker flags are used to optimize memory handling:

**--ram_model**: Directs the linker to optimize for running the application from RAM.
**--reread_libs**: Ensures that the linker re-reads libraries to pick up required symbols.
**--diag_suppress=10083**: Suppresses specific diagnostic warnings, making the build output less cluttered.

6. Assembler Flags

The assembler flags are used when generating object files from .asm or .S assembly source files:

**-me**: Specifies the endianness, with -me indicating little-endian.
**-g**: Includes debugging symbols to help with debugging at the assembly level.
**-mthumb**: Uses Thumb instructions for efficient code generation.
**--diag_warning=225**: Converts the specified diagnostic into a warning, avoiding a build error.

7. Debug Symbols

The **-g** flag enables the inclusion of debugging symbols in the output, which are vital for troubleshooting during development. This flag is typically used for debug builds.

IDE (CCS)

Code Composer Studio is an integrated development environment (IDE) that supports TI's Microcontroller and Embedded Processors portfolio.

Please refer to Release Notes to find the supported CCS Version. Please refer to SDK User Guides for CCS Setup instructions.

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