PDK API Guide for J721E
RegisterIntr.h
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48 #ifndef ti_osal_RegisterIntr__include
49 #define ti_osal_RegisterIntr__include
50 
51 #include <ti/osal/EventCombinerP.h>
52 #include <ti/osal/HwiP.h>
53 #include <ti/osal/MuxIntcP.h>
54 
55 #ifdef __cplusplus
56 extern "C" {
57 #endif
58 
59 #include <stdint.h>
60 #include <stdbool.h>
61 #include <stddef.h>
62 typedef void (*Osal_IsrRoutine)(uintptr_t arg);
66 typedef struct {
67  char *name;
68  int32_t corepacEventNum;
69  int32_t intVecNum;
71  uintptr_t arg;
72  uint32_t priority;
84  uint32_t triggerSensitivity;
92  uint32_t enableIntr;
95 #ifdef QNX_OS
96  uint32_t intAutoEnable;
97 #endif
99 
103 #define OSAL_REGINT_INTVEC_EVENT_COMBINER (16)
104 
108 typedef struct {
112 
120 typedef struct {
126 
135 typedef int32_t OsalInterruptRetCode_e;
137 #define OSAL_INT_SUCCESS ((int32_t) 0)
138 
139 #define OSAL_INT_ERR_INVALID_PARAMS ((int32_t) -1)
140 
141 #define OSAL_INT_ERR_HWICREATE ((int32_t) -2)
142 
143 #define OSAL_INT_ERR_EVENTCOMBINER_REG ((int32_t) -3)
144 
145 #define OSAL_INT_ERR_DELETE ((int32_t) -4)
146 
147 #define OSAL_INT_UNSUPPORTED ((int32_t) -5)
148 /* @} */
149 
160  HwiP_DirectFxn isrFxn, HwiP_Handle *hwiPHandlePtr);
170 OsalInterruptRetCode_e Osal_DeleteInterrupt(HwiP_Handle hwiPhandle,int32_t corepacEventNum);
175 void Osal_EnableInterrupt(int32_t corepacEvent,int32_t interruptNum);
180 void Osal_DisableInterrupt(int32_t corepacEvent,int32_t interruptNum);
185 void Osal_ClearInterrupt(int32_t corepacEvent,int32_t interruptNum);
186 #ifdef __cplusplus
187 }
188 #endif
189 
190 #endif /* ti_osal_RegisterIntr__include */
191 /* @} */
void(* Osal_IsrRoutine)(uintptr_t arg)
Definition: RegisterIntr.h:62
Osal_IsrRoutine isrRoutine
Definition: RegisterIntr.h:70
Event Combiner routines for the RTOS Porting Interface.
OsalInterruptRetCode_e Osal_RegisterInterrupt(OsalRegisterIntrParams_t *interruptRegParams, HwiP_Handle *hwiPHandlePtr)
Function to register interrupt with parameters provided.
void Osal_RegisterInterrupt_initParams(OsalRegisterIntrParams_t *interruptRegParams)
Function to initialize the interrupt registration configuration data structure.
void Osal_ClearInterrupt(int32_t corepacEvent, int32_t interruptNum)
Function to clear the interrupt corresponding to an event number.
OsalInterruptRetCode_e Osal_DeleteInterrupt(HwiP_Handle hwiPhandle, int32_t corepacEventNum)
Function to delete interrupt corresponding to an event number.
OsalInterruptRetCode_e Osal_RegisterInterruptDirect(OsalRegisterIntrParams_t *interruptRegParams, HwiP_DirectFxn isrFxn, HwiP_Handle *hwiPHandlePtr)
Function to register direct interrupt with parameters provided.
Basic MuxIntcP Input Parameters.
Definition: MuxIntcP.h:99
void * HwiP_Handle
Opaque client reference to an instance of a HwiP.
Definition: HwiP.h:81
Interrupt Configuration parameters This is the data structure used to configure the interrupts in the...
Definition: RegisterIntr.h:120
Interrupt Configuration parameters for the corepac (c6x/a15/m5/a8/a9)
Definition: RegisterIntr.h:66
void(* HwiP_DirectFxn)(void)
Prototype for the entry function for a hardware interrupt registered using HwiP_createDirect.
Definition: HwiP.h:127
OsalRegisterIntParams_corepac_t corepacConfig
Definition: RegisterIntr.h:121
int32_t OsalInterruptRetCode_e
Return error codes for Osal Interrupt functions.
Definition: RegisterIntr.h:135
Basic MuxIntcP Output Parameters.
Definition: MuxIntcP.h:114
uintptr_t arg
Definition: RegisterIntr.h:71
Interrupt Controller Mux module for the RTOS Porting Interface.
MuxIntcP_inParams * muxInParams
Definition: RegisterIntr.h:109
char * name
Definition: RegisterIntr.h:67
void Osal_DisableInterrupt(int32_t corepacEvent, int32_t interruptNum)
Function to disable the interrupt corresponding to an event number.
uint32_t priority
Definition: RegisterIntr.h:72
void Osal_EnableInterrupt(int32_t corepacEvent, int32_t interruptNum)
Function to enable the interrupt corresponding to an event number.
OsalRegisterIntParams_socmux_t socMuxConfig
Definition: RegisterIntr.h:122
Interrupt Configuration parameters for soc mux prior to reaching the core.
Definition: RegisterIntr.h:108
MuxIntcP_outParams * muxOutParams
Definition: RegisterIntr.h:110
uint32_t triggerSensitivity
Definition: RegisterIntr.h:84
int32_t corepacEventNum
Definition: RegisterIntr.h:68
int32_t intVecNum
Definition: RegisterIntr.h:69
uint32_t enableIntr
Definition: RegisterIntr.h:92
Hardware Interrupt module for the RTOS Porting Interface.