PDK API Guide for J721E
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Interface file for RAW FE module, Defines the structures / control operations that could be used to configure / control RAW FE module in VISS.
The processing pipeline in the RAW FE module is PWL -> DC Subtraction -> White Balance -> Decompanding LUT -> Merge -> Companding -> DPC -> LSC -> Whitebalance/gain Offset.
Go to the source code of this file.
Data Structures | |
struct | Rfe_Wb1Config |
White balance configuration structure There are two white balance modules in the RAW FE. This structure is used for configuring WB module, just before PWL. It is also used to configure DC offset and mask.. More... | |
struct | Rfe_PwlConfig |
PWL configuration Structure Used for configuring All three PWL modules one by one. Can be used even for configuring mask/shift and dc subtraction. More... | |
struct | Rfe_WdrConfig |
WDR Merge configuration Structure Used for configuring both the WDR Merge blocks in VPAC individually. More... | |
struct | Rfe_DpcOtfConfig |
DPC OTF configuration Structure When both DPC LUT and DPC OTF are enabled, this DPC OTF gets applied after DPC LUT. Automatically detecting the defects based on thresholds and slopes Preferred method when exact location of the defective pixels is not known. More... | |
struct | Rfe_DpcLutConfig |
DPC Lut configuration Structure When both DPC LUT and DPC OTF are enabled, this DPC LUT gets applied first. At max, 256 defective pixels can be corrected using DPC LUT. Used when exact location of the (typically manufacturing )defective pixels are known. More... | |
struct | Rfe_LscConfig |
LSC configuration Structure Lens shading corretion is applied after DPC. It uses loopup table containig gains for each color component, applies it to pixel. Lookup table is for the entire image. More... | |
struct | Rfe_GainOfstConfig |
White Balance configuration Structure Used for white balance correction Used for digital gain to be applied if the image is too dark even after analog gain and exposure time have been set to the maximum. Allows to set gain independently for each channel, the gain value can range from 0 to 31.996 in steps of 1/256. More... | |
struct | Rfe_H3aInConfig |
H3A Input Configuration structure Used to configure input modules for the H3A Used to select input to the H3A module and also Lut configuration for H3A input. More... | |
struct | Rfe_Control |
RAWFE control structure, passed as an argument to IOCTL_RFE_SET_CONFIG. More... | |
Macros | |
#define | RFE_DPC_OTF_LUT_SIZE (8U) |
#define | RFE_DPC_LUT_SIZE (256U) |
#define | RFE_COMP_DECOMP_LUT_SIZE (639U) |
#define | RFE_H3A_COMP_LUT_SIZE (639U) |
#define | RFE_LSC_TBL_SIZE (4758U) |
#define | RFE_MAX_COLOR_COMP (4U) |
Ioctls for the RAW FE module | |
#define | IOCTL_RFE_SET_CONFIG |
Used for setting individual RAWFE sub-module's configuration. Single ioctl for configuring all sub-module's configuration, by selecting module id and setting appropriate pointer in Rfe_Control. More... | |
LSE Gain Format | |
#define | RFE_LSC_GAIN_FMT_U8Q8 (0U) |
#define | RFE_LSC_GAIN_FMT_U8Q8_1 (1U) |
#define | RFE_LSC_GAIN_FMT_U8Q7 (2U) |
#define | RFE_LSC_GAIN_FMT_U8Q7_1 (3U) |
#define | RFE_LSC_GAIN_FMT_U8Q6 (4U) |
#define | RFE_LSC_GAIN_FMT_U8Q6_1 (5U) |
#define | RFE_LSC_GAIN_FMT_U8Q5 (6U) |
#define | RFE_LSC_GAIN_FMT_U8Q5_1 (7U) |
#define | RFE_LSC_GAIN_FMT_MAX (0x8U) |
LSC LUT Down Scaling Factor | |
#define | RFE_LSC_DS_FACTOR_8 (3U) |
#define | RFE_LSC_DS_FACTOR_16 (4U) |
#define | RFE_LSC_DS_FACTOR_32 (5U) |
#define | RFE_LSC_DS_FACTOR_64 (6U) |
#define | RFE_LSC_DS_FACTOR_128 (7U) |
#define | RFE_LSC_DS_FACTOR_MAX (8U) |
H3A Input Select | |
#define | RFE_H3A_IN_SEL_LONG_FRAME (0U) |
#define | RFE_H3A_IN_SEL_SHOFT_FRAME (1U) |
#define | RFE_H3A_IN_SEL_VSHOFT_FRAME (2U) |
#define | RFE_H3A_IN_SEL_LSC_OUT_FRAME (3U) |
#define | RFE_H3A_IN_SEL_MAX (4U) |
RAW FE Submodule | |
Defines the sub-modules within RAWFE. RFE supports only one IOCTL, IOCTL_RFE_SET_CONFIG. Using this ioctl, the configuration for all modules can be set by selecting appropriate module in Rfe_Control and setting the correct pointer. | |
#define | RFE_MODULE_WB1_DC_SUB_MASK (0x0U) |
#define | RFE_MODULE_PWL1 (0x1U) |
#define | RFE_MODULE_PWL2 (0x2U) |
#define | RFE_MODULE_PWL3 (0x3U) |
#define | RFE_MODULE_DECOMP_LUT1 (0x4U) |
#define | RFE_MODULE_DECOMP_LUT2 (0x5U) |
#define | RFE_MODULE_DECOMP_LUT3 (0x6U) |
#define | RFE_MODULE_WDR_MERGE_MA1 (0x7U) |
#define | RFE_MODULE_WDR_MERGE_MA2 (0x8U) |
#define | RFE_MODULE_COMP_LUT (0x9U) |
#define | RFE_MODULE_DPC_LUT (0xAU) |
#define | RFE_MODULE_DPC_OTF (0xBU) |
#define | RFE_MODULE_LSC (0xCU) |
#define | RFE_MODULE_GAIN_OFST (0xDU) |
#define | RFE_MODULE_H3A (0xEU) |
#define | RFE_MODULE_H3A_LUT (0xFU) |
Functions | |
static void | RfeControl_init (Rfe_Control *ctrl) |