CaptureMSP432.h File Reference

Detailed Description

Capture driver interface for MSP432 devices.

===========================================================================

Operation

The Capture driver for MSP432 leverages the Timer_A peripheral of the MSP432 devive. It is important to note that each instance of the Capture driver will occupy exactly one Timer_A peripheral on the device. This is done to reduce contingencies and conflicts that might arise from using more than one Capture/Compare registers on a Timer_A peripheral. The specific Capture/Compare register that is used by the Capture module is determined automatically by the pin assignment. Pin assignments can also take advantage of the pin mapping peripheral of the MSP432. If a pin mapped pin is given as the capturePort parameter of the CaptureMSP432_HWAttrs structure, the implementation of the driver will automatically configure the PMAP module with the correct/corresponding pin assignments.

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#include <ti/drivers/dpl/HwiP.h>
#include <ti/drivers/timer/TimerMSP432.h>
#include <ti/drivers/Capture.h>

Include dependency graph for CaptureMSP432.h:

Go to the source code of this file.

Data Structures
struct	CaptureMSP432_HWAttrs
	CaptureMSP432 Hardware Attributes. More...
struct	CaptureMSP432_Object
	CaptureMSP432 Object Driver specific structure that takes care of various driver parameters such as hardware interrupts and callbacks. The application should not modify any members of this structure. More...

Macros
#define	CAPTUREMSP432_INT_OFS   24
#define	CAPTUREMSP432_CCR_OFS   16
#define	CAPTUREMSP432_PMAP_OFS   8
#define	CaptureMSP432_P2_0_TA0
#define	CaptureMSP432_P2_0_TA1
#define	CaptureMSP432_P2_1_TA0
#define	CaptureMSP432_P2_1_TA1
#define	CaptureMSP432_P2_2_TA0
#define	CaptureMSP432_P2_2_TA1
#define	CaptureMSP432_P2_3_TA0
#define	CaptureMSP432_P2_3_TA1
#define	CaptureMSP432_P2_4_TA0
#define	CaptureMSP432_P2_4_TA1
#define	CaptureMSP432_P2_5_TA0
#define	CaptureMSP432_P2_5_TA1
#define	CaptureMSP432_P2_6_TA0
#define	CaptureMSP432_P2_6_TA1
#define	CaptureMSP432_P2_7_TA0
#define	CaptureMSP432_P2_7_TA1
#define	CaptureMSP432_P3_0_TA0
#define	CaptureMSP432_P3_0_TA1
#define	CaptureMSP432_P3_1_TA0
#define	CaptureMSP432_P3_1_TA1
#define	CaptureMSP432_P3_2_TA0
#define	CaptureMSP432_P3_2_TA1
#define	CaptureMSP432_P3_3_TA0
#define	CaptureMSP432_P3_3_TA1
#define	CaptureMSP432_P3_4_TA0
#define	CaptureMSP432_P3_4_TA1
#define	CaptureMSP432_P3_5_TA0
#define	CaptureMSP432_P3_5_TA1
#define	CaptureMSP432_P3_6_TA0
#define	CaptureMSP432_P3_6_TA1
#define	CaptureMSP432_P3_7_TA0
#define	CaptureMSP432_P3_7_TA1
#define	CaptureMSP432_P5_6_TA2
#define	CaptureMSP432_P5_7_TA2
#define	CaptureMSP432_P6_6_TA2
#define	CaptureMSP432_P6_7_TA2
#define	CaptureMSP432_P7_0_TA0
#define	CaptureMSP432_P7_0_TA1
#define	CaptureMSP432_P7_1_TA0
#define	CaptureMSP432_P7_1_TA1
#define	CaptureMSP432_P7_2_TA0
#define	CaptureMSP432_P7_2_TA1
#define	CaptureMSP432_P7_3_TA0
#define	CaptureMSP432_P7_3_TA1
#define	CaptureMSP432_P7_4_TA0
#define	CaptureMSP432_P7_4_TA1
#define	CaptureMSP432_P7_5_TA0
#define	CaptureMSP432_P7_5_TA1
#define	CaptureMSP432_P7_6_TA0
#define	CaptureMSP432_P7_6_TA1
#define	CaptureMSP432_P7_7_TA0
#define	CaptureMSP432_P7_7_TA1
#define	CaptureMSP432_P8_0_TA1
#define	CaptureMSP432_P8_1_TA2
#define	CaptureMSP432_P8_2_TA3
#define	CaptureMSP432_P9_2_TA3
#define	CaptureMSP432_P9_3_TA3
#define	CaptureMSP432_P10_4_TA3
#define	CaptureMSP432_P10_5_TA3

Typedefs
typedef struct CaptureMSP432_HWAttrs	CaptureMSP432_HWAttrs
	CaptureMSP432 Hardware Attributes. More...
typedef struct CaptureMSP432_Object	CaptureMSP432_Object
	CaptureMSP432 Object Driver specific structure that takes care of various driver parameters such as hardware interrupts and callbacks. The application should not modify any members of this structure. More...

Functions
void	CaptureMSP432_close (Capture_Handle handle)
int_fast16_t	CaptureMSP432_control (Capture_Handle handle, uint_fast16_t cmd, void *arg)
void	CaptureMSP432_init (Capture_Handle handle)
Capture_Handle	CaptureMSP432_open (Capture_Handle handle, Capture_Params *params)
void	CaptureMSP432_start (Capture_Handle handle)
void	CaptureMSP432_stop (Capture_Handle handle)

Variables
CaptureMSP432_Object	captureMSP432Objects []
TimerMSP432_Object	timerMSP432Objects []
const uint8_t	Capture_count
Capture_FxnTable	CaptureMSP432_captureFxnTable

Macro Definition Documentation

#define CAPTUREMSP432_INT_OFS   24

#define CAPTUREMSP432_CCR_OFS   16

#define CAPTUREMSP432_PMAP_OFS   8

#define CaptureMSP432_P2_0_TA0

Value:

((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) |    \
                               0x20 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) |   \
                               (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P2_0_TA1

Value:

((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) |    \
                               0x20 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) |   \
                               (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P2_1_TA0

Value:

((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) |    \
                               0x21 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) |   \
                               (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P2_1_TA1

Value:

((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) |    \
                               0x21 | (INT_TA2_N << CAPTUREMSP432_INT_OFS) |   \
                               (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P2_2_TA0

Value:

((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) |    \
                               0x22 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) |   \
                               (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P2_2_TA1

Value:

((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) |    \
                               0x22 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) |   \
                               (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P2_3_TA0

Value:

((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) |    \
                               0x23 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) |   \
                               (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P2_3_TA1

Value:

((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) |    \
                               0x23 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) |   \
                               (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P2_4_TA0

Value:

((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) |    \
                               0x24 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) |   \
                               (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P2_4_TA1

Value:

((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) |    \
                               0x24 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) |   \
                               (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P2_5_TA0

Value:

((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) |    \
                               0x25 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) |   \
                               (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P2_5_TA1

Value:

((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) |    \
                               0x25 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) |   \
                               (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P2_6_TA0

Value:

((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) |    \
                               0x26 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) |   \
                               (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P2_6_TA1

Value:

((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) |    \
                               0x26 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) |   \
                               (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P2_7_TA0

Value:

((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) |    \
                               0x27 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) |   \
                               (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P2_7_TA1

Value:

((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) |    \
                               0x27 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) |   \
                               (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P3_0_TA0

Value:

((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) |    \
                               0x30 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) |   \
                               (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P3_0_TA1

Value:

((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) |    \
                               0x30 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) |   \
                               (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P3_1_TA0

Value:

((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) |    \
                               0x31 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) |   \
                               (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P3_1_TA1

Value:

((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) |    \
                               0x31 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) |   \
                               (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P3_2_TA0

Value:

((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) |    \
                               0x32 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) |   \
                               (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P3_2_TA1

Value:

((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) |    \
                               0x32 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) |   \
                               (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P3_3_TA0

Value:

((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) |    \
                               0x33 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) |   \
                               (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P3_3_TA1

Value:

((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) |    \
                               0x33 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) |   \
                               (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P3_4_TA0

Value:

((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) |    \
                               0x34 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) |   \
                               (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P3_4_TA1

Value:

((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) |    \
                               0x34 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) |   \
                               (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P3_5_TA0

Value:

((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) |    \
                               0x35 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) |   \
                               (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P3_5_TA1

Value:

((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) |    \
                               0x35 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) |   \
                               (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P3_6_TA0

Value:

((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) |    \
                               0x36 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) |   \
                               (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P3_6_TA1

Value:

((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) |    \
                               0x36 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) |   \
                               (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P3_7_TA0

Value:

((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) |    \
                               0x37 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) |   \
                               (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P3_7_TA1

Value:

((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) |    \
                               0x37 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) |   \
                               (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P5_6_TA2

Value:

(0x56 | (INT_TA2_N << CAPTUREMSP432_INT_OFS) |  \
        (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P5_7_TA2

Value:

(0x57 | (INT_TA2_N << CAPTUREMSP432_INT_OFS) |  \
        (TIMER_A_CAPTURECOMPARE_REGISTER_2 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P6_6_TA2

Value:

(0x66 | (INT_TA2_N << CAPTUREMSP432_INT_OFS) |  \
        (TIMER_A_CAPTURECOMPARE_REGISTER_3 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P6_7_TA2

Value:

(0x67 | (INT_TA2_N << CAPTUREMSP432_INT_OFS) |  \
        (TIMER_A_CAPTURECOMPARE_REGISTER_4 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P7_0_TA0

Value:

((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) |    \
                               0x70 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) |   \
                               (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P7_0_TA1

Value:

((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) |    \
                               0x70 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) |   \
                               (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P7_1_TA0

Value:

((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) |    \
                               0x71 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) |   \
                               (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P7_1_TA1

Value:

((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) |    \
                               0x71 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) |   \
                               (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P7_2_TA0

Value:

((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) |    \
                               0x72 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) |   \
                               (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P7_2_TA1

Value:

((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) |    \
                               0x72 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) |   \
                               (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P7_3_TA0

Value:

((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) |    \
                               0x73 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) |   \
                               (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P7_3_TA1

Value:

((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) |    \
                               0x73 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) |   \
                               (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P7_4_TA0

Value:

((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) |    \
                               0x74 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) |   \
                               (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P7_4_TA1

Value:

((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) |    \
                               0x74 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) |   \
                               (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P7_5_TA0

Value:

((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) |    \
                               0x75 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) |   \
                               (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P7_5_TA1

Value:

((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) |    \
                               0x75 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) |   \
                               (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P7_6_TA0

Value:

((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) |    \
                               0x76 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) |   \
                               (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P7_6_TA1

Value:

((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) |    \
                               0x76 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) |   \
                               (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P7_7_TA0

Value:

((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) |    \
                               0x77 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) |   \
                               (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P7_7_TA1

Value:

((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) |    \
                               0x77 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) |   \
                               (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P8_0_TA1

Value:

(0x80 | (INT_TA1_0 << CAPTUREMSP432_INT_OFS) |  \
        (TIMER_A_CAPTURECOMPARE_REGISTER_0 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P8_1_TA2

Value:

(0x81 | (INT_TA2_0 << CAPTUREMSP432_INT_OFS) |  \
        (TIMER_A_CAPTURECOMPARE_REGISTER_0 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P8_2_TA3

Value:

(0x82 | (INT_TA3_N << CAPTUREMSP432_INT_OFS) |  \
        (TIMER_A_CAPTURECOMPARE_REGISTER_2 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P9_2_TA3

Value:

(0x92 | (INT_TA3_N << CAPTUREMSP432_INT_OFS) |  \
        (TIMER_A_CAPTURECOMPARE_REGISTER_3 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P9_3_TA3

Value:

(0x93 | (INT_TA3_N << CAPTUREMSP432_INT_OFS) |  \
        (TIMER_A_CAPTURECOMPARE_REGISTER_4 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P10_4_TA3

Value:

(0xA4 | (INT_TA3_0 << CAPTUREMSP432_INT_OFS) | \
        (TIMER_A_CAPTURECOMPARE_REGISTER_0 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P10_5_TA3

Value:

(0xA5 | (INT_TA3_1 << CAPTUREMSP432_INT_OFS) | \
        (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

Typedef Documentation

typedef struct CaptureMSP432_HWAttrs CaptureMSP432_HWAttrs

CaptureMSP432 Hardware Attributes.

Capture hardware attributes that tell the CaptureMSP432 driver specific hardware configurations and interrupt/priority settings.

A sample structure is shown below:

const TimerMSP432_HWAttrs timerMSP432HWAttrs[] =
{
    {
        .timerBaseAddress = TIMER_A1_BASE,
        .clockSource = TIMER_A_CLOCKSOURCE_ACLK,
        .clockDivider = TIMER_A_CLOCKSOURCE_DIVIDER_64,
        .capturePort = CaptureMSP432_P7_7_TA1,
        .intPriority = ~0
    }
};

typedef struct CaptureMSP432_Object CaptureMSP432_Object

CaptureMSP432 Object Driver specific structure that takes care of various driver parameters such as hardware interrupts and callbacks. The application should not modify any members of this structure.

Function Documentation

void CaptureMSP432_close

(

Capture_Handle

handle

)

int_fast16_t CaptureMSP432_control	(	Capture_Handle	handle,
		uint_fast16_t	cmd,
		void *	arg
	)

void CaptureMSP432_init

(

Capture_Handle

handle

)

Capture_Handle CaptureMSP432_open	(	Capture_Handle	handle,
		Capture_Params *	params
	)

void CaptureMSP432_start

(

Capture_Handle

handle

)

void CaptureMSP432_stop

(

Capture_Handle

handle

)

Variable Documentation

CaptureMSP432_Object captureMSP432Objects[]

TimerMSP432_Object timerMSP432Objects[]

const uint8_t Capture_count

Capture_FxnTable CaptureMSP432_captureFxnTable