Structure defining BiSSC interface.
Firmware config, command and channel interface
Data Fields | |
volatile uint8_t | pos_crc_len |
volatile uint8_t | rx_clk_freq |
volatile uint8_t | ctrl_cmd_crc_len |
volatile uint8_t | channel |
volatile uint8_t | status [3] |
volatile uint8_t | primary_core_mask |
volatile uint8_t | cycle_trigger [3] |
volatile uint8_t | measure_proc_delay |
volatile uint8_t | opmode [3] |
struct enc_len | enc_len [3] |
volatile uint8_t | valid_bit_idx |
volatile uint8_t | fifo_bit_idx |
volatile uint8_t | ctrl_cmd_status [3] |
volatile uint16_t | proc_delay [3] |
volatile uint32_t | ctrl_cmd [3] |
volatile uint32_t | max_proc_delay |
struct pos_data_res | pos_data_res [3] |
struct ctrl_res | ctrl_res [3] |
volatile uint8_t | execution_state [3] |
volatile uint64_t | register_backup [3] |
volatile uint8_t | bissc_re_measure_proc_delay |
volatile uint8_t | has_safety [3] |
volatile uint16_t | safety_crc [3][3] |
volatile uint32_t | delay_40us |
volatile uint32_t | delay_100ms |
volatile uint64_t | icssg_clk |
volatile uint8_t bissc_pruicss_xchg::pos_crc_len |
Position data CRC length
volatile uint8_t bissc_pruicss_xchg::rx_clk_freq |
Clock frequency
volatile uint8_t bissc_pruicss_xchg::ctrl_cmd_crc_len |
Control command CRC length
volatile uint8_t bissc_pruicss_xchg::channel |
Channel configuration
volatile uint8_t bissc_pruicss_xchg::status[3] |
Firmware initialization status
volatile uint8_t bissc_pruicss_xchg::primary_core_mask |
Primary core mask incase of load share
volatile uint8_t bissc_pruicss_xchg::cycle_trigger[3] |
BiSSC cycle complete status
volatile uint8_t bissc_pruicss_xchg::measure_proc_delay |
measure processing delay - do this for every config change
volatile uint8_t bissc_pruicss_xchg::opmode[3] |
operation mode status: '0' for periodic trigger and '1' for host trigger
struct enc_len bissc_pruicss_xchg::enc_len[3] |
position data lengths(resolution) of BiSSC encoders connected
volatile uint8_t bissc_pruicss_xchg::valid_bit_idx |
channel Bit Index
volatile uint8_t bissc_pruicss_xchg::fifo_bit_idx |
Fifo Bit Index(middle bit)
volatile uint8_t bissc_pruicss_xchg::ctrl_cmd_status[3] |
control communication status
volatile uint16_t bissc_pruicss_xchg::proc_delay[3] |
automatically estimated processing delay
volatile uint32_t bissc_pruicss_xchg::ctrl_cmd[3] |
Hex equivalent Control command
volatile uint32_t bissc_pruicss_xchg::max_proc_delay |
maximum processing delay for selected frequency
struct pos_data_res bissc_pruicss_xchg::pos_data_res[3] |
Channel specific position data results
struct ctrl_res bissc_pruicss_xchg::ctrl_res[3] |
Channel specific control communication results
volatile uint8_t bissc_pruicss_xchg::execution_state[3] |
Execution state for different channels in load share
volatile uint64_t bissc_pruicss_xchg::register_backup[3] |
Backup registers for ch0 - ch2
volatile uint8_t bissc_pruicss_xchg::bissc_re_measure_proc_delay |
Flag for measuring processing delay again
volatile uint8_t bissc_pruicss_xchg::has_safety[3] |
Flag for BiSS-C safety mode
volatile uint16_t bissc_pruicss_xchg::safety_crc[3][3] |
16-bit CRC calculated for safety
volatile uint32_t bissc_pruicss_xchg::delay_40us |
BiSS-C Timeout delay
volatile uint32_t bissc_pruicss_xchg::delay_100ms |
BiSS-C max interframe delay
volatile uint64_t bissc_pruicss_xchg::icssg_clk |
ICSSG core clock frequency