nikon_drv.h File Reference

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Data Structures
struct	nikon_clk_cfg
	Structure defining 3-ch peripheral interface clock configuration for selected frequency. More...
struct	pos_data_info
struct	enc_info
struct	alm_bits
	Structure defining Alarm bits receivedd by the encoder. More...
struct	nikon_priv
	Initialize NIKON firmware interface address and get the pointer to struct nikon_priv instance. More...

Macros
#define	NIKON_MODE_SINGLE_CHANNEL_SINGLE_PRU   (0U)
#define	NIKON_MODE_MULTI_CHANNEL_SINGLE_PRU   (1U)
#define	NIKON_MODE_MULTI_CHANNEL_MULTI_PRU   (2U)
#define	NIKON_MAX_CYCLE_TIMEOUT   35
#define	NUM_ED_CH_MAX   3
#define	NUM_ENCODERS_MAX   3
#define	NUM_MDF_CMD_MAX   3
#define	NIKON_RX_SAMPLE_SIZE_16MHZ   3 /* 4x over sample rate */
#define	NIKON_RX_SAMPLE_SIZE_6_67MHZ   5 /* 6x over sample rate */
#define	NIKON_RX_SAMPLE_SIZE   7 /* 8x over sample rate */
#define	NIKON_FREQ_2_5MHZ   2.5 /* 2.5 MHz frequency */
#define	NIKON_FREQ_4MHZ   4 /* 4 MHz frequency */
#define	NIKON_FREQ_6_67MHZ   6 /* 6.67 MHz frequency */
#define	NIKON_FREQ_8MHZ   8 /* 8 MHz frequency */
#define	NIKON_FREQ_16MHZ   16 /* 16 MHz frequency */
#define	NIKON_POS_CRC_LEN   8
#define	NIKON_POS_DATA_LEN_DEFAULT   17
#define	NIKON_ENABLE_CYCLE_TRIGGER   0x1
#define	NIKON_DISABLE_CYCLE_TRIGGER   0x0
#define	NIKON_CONFIG_PERIODIC_TRIGGER_MODE   0x0
#define	NIKON_CONFIG_HOST_TRIGGER_MODE   0x1
#define	NIKON_CLEAR_STATUS_FLAG   0x0
#define	NIKON_SET_STATUS_FLAG   0x1
#define	NIKON_CHANNEL0_MASK   0x1 /* Mask for channel 0 */
#define	NIKON_CHANNEL1_MASK   0x2 /* Mask for channel 1 */
#define	NIKON_CHANNEL2_MASK   0x4 /* Mask for channel 2 */
#define	NIKON_1MILLISEC_SLEEP_TIME   1000
#define	NIKON_30_MILLI_SEC_DELAY   30000
#define	NIKON_FIFO_BIT_IDX_8X_OS   4 /* 8x Oversampling */
#define	NIKON_FIFO_BIT_IDX_6X_OS   3 /* 6x Oversampling */
#define	NIKON_FIFO_BIT_IDX_4X_OS   2 /* 4x Oversampling */
#define	NIKON_BASE_VALID_BIT_IDX   24 /* Base valid bit index */
#define	NIKON_DB_BITS_LEN   10 /* temperature bits*/
#define	NIKON_RX_ONE_FRAME_LEN   16 /* Rx frame*/
#define	NIKON_EEPROM_ADDR_LEN   8 /* EEPROM memory address*/
#define	NIKON_COMMAND_CODE_LEN   5 /* command code */
#define	NIKON_ENC_STATUS_LEN   4 /* encoder status field */
#define	NIKON_ENC_ADDR_LEN   3 /* encoder address */
#define	NIKON_SYNC_CODE_LEN   3 /* sync code */
#define	NIKON_TX_CRC_LEN   3 /* 3bit Tx CRC */
#define	NIKON_FRAME_CODE_LEN   2 /* frame code */
#define	NIKON_START_BIT_LEN   1 /* start bit */
#define	NIKON_STOP_BIT_LEN   1 /* stop bit */
#define	NIKON_FIXED_BIT_LEN   1 /* fix bit in info field*/
#define	NIKON_EEPROM_READ_ACCESS   1 /* eeprom read access */
#define	NIKON_EEPROM_WRITE_ACCESS   2 /* eeprom write access */
#define	NIKON_ENABLE_ID_CODE_WRITE   2 /* ID code write request */
#define	NIKON_MAX_NUM_RX_FRAMES   4 /* Rx frames */
#define	NIKON_MAX_ABS_LEN   40 /* ABS data length */
#define	NIKON_MAX_NUM_DATA_FIELDS   3 /* Rx Data fields */
#define	NIKON_AVG_NUM_RX_FRAMES   3 /* Rx frames */
#define	NIKON_AVG_ABS_LEN   24 /* ABS data length*/
#define	NIKON_MIN_NUM_RX_FRAMES   2 /* Rx frames */
#define	NIKON_MIN_ABS_LEN   17 /* ABS data length*/
#define	NIKON_DB_BITS_MASK   0x3FF /* temperature bits(DB) */
#define	NIKON_ENC_STATUS_MASK   0xF /* encoder status field */
#define	NIKON_CMD_CODE_MASK   0x1F /* command code field*/
#define	NIKON_ENC_ADDR_MASK   0x7 /* encoder address field */
#define	NIKON_NUM_OF_CYCLE_FOR_RESET   7

Enumerations
enum	cmd_code {   CMD_0, CMD_1, CMD_2, CMD_3,   CMD_4, CMD_5, CMD_6, CMD_7,   CMD_8, CMD_9, CMD_10, CMD_11,   CMD_12, CMD_13, CMD_14, CMD_15,   CMD_16, CMD_17, CMD_18, CMD_19,   CMD_20, CMD_21, CMD_22, CMD_27 = 27,   CMD_28, CMD_29, CMD_30, ENCODER_ADR_CHANGE,   START_CONTINUOUS_MODE, UPDATE_CLOCK_FREQ, UPDATE_ENC_LEN, CMD_CODE_NUM }
	Command codes[4:0]. More...

Macro Definition Documentation

NIKON_MODE_SINGLE_CHANNEL_SINGLE_PRU

#define NIKON_MODE_SINGLE_CHANNEL_SINGLE_PRU   (0U)

NIKON_MODE_MULTI_CHANNEL_SINGLE_PRU

#define NIKON_MODE_MULTI_CHANNEL_SINGLE_PRU   (1U)

NIKON_MODE_MULTI_CHANNEL_MULTI_PRU

#define NIKON_MODE_MULTI_CHANNEL_MULTI_PRU   (2U)

NIKON_MAX_CYCLE_TIMEOUT

#define NIKON_MAX_CYCLE_TIMEOUT   35

NUM_ED_CH_MAX

#define NUM_ED_CH_MAX   3

NUM_ENCODERS_MAX

#define NUM_ENCODERS_MAX   3

NUM_MDF_CMD_MAX

#define NUM_MDF_CMD_MAX   3

NIKON_RX_SAMPLE_SIZE_16MHZ

#define NIKON_RX_SAMPLE_SIZE_16MHZ   3 /* 4x over sample rate */

NIKON_RX_SAMPLE_SIZE_6_67MHZ

#define NIKON_RX_SAMPLE_SIZE_6_67MHZ   5 /* 6x over sample rate */

NIKON_RX_SAMPLE_SIZE

#define NIKON_RX_SAMPLE_SIZE   7 /* 8x over sample rate */

NIKON_FREQ_2_5MHZ

#define NIKON_FREQ_2_5MHZ   2.5 /* 2.5 MHz frequency */

NIKON_FREQ_4MHZ

#define NIKON_FREQ_4MHZ   4 /* 4 MHz frequency */

NIKON_FREQ_6_67MHZ

#define NIKON_FREQ_6_67MHZ   6 /* 6.67 MHz frequency */

NIKON_FREQ_8MHZ

#define NIKON_FREQ_8MHZ   8 /* 8 MHz frequency */

NIKON_FREQ_16MHZ

#define NIKON_FREQ_16MHZ   16 /* 16 MHz frequency */

NIKON_POS_CRC_LEN

#define NIKON_POS_CRC_LEN   8

NIKON_POS_DATA_LEN_DEFAULT

#define NIKON_POS_DATA_LEN_DEFAULT   17

NIKON_ENABLE_CYCLE_TRIGGER

#define NIKON_ENABLE_CYCLE_TRIGGER   0x1

NIKON_DISABLE_CYCLE_TRIGGER

#define NIKON_DISABLE_CYCLE_TRIGGER   0x0

NIKON_CONFIG_PERIODIC_TRIGGER_MODE

#define NIKON_CONFIG_PERIODIC_TRIGGER_MODE   0x0

NIKON_CONFIG_HOST_TRIGGER_MODE

#define NIKON_CONFIG_HOST_TRIGGER_MODE   0x1

NIKON_CLEAR_STATUS_FLAG

#define NIKON_CLEAR_STATUS_FLAG   0x0

NIKON_SET_STATUS_FLAG

#define NIKON_SET_STATUS_FLAG   0x1

NIKON_CHANNEL0_MASK

#define NIKON_CHANNEL0_MASK   0x1 /* Mask for channel 0 */

NIKON_CHANNEL1_MASK

#define NIKON_CHANNEL1_MASK   0x2 /* Mask for channel 1 */

NIKON_CHANNEL2_MASK

#define NIKON_CHANNEL2_MASK   0x4 /* Mask for channel 2 */

NIKON_1MILLISEC_SLEEP_TIME

#define NIKON_1MILLISEC_SLEEP_TIME   1000

NIKON_30_MILLI_SEC_DELAY

#define NIKON_30_MILLI_SEC_DELAY   30000

NIKON_FIFO_BIT_IDX_8X_OS

#define NIKON_FIFO_BIT_IDX_8X_OS   4 /* 8x Oversampling */

NIKON_FIFO_BIT_IDX_6X_OS

#define NIKON_FIFO_BIT_IDX_6X_OS   3 /* 6x Oversampling */

NIKON_FIFO_BIT_IDX_4X_OS

#define NIKON_FIFO_BIT_IDX_4X_OS   2 /* 4x Oversampling */

NIKON_BASE_VALID_BIT_IDX

#define NIKON_BASE_VALID_BIT_IDX   24 /* Base valid bit index */

NIKON_DB_BITS_LEN

#define NIKON_DB_BITS_LEN   10 /* temperature bits*/

NIKON_RX_ONE_FRAME_LEN

#define NIKON_RX_ONE_FRAME_LEN   16 /* Rx frame*/

NIKON_EEPROM_ADDR_LEN

#define NIKON_EEPROM_ADDR_LEN   8 /* EEPROM memory address*/

NIKON_COMMAND_CODE_LEN

#define NIKON_COMMAND_CODE_LEN   5 /* command code */

NIKON_ENC_STATUS_LEN

#define NIKON_ENC_STATUS_LEN   4 /* encoder status field */

NIKON_ENC_ADDR_LEN

#define NIKON_ENC_ADDR_LEN   3 /* encoder address */

NIKON_SYNC_CODE_LEN

#define NIKON_SYNC_CODE_LEN   3 /* sync code */

NIKON_TX_CRC_LEN

#define NIKON_TX_CRC_LEN   3 /* 3bit Tx CRC */

NIKON_FRAME_CODE_LEN

#define NIKON_FRAME_CODE_LEN   2 /* frame code */

NIKON_START_BIT_LEN

#define NIKON_START_BIT_LEN   1 /* start bit */

NIKON_STOP_BIT_LEN

#define NIKON_STOP_BIT_LEN   1 /* stop bit */

NIKON_FIXED_BIT_LEN

#define NIKON_FIXED_BIT_LEN   1 /* fix bit in info field*/

NIKON_EEPROM_READ_ACCESS

#define NIKON_EEPROM_READ_ACCESS   1 /* eeprom read access */

NIKON_EEPROM_WRITE_ACCESS

#define NIKON_EEPROM_WRITE_ACCESS   2 /* eeprom write access */

NIKON_ENABLE_ID_CODE_WRITE

#define NIKON_ENABLE_ID_CODE_WRITE   2 /* ID code write request */

NIKON_MAX_NUM_RX_FRAMES

#define NIKON_MAX_NUM_RX_FRAMES   4 /* Rx frames */

NIKON_MAX_ABS_LEN

#define NIKON_MAX_ABS_LEN   40 /* ABS data length */

NIKON_MAX_NUM_DATA_FIELDS

#define NIKON_MAX_NUM_DATA_FIELDS   3 /* Rx Data fields */

NIKON_AVG_NUM_RX_FRAMES

#define NIKON_AVG_NUM_RX_FRAMES   3 /* Rx frames */

NIKON_AVG_ABS_LEN

#define NIKON_AVG_ABS_LEN   24 /* ABS data length*/

NIKON_MIN_NUM_RX_FRAMES

#define NIKON_MIN_NUM_RX_FRAMES   2 /* Rx frames */

NIKON_MIN_ABS_LEN

#define NIKON_MIN_ABS_LEN   17 /* ABS data length*/

NIKON_DB_BITS_MASK

#define NIKON_DB_BITS_MASK   0x3FF /* temperature bits(DB) */

NIKON_ENC_STATUS_MASK

#define NIKON_ENC_STATUS_MASK   0xF /* encoder status field */

NIKON_CMD_CODE_MASK

#define NIKON_CMD_CODE_MASK   0x1F /* command code field*/

NIKON_ENC_ADDR_MASK

#define NIKON_ENC_ADDR_MASK   0x7 /* encoder address field */

NIKON_NUM_OF_CYCLE_FOR_RESET

#define NIKON_NUM_OF_CYCLE_FOR_RESET   7

Enumeration Type Documentation

cmd_code

enum cmd_code

Command codes[4:0].

Enumerator
CMD_0	ABS full 40bit data request
CMD_1	ABS lower 24bit data request
CMD_2	ABS upper 24bit data request
CMD_3	Encoder status request
CMD_4	ABS full 40bit data request (MT)
CMD_5	ABS lower 24bit data request (MT)
CMD_6	ABS upper 24bit data request (MT)
CMD_7	Encoder status request (MT)
CMD_8	Status flag clear request
CMD_9	Multiple turn data clear request
CMD_10	Status+ Multiple turn data clear request
CMD_11	Encoder address setting I (one-to-one)
CMD_12	Single turn data zero preset
CMD_13	EEPROM read request
CMD_14	EEPROM write request
CMD_15	Temperature data (8bit) request
CMD_16	Identification code read I
CMD_17	Identification code read II (one-to-one)
CMD_18	Identification code write I
CMD_19	Identification code write II (one-to-one)
CMD_20	Encoder address setting II
CMD_21	ABS lower 17bit data request
CMD_22	ABS lower 17bit data request (MT)
CMD_27	ABS lower 24bit data + Status request
CMD_28	ABS lower 24bit data + Status request (MT)
CMD_29	ABS lower 24bit data Temperature data request
CMD_30	ABS lower 24bit data Temperatuure data request (MT) Update Encoder address(EAX) in APP local context
ENCODER_ADR_CHANGE
START_CONTINUOUS_MODE	Start periodic trigger mode
UPDATE_CLOCK_FREQ	Update operating baud rate as specified by user
UPDATE_ENC_LEN	Update encoder's single turn and multi turn resolution
CMD_CODE_NUM