4.10. ETH¶
4.10.1. About This Document¶
Document Title |
User Guide of MCAL ETH Driver |
Document Version |
Version 1.5 |
Company |
Texas Instruments |
Document Name |
ETH User Guide |
4.10.2. Document Revision History¶
Version |
Date |
Revision History |
Status |
|---|---|---|---|
Version 1.0 |
05 Aug 2022 |
Initial Version |
Approved |
Version 1.1 |
23 Dec 2022 |
ETH Example application testing procedure is added. |
Approved |
Version 1.2 |
06 May 2023 |
Eth Version is updated, Eth Performance information added. |
Approved |
Version 1.3 |
12 Jun 2023 |
Updated as per HTML format. |
Approved |
Version 1.4 |
25 Aug 2023 |
Document release version column removed |
Approved |
Version 1.5 |
02 May 2024 |
Update and add Eth examples eth_test_app and eth_load_app |
Approved |
4.10.3. Table of contents¶
4.10.4. Acronyms and Definitions¶
Acronyms and Definitions used are presented in below table.
Acronyms |
Descriptions |
|---|---|
EC |
Ethernet controller |
Eth |
Ethernet Controller Driver (AUTOSAR BSW module) |
EthIf |
Ethernet Interface (AUTOSAR BSW module) |
EthTrcv |
Ethernet Transceiver Driver (AUTOSAR BSW module) |
ISR |
Interrupt Service Routine |
MCG |
Module Configuration Generator |
MII |
Media Independent Interface (standardized Interface provided by Ethernet controllers to access Ethernet transceivers) |
TCP |
Transmission Control Protocol |
UDP |
User Datagram Protocol |
4.10.5. Functional Overview¶
4.10.5.1. Brief Overview¶
This document describes the functionality, API, and configuration of the AUTOSAR BSW module Ethernet. The Ethernet driver is a hardware abstraction layer with a standardized interface to the Ethernet Interface layer.
Supported AUTOSAR Release |
4.3.1 |
Supported Configuration Variants |
Pre-Compile time, Link-time, post-build time |
Vendor ID |
ETH_VENDOR_ID (44) |
Module ID |
ETH_MODULE_ID (88) |
Supported Platform |
AM263x |
The Ethernet module initializes and controls the Ethernet CPSW subsystem. It provides services to configure all transmit / receive resources of Ethernet controller to enable transfer of Ethernet frames. It supports polling and the interrupt modes. It provides configurations for.
Initialization of Ethernet controller.
Configure receive/transmit and error interrupts.
Enable 10/100/1000 Mbps transfer.
Configuration of PHYs through MDIO functions.
4.10.5.1.1. ETHERNET Driver Architecture¶
The following figure shows where the ETHERNET is located in the AUTOSAR architecture.
Figure 1: Ethernet in AUTOSAR architecture
Below figure shows Ethernet driver in Ethernet stack module.
Figure 2: Ethernet stack module overview
4.10.5.1.2. Initialization¶
Eth_Init() has to be called to initialize the Ethernet driver.
4.10.5.1.3. States and Modes¶
The states and modes of the Ethernet driver define whether the Ethernet driver is operational or not. There are two states in which the Ethernet hardware/driver can be in.
ETH_STATE_UNINIT: This is the state when the Driver is not yet configured.
ETH_STATE_INIT: This is the state when the Driver is configured and initialization was successful.
There are 2 modes in which the Ethernet driver can be in.
ETH_MODE_DOWN: This is the mode when the driver/controller is disabled.
ETH_MODE_ACTIVE: This is the mode when the driver/controller is enabled.
The states and modes coexist. Whenever the ETH_STATE_ACTIVE is reached by the driver then the mode of the driver also changes to ETH_MODE_ACTIVE. The modes of the driver can be changed by the API Eth_SetControllerMode.
4.10.5.2. Features Supported and Not Supported¶
ETH IP Features supported |
Autosar Features Supported |
Not Supported |
|---|---|---|
|
The below Autosar Api’s supported
|
ETH Features not supported in Hardware
Supported in Hardware but not supported by Software
|
4.10.5.3. Assumptions¶
The Ethernet BSW stack is intended to be used wherever high data rates are required but no hard real-time is required. Of course, it can also be used for less demanding use cases, i.e. for low data rates.
4.10.5.4. Limitations¶
The Ethernet Driver module is only able to handle a single thread of execution. The execution must not be pre-empted by itself.
It is not possible to transmit data which exceeds the available buffer size of the used controller. Longer data has to be transmitted using the Internet Protocol (IP) or Transmission Control Protocol (TCP).
4.10.5.5. Design overview (Link to the Architecture document and Design Document)¶
Will be updated in future release.
4.10.5.6. File Structure¶
Description of static files is provided below:
Static source and header files |
Description |
|---|---|
Eth.h |
Contains the APIs of the ETH driver to be used by. |
Eth_Irq.h |
Contains ISR function declaration. |
Eth.c |
Contains the implementation of the ETH driver to be used by. |
Eth_Irq.c |
Eth Interrupt service routines. |
Eth_Priv.c Cpsw.c Cpsw_Ale.c Cpsw_Cpts.c Cpsw_Port.c Cpsw_Stats.c Cpsw_Mdio.c |
Contains module private functions used by main APIs. |
Eth_Priv.h Cpsw.h Cpsw_Ale.h Cpsw_Cpts.h Cpsw_Mdio.h Cpsw_Port.h Eth_Priv.h Cpsw_Types.h Cpsw_Priv.h Cpsw_Stats.h |
Internal header files. |
Hw_Cpsw_Ale.h Hw_Cpsw_Cpdma.h Hw_Cpsw_Cpts.h Hw_Cpsw_Mdio.h Hw_Cpsw_Port.h Hw_Cpsw_Ss.h Hw_Cpsw_Stats.h Hw_Cpsw.h |
Contains Register address and operational macros. |
Description of generated files is provided below:
Plugin Files |
Descriptions |
|---|---|
Eth_Cfg.h |
Contains the pre-complier switches. |
Eth_PBcfg.c |
Contains all channels Post-Build Configured parameters. |
Eth_Cfg.c |
Contains all channels Pre-Compile Configured parameters. |
Eth_Lcfg.c |
Contains all channels Link time Configured parameters. |
Figure 4: Eth header file include structure
4.10.6. Deviations to requirements (Requirement Traceability)¶
4.10.6.1. Module Requirements¶
Will be updated in future release.
4.10.6.2. Deviation of requirements against AUTOSAR specification requirements¶
Will be updated in future release.
4.10.7. Integration Details¶
4.10.7.1. Dependency on Other Software Modules¶
4.10.7.1.1. MCU¶
The module MCU powers up the microcontrollers peripherals at startup time and initializes the PLL and the internal clock domains which go to the Ethernet unit. Interrupt crossbar configuration and mapping of interrupts to core also taken care by MCU.
4.10.7.1.2. PORT¶
For PORT (IO PAD) configuration of Ethernet module PORT driver is used. Multiple configurations are available depending on Ethernet port used and mode of operation (like MII, RMII and RGMII).
4.10.7.1.3. OSEK / AUTOSAR OS (Optional)¶
An operating system can be used for task scheduling, interrupt handling, global suspend and restore of interrupts and creating of the Interrupt Vector Table. The Ethernet module may use OSEK/AUTOSAR OS to suspend and restore global interrupts.
Apart from AUTOSAR OS module OS Counter Id can be configured from the Eth configuration.
4.10.7.1.4. Error Handling module¶
4.10.7.1.5. DET¶
The module Ethernet depends on the DET (by default) to report development errors. Detection and reporting of development errors can be enabled or disabled by the switch “Enable Development Error Detection” on the tab “General Settings” within the module Ethernet.
The following table represents the service IDs:
Service ID |
Service |
|---|---|
0x01 |
Eth_Init |
0x03 |
Eth_SetControllerMode |
0x04 |
Eth_GetControllerMode |
0x05 |
Eth_WriteMii |
0x06 |
Eth_ReadMii |
0x08 |
Eth_GetPhysAddr |
0x09 |
Eth_ProvideTxBuffer |
0x0A |
Eth_Transmit |
0x0B |
Eth_Receive |
0x0C |
Eth_TxConfirmation |
0x0D |
Eth_GetVersionInfo |
0x12 |
Eth_UpdatePhysAddrFilter |
0x13 |
Eth_SetPhysAddr |
0x14 |
Eth_GetCounterValues |
0x15 |
Eth_GetRxStats |
0x16 |
Eth_GetCurrentTime |
0x17 |
Eth_EnableEgressTimeStamp |
0x18 |
Eth_GetEgressTimeStamp |
0x19 |
Eth_GetIngressTimeStamp |
0x1C |
Eth_GetTxStats |
0x1D |
Eth_GetTxErrorCounterValues |
0x20 |
Eth_MainFunction |
0x50 |
Eth_SetBandwidthLimit |
0x51 |
Eth_GetBandwidthLimit |
The errors reported to DET module are described in the following table:
Type of Error |
Relevance |
Related Error code |
Value (Hex) |
|---|---|---|---|
API service called with wrong controller index |
Development |
ETH_E_INV_CTRL_IDX |
[0x1] |
API service called when controller is not initialized |
Development |
ETH_E_UNINIT |
[0x2] |
API is called with wrong pointer value (e.g., NULL pointer) |
Development |
ETH_E_PARAM_POINTER |
[0x3] |
API service called with wrong / inconsistent parameter(s) |
Development |
ETH_E_INV_PARAM |
[0x4] |
API service called with wrong / inconsistent controller mode |
Development |
ETH_E_INV_MODE |
[0x5] |
The following table shows which parameter checks are performed on which services:
Services |
ETH_E_UNINIT |
ETH_E_INV_CTRL_IDX |
ETH_E_INV_PARAM |
ETH_E_PARAM_POINTER |
ETH_E_INIT_FAILED |
ETH_E_INV_MODE |
|---|---|---|---|---|---|---|
Eth_Init |
x |
x |
||||
Eth_SetControllerMode |
x |
x |
||||
Eth_GetControllerMode |
x |
x |
x |
|||
Eth_GetPhysAddr |
x |
x |
x |
|||
Eth_SetPhysAddr |
x |
x |
x |
|||
Eth_UpdatePhysAddrFilter |
x |
x |
x |
|||
Eth_WriteMii |
x |
x |
||||
Eth_ReadMii |
x |
x |
||||
Eth_GetCounterValues |
x |
x |
x |
|||
Eth_GetRxStats |
x |
x |
x |
|||
Eth_GetTxStats |
x |
x |
x |
|||
Eth_GetTxErrorCounterValues |
x |
x |
x |
|||
Eth_GetCurrentTime |
x |
x |
x |
|||
Eth_EnableEgressTimeStamp |
x |
x |
x |
|||
Eth_GetEgressTimeStamp |
x |
x |
x |
|||
Eth_GetIngressTimeStamp |
x |
x |
x |
|||
Eth_ProvideTxBuffer |
x |
x |
x |
|||
Eth_Transmit |
x |
x |
x |
x |
x |
x |
Eth_Receive |
x |
x |
x |
x |
||
Eth_TxConfirmation |
x |
x |
x |
|||
Eth_MainFunction |
x |
|||||
Eth_GetVersionInfo |
x |
|||||
Eth_SetBandwidthLimit |
x |
x |
x |
|||
Eth_GetBandwidthLimit |
x |
x |
x |
x |
4.10.7.1.6. Runtime Errors¶
There are no runtime errors.
4.10.7.1.7. DEM¶
By default, production code related errors are reported to the DEM using the service Dem_SetEventStatus().
The errors reported to DEM are described in the following table:
Error Code |
Description |
|
|---|---|---|
Assigned by DEM |
ETH_E_ACCESS |
This error is raised when monitoring the access to the Ethernet Controller fails. |
Assigned by DEM |
ETH_E_RX_FRAMES_LOST |
This error is raised when the loss of Ethernet frames during reception is detected. |
Assigned by DEM |
ETH_E_CRC |
This error is raised when the invalid Ethernet frames during reception is detected. |
Assigned by DEM |
ETH_E_UNDERSIZEFRAME |
This error is raised when the undersized Ethernet frames during reception is detected. |
Assigned by DEM |
ETH_E_OVERSIZEFRAME |
This error is raised when the oversized Ethernet frames during reception is detected. |
Assigned by DEM |
ETH_E_ALIGNMENT |
This error is raised when the misaligned Ethernet frames during reception is detected. |
Assigned by DEM |
ETH_E_SINGLECOLLISION |
This error is raised when the single Ethernet frame collision is detected. |
Assigned by DEM |
ETH_E_MULTIPLECOLLISION |
This error is raised when the multiple Ethernet frames collision is detected. |
Assigned by DEM |
ETH_E_LATECOLLISION |
This error is raised when the Ethernet frames late collision is detected. |
4.10.7.1.8. Callback Functions¶
The Ethernet driver does not provide any call back functions.
4.10.7.2. Hardware - Software - ISR API name mapping¶
Four interrupt routines are provided by the Ethernet driver. Basically, the ISR’s are in the Eth_Irq.c. User might edit it for adapting for the suitable OS. The current support is for the NON-OS Interrupts structure. The integrator has to map the interrupt service routines to the interrupt sources of the respective ETHERNET unit interrupt.
Following are ISRs for each hardware unit:
HW Interrupt |
HW Interrupt ID |
SW ISR for ETH module |
Description |
|---|---|---|---|
CPSW_FH_INT
|
12
|
Eth_TxIrqHdlr_0 |
FHost (from host to Ethernet) paced pulse interrupt. |
CPSW_TH_INT
|
13
|
Eth_RxIrqHdlr_0 |
THost (from Ethernet to host) paced pulse interrupt. |
CPSW_TH_TRSH_INT
|
14
|
Eth_RxThreshIrqHdlr_0 |
THost (from Ethernet to host) non-paced pulse interrupt. |
CPSW_MISC_INT
|
15
|
Eth_MiscIrqHdlr_0 |
Miscellaneous (statistics, host error and MDIO interrupts) non-paced pulse interrupt. |
4.10.7.3. Scheduling Strategy¶
4.10.7.3.1. SchM¶
Beside the OS the BSW Scheduler provides functions that module Ethernet calls at begin and end of critical sections.
4.10.7.3.2. Critical Sections¶
There is only one kind of critical sections in this driver. Within these sections all read /modify/write accesses to internal Ethernet status variables must be protected. Therefore, switching to tasks that also access Ethernet has to be avoided and all Ethernet interrupts have to be suspended.
4.10.8. API Description¶
4.10.8.1. Description of the API’s¶
Please refer MCAL_AM263_ApiGuide.CHM document provided as part of CSP.
4.10.8.2. List of API’s¶
The following table presents the list of API’s:
Service ID |
Autosar API’s Supported |
Comments |
|---|---|---|
0x01 |
Eth_Init |
|
0x03 |
Eth_SetControllerMode |
|
0x04 |
Eth_GetControllerMode |
|
0x05 |
Eth_WriteMii |
|
0x06 |
Eth_ReadMii |
|
0x08 |
Eth_GetPhysAddr |
|
0x09 |
Eth_ProvideTxBuffer |
Priority/QoS option not supported. |
0x0A |
Eth_Transmit |
|
0x0B |
Eth_Receive |
Priority/QoS option not supported. |
0x0C |
Eth_TxConfirmation |
|
0x0D |
Eth_GetVersionInfo |
|
0x12 |
Eth_UpdatePhysAddrFilter |
|
0x13 |
Eth_SetPhysAddr |
|
0x14 |
Eth_GetCounterValues |
|
0x15 |
Eth_GetRxStats |
|
0x16 |
Eth_GetCurrentTime |
|
0x17 |
Eth_EnableEgressTimeStamp |
|
0x18 |
Eth_GetEgressTimeStamp |
|
0x19 |
Eth_GetIngressTimeStamp |
|
0x1C |
Eth_GetTxStats |
|
0x1D |
Eth_GetTxErrorCounterValues |
|
0x20 |
Eth_MainFunction |
|
0x50 |
Eth_SetBandwidthLimit |
|
0x51 |
Eth_GetBandwidthLimit |
Refer Autosar SWS for API description mentioned in above table.
4.10.8.3. Description on Non Standard API’s¶
Not Applicable.
4.10.9. Configuration Description¶
4.10.9.1. Configuration Variants¶
The ETH is configured through GUI in Post-Build, Pre-Compile and Link-Time Variants.
Variants
|
Configured Files
|
|---|---|
PostBuild |
Eth_PBcfg.c , Eth_Cfg.h |
Pre-Compile |
Eth_Cfg.c , Eth_Cfg.h |
Link-Compile |
Eth_Lcfg.c , Eth_Cfg.h |
4.10.9.2. Parameter Description¶
Will be added in the future release.
4.10.9.3. Symbolic Names deviations¶
None.
4.10.9.4. Configuration rules and constraints to enable plausibility checks¶
None.
4.10.10. Memory Mapping¶
The objects (e.g., variables, functions, constants) are declared by compiler independent definitions – the compiler abstraction definitions. Each compiler abstraction definition is assigned to a memory section. The following table contains the memory section names and the compiler abstraction definitions defined for the Ethernet and illustrate their assignment among each other.
Compiler Abstraction Definitions / Memory Mapping Sections |
ETH_CODE |
ETH_VAR |
ETH_VAR_NOINIT |
ETH_CONST |
ETH_APPL_DATA |
ETH_APPL_CODE |
|---|---|---|---|---|---|---|
ETH_START_SEC_VAR_INIT_UNSPECIFIED (.data) |
x |
|||||
ETH_STOP_SEC_VAR_INIT_UNSPECIFIED |
x |
|||||
ETH_START_SEC_CODE (.text) |
x |
|||||
ETH_STOP_SEC_CODE |
x |
|||||
ETH_START_SEC_VAR_NO_INIT_UNSPECIFIED (.bss) |
x |
|||||
ETH_STOP_SEC_VAR_NO_INIT_UNSPECIFIED |
x |
|||||
ETH_START_SEC_CONST_UNSPECIFIED (.const) |
x |
|||||
ETH_STOP_SEC_CONST_UNSPECIFIED |
x |
|||||
ETH_START_SEC_ISR_CODE (.text) ETH_STOP_SEC_ISR_CODE |
x |
|||||
For application code used by ETH (like callback functions) |
x |
4.10.11. Memory footprint¶
Eth memory footprint changes significantly with number of RX, TX buffer.
Please refer Memory Footprint for default RX, TX buffer number.
Below table is memory footprint with minimum buffer number (RX=2, TX=2)
Module |
code |
ro data |
rw data |
|---|---|---|---|
Eth_Priv.oer5f |
5206 |
188 |
7395 |
Cpsw_Cpts.oer5f |
1870 |
0 |
772 |
Cpsw_Ale.oer5f |
1768 |
0 |
0 |
Eth.oer5f |
1628 |
0 |
1 |
Cpsw.oer5f |
1188 |
0 |
0 |
Eth_Irq.oer5f |
948 |
0 |
0 |
Cpsw_Stats.oer5f |
392 |
0 |
1 |
Cpsw_Port.oer5f |
318 |
0 |
0 |
Cpsw_Mdio.oer5f |
276 |
0 |
0 |
Eth_Helpers.oer5f |
90 |
0 |
0 |
Total: |
13684 |
188 |
8169 |
4.10.12. Performance¶
Peformance depends on Eth driver configuration. Below is performance configuration having throughput > 900Mbps, packet size 1500 without packet lost.
RX buffer |
24 |
RX threshold |
12 |
RX IRQ pacePerMs |
32 |
TX buffer |
12 |
TX IRQ pacePerMs |
32 |
Link speed |
1 Gbps |
Transmit throughput:
Pay load(Bytes) |
Number of frames |
Speed(Mbps) |
|---|---|---|
1500 |
150000 |
984 |
512 |
150000 |
951 |
256 |
150000 |
549 |
128 |
150000 |
289 |
64 |
150000 |
158 |
Receive throughput:
Pay load(Bytes) |
Number of frames |
Speed(Mbps) |
|---|---|---|
1500 |
150000 |
932 |
512 |
150000 |
320 |
256 |
150000 |
162 |
128 |
150000 |
81 |
64 |
150000 |
41 |
4.10.13. Example Usage¶
4.10.13.1. Steps to build and run examples¶
There’re several Ethernet example applications demonstrating the MCAL ETH driver features in folder <MCAL_ROOT>/examples/Eth.
eth_app: basic test application.
eth_test_app: full feature test application with linux host test app.
eth_load_app: FreeRTOS porting to test CPU usage with high throughput.
- This application can be built from the build folder by giving
gmake -s eth_app PLATFORM=am263
gmake -s eth_test_app PLATFORM=am263
gmake -s eth_load_app PLATFORM=am263 MCUPLUSSDK_ROOTDIR=/home/$USER/ti/mcu_plus_sdk_am263x_09_02_00_47
4.10.13.2. Run eth_app¶
By default, in Example code PORT 1 is enabled for Transmit/receive functionality.
Connect CANoe/PC through Ethernet cable to RJ45 of AM263x Board PORT 1.
Flash the eth_app binary (under mcal/binary/eth_app/bin/am263) file on Hardware.
Connect to Serial terminal to see the output.
If CANoe using then speed(1000M) should be set accordingly in CANoe settings.
If Wireshark using:
in Auto negotiation no additional settings required.
in Force configuration Speed and duplex should be set as per configuration in PC network settings.
During Receive test the control will be in while loop until the expected frames received.
Here we will send Frames from CANoe/ColaSoft Packet builder software to the EVM. (gAppObj.stats.recvPacketCnt will update if the frame received in EthIf_RxIndication).
During Filter test Frames should send from CANoe/ColaSoft Packet builder with expected destination MAC address to the EVM.
During Time stamp test PTP packets should send from CANoe/ColaSoft Packet builder with expected destination MAC address to the EVM.
During Transmission test: EVM will transmit the frames to CANoe/PC. we can observe the Frames on CANoe/Wireshark.
At the end we can see the Statistics in serial terminal.
4.10.13.2.1. External set up Information¶
Connect CANoe/PC through Ethernet cable to RJ45 of AM263x EVM PORT 1.
If CANoe tool is connected to AM263x EVM then we can observe both Tx and Rx frames in CANoe software. If PC is connected to AM263x EVM then use wireshark tool to observe Transmitted frames from EVM, For Receive functionality send frames from Colasoft Packet builder tool to EVM.
If CANoe using then speed(as per configuration:1000M) should be set accordingly in CANoe settings. If Wireshark and Packet builder softwares using:
in Auto negotiation mode no additional settings required.
in Force configuration mode Speed and duplex should be set as per Eth and EthTrcv configuration in PC network settings.
4.10.13.2.2. Configuration used to test this example¶
ETH Configuration:
Build Variant : ETH_VARIANT_POST_BUILD
EthStatsInterruptEnable : True
EthUsrMdioInterruptEnable : True
EthHostErrorInterruptEnable : True
EthCtrlEnableRxInterrupt : True
EthCtrlEnableTxInterrupt : True
Number of TX buffers : 24
Number of RX buffers : 48
EthPort : ETH_PORT1
EthMacConnectionType : ETH_MAC_CONN_TYPE_RGMII_DETECT_INBAND
ETHTRCV Configuration
Build Variant : ETHTRCV_POST_BUILD_VARIANT
EthTrcv1000Mbps_speed : True
EthTrcvAutoNegotiationEnabled : (uint32 ) TRUE
EthTrcvConnNeg : TRCV_CONN_NEG_AUTO
EthTrcvPhyAdvertiseCapability : 10mbps Half_Duplex, 10mbps Full_Duplex, 100mbps Half_Duplex, 100mbps Full_Duplex, 1000mbps Full_Duplex
EthTrcvLinkPartnerCapability : 0U
EthTrcvGigabitCapabilityEnabled : (uint32 )TRUE
EthTrcvDuplexMode : ETHTRCV_DUPLEX_MODE_FULL
EthTrcvEnableLoopback : (boolean)FALSE
4.10.13.2.3. Example Logs¶
ETH_APP: Sample Application - STARTS !!!
ETH MCAL Version Info
---------------------
Vendor ID : 44
Module ID : 88
SW Major Version : 9
SW Minor Version : 0
SW Patch Version : 0
ETH TRCV MCAL Version Info
---------------------
Vendor ID : 44
Module ID : 73
SW Major Version : 9
SW Minor Version : 0
SW Patch Version : 0
ETH_APP: EthTrcv Controller mode change - ETHTRCV_MODE_ACTIVE
ETH_APP:ETHTRCV Link up
ETH_APP:ETHTRCV baud rate = 1000Mbps
ETH_APP:ETHTRCV in full duplex mode
ETH_APP:ETHTRCV Normal Operation
ETH_APP:ETHTRCV Tx mode Normal
ETH_APP:ETHTRCV PHY(DP83869HM) ID is proper. OUI: 0x80028, Model No: 0xf, Revision No: 0x1
ETH_APP:ETHTRCV Cable Diagnostics Ok
ETH_APP:ETHTRCV Phy test mode Normal
ETH_APP:EthTRCV Controller Up
ETH_APP:EthTRCV Controller Up
MAC Port 1 Address:
00:01:02:03:04:05
-----------------------------------------------
*********** ETH FILTER TEST *******************
-----------------------------------------------
Adding MAC Address to filter:
0a:0b:0c:0d:0e:0f
Waiting to receive 1000 packets from PC packet player..
Send packets with destination MAC address:
0a:0b:0c:0d:0e:0f
Removing MAC Address from filter:
0a:0b:0c:0d:0e:0f
Multicast address filter test
Adding multicast MAC Address to filter:
01:00:5e:0d:0e:0f
Waiting to receive 1000 packets from PC packet player..
Send packets with destination MAC address:
01:00:5e:0d:0e:0f
Removing MAC Address from filter:
01:00:5e:0d:0e:0f
Opening up filter completely (ALE bypass)
Waiting to receive 1000 packets from PC packet player..
Send packets with any MAC address
ALE Bypass Transmit Test
Transmitting 50000 packets
Expect PC Wireshark to receive 50000 packets..
Max Tx Packet Size Test passed
Disabling filter bypass & adding host address back to filter
Waiting to receive 1000 packets from PC packet player..
Send packets with Controller MAC address
-----------------------------------------------
***********Time Stamping Test*******************
-----------------------------------------------
Get global time after delay upto 1000ms (loop=10)
Curr_Time: [ 0. 1. 920292352] TimeSync_Diff: [ 0. 1. 920292352](32K Cntr Diff 26372)
Curr_Time: [ 0. 5. 748930560] TimeSync_Diff: [ 0. 3. 828638208](32K Cntr Diff 23872)
Curr_Time: [ 0. 6. 352555008] TimeSync_Diff: [ 0. 0. 603624448](32K Cntr Diff 3715)
Curr_Time: [ 0. 8. 965744640] TimeSync_Diff: [ 0. 2. 613189632](32K Cntr Diff 16279)
Curr_Time: [ 0. 9. 259365376] TimeSync_Diff: [ 0. 0. 293620736](32K Cntr Diff 1778)
Curr_Time: [ 0. 12. 432555008] TimeSync_Diff: [ 0. 3. 173189632](32K Cntr Diff 19778)
Curr_Time: [ 0. 12. 521180160] TimeSync_Diff: [ 0. 0. 88625152](32K Cntr Diff 497)
Curr_Time: [ 0. 14. 653934592] TimeSync_Diff: [ 0. 2. 132754432](32K Cntr Diff 13278)
Curr_Time: [ 0. 15. 752559616] TimeSync_Diff: [ 0. 1. 98625024](32K Cntr Diff 6809)
Curr_Time: [ 0. 16. 220749824] TimeSync_Diff: [ 0. 0. 468190208](32K Cntr Diff 2872)
Time Sync Packet Egress Test
--------------------------------
Packet Egress TS:[ 0. 16. 288872448][ ETH_VALID]
Packet Egress TS:[ 0. 16. 338898944][ ETH_VALID]
Packet Egress TS:[ 0. 16. 388918272][ ETH_VALID]
Packet Egress TS:[ 0. 16. 438942720][ ETH_VALID]
Packet Egress TS:[ 0. 16. 488963072][ ETH_VALID]
Packet Egress TS:[ 0. 16. 538987520][ ETH_VALID]
Packet Egress TS:[ 0. 16. 589002752][ ETH_VALID]
Packet Egress TS:[ 0. 16. 639027200][ ETH_VALID]
Packet Egress TS:[ 0. 16. 689043456][ ETH_VALID]
Packet Egress TS:[ 0. 16. 739067904][ ETH_VALID]
Packet Egress TS:[ 0. 16. 789087232][ ETH_VALID]
Packet Egress TS:[ 0. 16. 839111680][ ETH_VALID]
Packet Egress TS:[ 0. 16. 889127936][ ETH_VALID]
Packet Egress TS:[ 0. 16. 939152384][ ETH_VALID]
Packet Egress TS:[ 0. 16. 989172736][ ETH_VALID]
Packet Egress TS:[ 0. 17. 39197184][ ETH_VALID]
Packet Egress TS:[ 0. 17. 89213440][ ETH_VALID]
Packet Egress TS:[ 0. 17. 139237888][ ETH_VALID]
Packet Egress TS:[ 0. 17. 189259264][ ETH_VALID]
Packet Egress TS:[ 0. 17. 239281664][ ETH_VALID]
Packet Egress TS:[ 0. 17. 289297920][ ETH_VALID]
Packet Egress TS:[ 0. 17. 339322368][ ETH_VALID]
Packet Egress TS:[ 0. 17. 389338624][ ETH_VALID]
Packet Egress TS:[ 0. 17. 439363072][ ETH_VALID]
Packet Egress TS:[ 0. 17. 489377280][ ETH_VALID]
Packet Egress TS:[ 0. 17. 539401728][ ETH_VALID]
Packet Egress TS:[ 0. 17. 589417984][ ETH_VALID]
Packet Egress TS:[ 0. 17. 639442432][ ETH_VALID]
Packet Egress TS:[ 0. 17. 689456640][ ETH_VALID]
Packet Egress TS:[ 0. 17. 739483136][ ETH_VALID]
Packet Egress TS:[ 0. 17. 789497344][ ETH_VALID]
Packet Egress TS:[ 0. 17. 839521792][ ETH_VALID]
Packet Egress TS:[ 0. 17. 889538048][ ETH_VALID]
Packet Egress TS:[ 0. 17. 939562496][ ETH_VALID]
Packet Egress TS:[ 0. 17. 989578752][ ETH_VALID]
Packet Egress TS:[ 0. 18. 39601152][ ETH_VALID]
Packet Egress TS:[ 0. 18. 89617408][ ETH_VALID]
Packet Egress TS:[ 0. 18. 139641856][ ETH_VALID]
Packet Egress TS:[ 0. 18. 189658112][ ETH_VALID]
Packet Egress TS:[ 0. 18. 239682560][ ETH_VALID]
Packet Egress TS:[ 0. 18. 289702912][ ETH_VALID]
Packet Egress TS:[ 0. 18. 339727360][ ETH_VALID]
Packet Egress TS:[ 0. 18. 389741568][ ETH_VALID]
Packet Egress TS:[ 0. 18. 439768064][ ETH_VALID]
Packet Egress TS:[ 0. 18. 489782272][ ETH_VALID]
Packet Egress TS:[ 0. 18. 539806720][ ETH_VALID]
Packet Egress TS:[ 0. 18. 589822976][ ETH_VALID]
Packet Egress TS:[ 0. 18. 639847424][ ETH_VALID]
Packet Egress TS:[ 0. 18. 689861632][ ETH_VALID]
Packet Egress TS:[ 0. 18. 739888128][ ETH_VALID]
Packet Egress TS:[ 0. 18. 789906432][ ETH_VALID]
Packet Egress TS:[ 0. 18. 839932928][ ETH_VALID]
Packet Egress TS:[ 0. 18. 889947136][ ETH_VALID]
Packet Egress TS:[ 0. 18. 939971584][ ETH_VALID]
Packet Egress TS:[ 0. 18. 989987840][ ETH_VALID]
Packet Egress TS:[ 0. 19. 40012288][ ETH_VALID]
Packet Egress TS:[ 0. 19. 90028544][ ETH_VALID]
Packet Egress TS:[ 0. 19. 140052992][ ETH_VALID]
Packet Egress TS:[ 0. 19. 190073344][ ETH_VALID]
Packet Egress TS:[ 0. 19. 240097792][ ETH_VALID]
Packet Egress TS:[ 0. 19. 290112000][ ETH_VALID]
Packet Egress TS:[ 0. 19. 340138496][ ETH_VALID]
Packet Egress TS:[ 0. 19. 390158848][ ETH_VALID]
Packet Egress TS:[ 0. 19. 440183296][ ETH_VALID]
Packet Egress TS:[ 0. 19. 490203648][ ETH_VALID]
Packet Egress TS:[ 0. 19. 540226048][ ETH_VALID]
Packet Egress TS:[ 0. 19. 590244352][ ETH_VALID]
Packet Egress TS:[ 0. 19. 640266752][ ETH_VALID]
Packet Egress TS:[ 0. 19. 690283008][ ETH_VALID]
Packet Egress TS:[ 0. 19. 740307456][ ETH_VALID]
Packet Egress TS:[ 0. 19. 790321664][ ETH_VALID]
Packet Egress TS:[ 0. 19. 840348160][ ETH_VALID]
Packet Egress TS:[ 0. 19. 890362368][ ETH_VALID]
Packet Egress TS:[ 0. 19. 940386816][ ETH_VALID]
Packet Egress TS:[ 0. 19. 990407168][ ETH_VALID]
Packet Egress TS:[ 0. 20. 40431616][ ETH_VALID]
Packet Egress TS:[ 0. 20. 90447872][ ETH_VALID]
Packet Egress TS:[ 0. 20. 140472320][ ETH_VALID]
Packet Egress TS:[ 0. 20. 190492672][ ETH_VALID]
Packet Egress TS:[ 0. 20. 240517120][ ETH_VALID]
Packet Egress TS:[ 0. 20. 290533376][ ETH_VALID]
Packet Egress TS:[ 0. 20. 340557824][ ETH_VALID]
Packet Egress TS:[ 0. 20. 390572032][ ETH_VALID]
Packet Egress TS:[ 0. 20. 440598528][ ETH_VALID]
Packet Egress TS:[ 0. 20. 490618880][ ETH_VALID]
Packet Egress TS:[ 0. 20. 540641280][ ETH_VALID]
Packet Egress TS:[ 0. 20. 590657536][ ETH_VALID]
Packet Egress TS:[ 0. 20. 640681984][ ETH_VALID]
Packet Egress TS:[ 0. 20. 690698240][ ETH_VALID]
Packet Egress TS:[ 0. 20. 740722688][ ETH_VALID]
Packet Egress TS:[ 0. 20. 790736896][ ETH_VALID]
Packet Egress TS:[ 0. 20. 840763392][ ETH_VALID]
Packet Egress TS:[ 0. 20. 890781696][ ETH_VALID]
Packet Egress TS:[ 0. 20. 940808192][ ETH_VALID]
Packet Egress TS:[ 0. 20. 990822400][ ETH_VALID]
Packet Egress TS:[ 0. 21. 40846848][ ETH_VALID]
Packet Egress TS:[ 0. 21. 90863104][ ETH_VALID]
Packet Egress TS:[ 0. 21. 140887552][ ETH_VALID]
Packet Egress TS:[ 0. 21. 190903808][ ETH_VALID]
Packet Egress TS:[ 0. 21. 240926208][ ETH_VALID]
Packet Egress TS:[ 0. 21. 290942464][ ETH_VALID]
Packet Egress TS:[ 0. 21. 340966912][ ETH_VALID]
Packet Egress TS:[ 0. 21. 390983168][ ETH_VALID]
Packet Egress TS:[ 0. 21. 441007616][ ETH_VALID]
Packet Egress TS:[ 0. 0. 16186410][ ETH_VALID]
Packet Egress TS:[ 0. 0. 66210012][ ETH_VALID]
Packet Egress TS:[ 0. 0. 116226288][ ETH_VALID]
Packet Egress TS:[ 0. 0. 166250880][ ETH_VALID]
Packet Egress TS:[ 0. 0. 216266640][ ETH_VALID]
Packet Egress TS:[ 0. 0. 266290816][ ETH_VALID]
Packet Egress TS:[ 0. 0. 316306720][ ETH_VALID]
Packet Egress TS:[ 0. 0. 366331648][ ETH_VALID]
Packet Egress TS:[ 0. 0. 416351168][ ETH_VALID]
Packet Egress TS:[ 0. 0. 466375552][ ETH_VALID]
Packet Egress TS:[ 0. 0. 516391008][ ETH_VALID]
Packet Egress TS:[ 0. 0. 566414912][ ETH_VALID]
Packet Egress TS:[ 0. 0. 616431040][ ETH_VALID]
Packet Egress TS:[ 0. 0. 666455424][ ETH_VALID]
Packet Egress TS:[ 0. 0. 716471040][ ETH_VALID]
Packet Egress TS:[ 0. 0. 766496064][ ETH_VALID]
Packet Egress TS:[ 0. 0. 816516352][ ETH_VALID]
Packet Egress TS:[ 0. 0. 866540608][ ETH_VALID]
Packet Egress TS:[ 0. 0. 916555776][ ETH_VALID]
Packet Egress TS:[ 0. 0. 966580672][ ETH_VALID]
Packet Egress TS:[ 0. 1. 16595712][ ETH_VALID]
Packet Egress TS:[ 0. 1. 66620928][ ETH_VALID]
Packet Egress TS:[ 0. 1. 116635648][ ETH_VALID]
Packet Egress TS:[ 0. 1. 166661248][ ETH_VALID]
Packet Egress TS:[ 0. 1. 216682112][ ETH_VALID]
Packet Egress TS:[ 0. 1. 266705280][ ETH_VALID]
Packet Egress TS:[ 0. 1. 316721152][ ETH_VALID]
Packet Egress TS:[ 0. 1. 366745856][ ETH_VALID]
Packet Egress TS:[ 0. 1. 416761216][ ETH_VALID]
Packet Egress TS:[ 0. 1. 466785408][ ETH_VALID]
Packet Egress TS:[ 0. 1. 516801024][ ETH_VALID]
Packet Egress TS:[ 0. 1. 566825344][ ETH_VALID]
Packet Egress TS:[ 0. 1. 616841344][ ETH_VALID]
Packet Egress TS:[ 0. 1. 666865920][ ETH_VALID]
Packet Egress TS:[ 0. 1. 716881152][ ETH_VALID]
Packet Egress TS:[ 0. 1. 766905728][ ETH_VALID]
Packet Egress TS:[ 0. 1. 816921216][ ETH_VALID]
Packet Egress TS:[ 0. 1. 866945024][ ETH_VALID]
Packet Egress TS:[ 0. 1. 916961280][ ETH_VALID]
Packet Egress TS:[ 0. 1. 966984832][ ETH_VALID]
Packet Egress TS:[ 0. 2. 17000576][ ETH_VALID]
Packet Egress TS:[ 0. 2. 67026048][ ETH_VALID]
Packet Egress TS:[ 0. 2. 117047168][ ETH_VALID]
Packet Egress TS:[ 0. 2. 167070976][ ETH_VALID]
Packet Egress TS:[ 0. 2. 217086208][ ETH_VALID]
Packet Egress TS:[ 0. 2. 267110656][ ETH_VALID]
Packet Egress TS:[ 0. 2. 317125376][ ETH_VALID]
Packet Egress TS:[ 0. 2. 367145984][ ETH_VALID]
Packet Egress TS:[ 0. 2. 417160960][ ETH_VALID]
Packet Egress TS:[ 0. 2. 467186176][ ETH_VALID]
Packet Egress TS:[ 0. 2. 517206272][ ETH_VALID]
Packet Egress TS:[ 0. 2. 567230208][ ETH_VALID]
Packet Egress TS:[ 0. 2. 617245440][ ETH_VALID]
Packet Egress TS:[ 0. 2. 667270912][ ETH_VALID]
Packet Egress TS:[ 0. 2. 717286400][ ETH_VALID]
Packet Egress TS:[ 0. 2. 767310592][ ETH_VALID]
Packet Egress TS:[ 0. 2. 817325312][ ETH_VALID]
Packet Egress TS:[ 0. 2. 867345152][ ETH_VALID]
Packet Egress TS:[ 0. 2. 917361920][ ETH_VALID]
Packet Egress TS:[ 0. 2. 967385600][ ETH_VALID]
Packet Egress TS:[ 0. 3. 17401856][ ETH_VALID]
Packet Egress TS:[ 0. 3. 67425536][ ETH_VALID]
Packet Egress TS:[ 0. 3. 117441024][ ETH_VALID]
Packet Egress TS:[ 0. 3. 167465728][ ETH_VALID]
Packet Egress TS:[ 0. 3. 217480960][ ETH_VALID]
Packet Egress TS:[ 0. 3. 267505664][ ETH_VALID]
Packet Egress TS:[ 0. 3. 317521920][ ETH_VALID]
Packet Egress TS:[ 0. 3. 367545856][ ETH_VALID]
Packet Egress TS:[ 0. 3. 417561600][ ETH_VALID]
Packet Egress TS:[ 0. 3. 467585280][ ETH_VALID]
Packet Egress TS:[ 0. 3. 517601280][ ETH_VALID]
Packet Egress TS:[ 0. 3. 567625728][ ETH_VALID]
Packet Egress TS:[ 0. 3. 617641984][ ETH_VALID]
Packet Egress TS:[ 0. 3. 667665920][ ETH_VALID]
Packet Egress TS:[ 0. 3. 717681664][ ETH_VALID]
Packet Egress TS:[ 0. 3. 767706112][ ETH_VALID]
Packet Egress TS:[ 0. 3. 817725696][ ETH_VALID]
Packet Egress TS:[ 0. 3. 867750144][ ETH_VALID]
Packet Egress TS:[ 0. 3. 917766144][ ETH_VALID]
Packet Egress TS:[ 0. 3. 967790848][ ETH_VALID]
Packet Egress TS:[ 0. 4. 17806848][ ETH_VALID]
Packet Egress TS:[ 0. 4. 67831040][ ETH_VALID]
Packet Egress TS:[ 0. 4. 117851904][ ETH_VALID]
Packet Egress TS:[ 0. 4. 167875328][ ETH_VALID]
Packet Egress TS:[ 0. 4. 217891328][ ETH_VALID]
Packet Egress TS:[ 0. 4. 267915008][ ETH_VALID]
Packet Egress TS:[ 0. 4. 317931008][ ETH_VALID]
Packet Egress TS:[ 0. 4. 367955968][ ETH_VALID]
Packet Egress TS:[ 0. 4. 417976832][ ETH_VALID]
Packet Egress TS:[ 0. 4. 468000768][ ETH_VALID]
Packet Egress TS:[ 0. 4. 518016000][ ETH_VALID]
Packet Egress TS:[ 0. 4. 568040960][ ETH_VALID]
Packet Egress TS:[ 0. 4. 618061312][ ETH_VALID]
Packet Egress TS:[ 0. 4. 668086272][ ETH_VALID]
Packet Egress TS:[ 0. 4. 718106624][ ETH_VALID]
Packet Egress TS:[ 0. 4. 768131072][ ETH_VALID]
Time Sync Packet Ingress Test
---------------------------------
Send timestamp (0x88F7) packets (100) from PC
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 14. 8004 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 14. 8504 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 14. 9004 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 14. 9504 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 15. 4 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 15. 504 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 15. 1004 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 15. 1504 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 15. 2004 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 15. 2504 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 15. 3004 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 15. 3504 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 15. 4004 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 15. 4504 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 15. 5004 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 15. 5504 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 15. 6004 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 15. 6504 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 15. 7004 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 15. 7504 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 15. 8004 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 15. 8504 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 15. 9004 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 15. 9504 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 16. 4 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 16. 504 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 16. 1004 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 16. 1504 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 16. 2004 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 16. 2504 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 16. 3004 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 16. 3504 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 16. 4004 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 16. 4504 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 16. 5004 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 16. 5504 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 16. 6004 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 16. 6504 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 16. 7004 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 16. 7504 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 16. 8004 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 16. 8504 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 16. 9004 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 16. 9504 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 17. 4 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 17. 504 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 17. 1004 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 17. 1504 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 17. 2004 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 17. 2504 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 17. 3004 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 17. 3504 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 17. 4004 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 17. 4504 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 17. 5004 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 17. 5504 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 17. 6004 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 17. 6504 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 17. 7004 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 17. 7504 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 17. 8004 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 17. 8504 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 17. 9004 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 17. 9504 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 18. 4 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 18. 504 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 18. 1004 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 18. 1504 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 18. 2004 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 18. 2504 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 18. 3004 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 18. 3504 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 18. 4004 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 18. 4504 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 18. 5004 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 18. 5504 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 18. 6004 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 18. 6504 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 18. 7004 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 18. 7504 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 18. 8004 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 18. 8504 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 18. 9004 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 18. 9504 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 19. 4 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 19. 504 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 19. 1004 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 19. 1504 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 19. 2004 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 19. 2504 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 19. 3004 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 19. 3504 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 19. 4004 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 19. 4504 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 19. 5004 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 19. 5504 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 19. 6004 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 19. 6504 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 19. 7004 [ ETH_VALID]
Packet Ingress MessagType- CPTS_MESSAGE_SYNC, SeqID- 7711 [ 0. 19. 7504 [ ETH_VALID]
----------------------------
Time Stamping Test Completed
----------------------------
---------------------------------------------
***********ETH RECEIVE TEST*******************
---------------------------------------------
Waiting to receive 50000 packets from CANoe/PC packet player
Receive packet statistics:
EXPECTEDETHERTYPE_IPV4 (0x800) = 54000
EXPECTEDETHERTYPE_VLAN (0x8100) = 0
UNEXPECTEDETHERTYPE = 0
-----------------------------------------------
***********ETH TRANSMIT TEST*******************
-----------------------------------------------
Transmitting 50000 packets,
Expect CANoe / PC Wireshark to receive 50000 packets..
Stats: Sent=50000,
Transmitted 50000 packets
----------------------------
Controller 0 Counters
----------------------------
Buffer overruns : 0
CRC errors : 0
Undersize packets : 0
Oversized packets : 0
Alignment errors : 0
Erroneous inbound : 0
Erroneous outbound: 0
Single collision : 0
Multiple collision: 0
Deferred transm : 0
Late collisions : 0
Excessive colls : 0
Carrier loss : 0
----------------------------
Controller 0 Rx Statistics
----------------------------
Rx Drop Events : 0
Rx Octets : 55073800
Rx Packets : 56100
Rx Bcast Packets : 0
Rx Mcast Packets : 2000
Rx CRC/Align Errors : 0
Rx Undersized Packets: 0
Rx Oversized Packets : 0
Rx Fragments : 0
Rx Jabbers : 0
Rx Unicast Packets : 52100
----------------------------
Controller 0 Tx Statistics
----------------------------
Tx Num octets : 151817800
Tx No Unicast Packets : 100200
Tx Unicast Packets : 0
--------------------------------
Controller 0 Tx Error Counters
--------------------------------
Tx Deferred transm : 0
Tx Single collisions : 0
Tx Multiple collisions : 0
Tx Late collisions : 0
Tx Excessive collisions : 0
ETH Test Passed!!!
4.10.13.3. Run eth_test_app¶
4.10.13.3.1. Configuration¶
RX buffer |
24 |
RX threshold |
12 |
RX IRQ pacePerMs |
32 |
TX buffer |
12 |
TX IRQ pacePerMs |
32 |
Link speed |
1 Gbps |
4.10.13.3.2. Steps to build and run¶
Build eth_load_app for AM263/AM273 in <mcal_sitara_mcu>/build
make OS=Linux PLATFORM=am263 PROFILE=release allclean
make OS=Linux PLATFORM=am263 PROFILE=release BUILD_VARIANT=precompile eth_test_app
Build host test app in host test app directory
<mcal_sitara_mcu>/mcal/examples/Eth/eth_test_app/host$ make clean && make
Launch target config for AM263x in CCS
Connect to Cortex_R5_0
Load <mcal_sitara_mcu>/mcal/binary/eth_test_app/bin/am263/eth_test_app_r5f0_0_release.xer5f onto the core
Run the test app in CCS
Run host test app
Run host load app with the eth interface in the host directory
<mcal_sitara_mcu>/mcal/examples/Eth/eth_test_app/host$
sudo ./EthHostTestApp -i <eno>
4.10.13.3.3. Sample log¶
Eth Application build date/time: May 2 2024, 16:23:13
Eth Application Starts
ETH_APP: EthTrcv Controller mode change - ETHTRCV_MODE_ACTIVE
ETH_APP:ETHTRCV Link up
ETH_APP:ETHTRCV baud rate = 1000Mbps
ETH_APP:ETHTRCV in full duplex mode
ETH_APP:ETHTRCV Normal Operation
ETH_APP:ETHTRCV Tx mode Normal
ETH_APP:ETHTRCV PHY(DP83869HM) ID is proper. OUI: 0x80028, Model No: 0xf, Revision No: 0x1
ETH_APP:ETHTRCV Cable Diagnostics Ok
ETH_APP:ETHTRCV Phy test mode Normal
MAC Port 1 Address:
aa:bb:cc:dd:ee:ff
ETH MCAL Version Info
---------------------
Vendor ID : 44
Module ID : 88
SW Major Version : 9
SW Minor Version : 2
SW Patch Version : 0
ETH TRCV MCAL Version Info
---------------------
Vendor ID : 44
Module ID : 73
SW Major Version : 9
SW Minor Version : 2
SW Patch Version : 0
Waiting for Host..
No Response from Host, remaining retry = 100
Host App detected! Sending Read ACK CMD...
-----------------------------------------------------------
test_0001: START
test_0001: received 1000 of 1000 frames
test_0001: END
Test Result: Pass 0
-----------------------------------------------------------
-----------------------------------------------------------
test_0002: START
test_0002: END
Test Result: Pass 0
-----------------------------------------------------------
-----------------------------------------------------------
test_0003: START
test_0003: END
Test Result: Pass 0
-----------------------------------------------------------
-----------------------------------------------------------
test_0004: START
test_0004: received 500 of 500 frames
test_0004: END
Test Result: Pass 0
-----------------------------------------------------------
-----------------------------------------------------------
test_0005: START
test_0005: Null: Exp1: exp 500, got 500
test_0005: Null: Exp2: exp 0, got 0
test_0005: Ucast: Exp1: exp 500, got 500
test_0005: Ucast: Exp2: exp 500, got 500
test_0005: Mcast: Exp1: exp 500, got 500
test_0005: Mcast: Exp2: exp 500, got 500
test_0005: Mcast: Exp1: exp 500, got 500
test_0005: Mcast: Exp2: exp 0, got 0
test_0005: Bcast: Exp1: exp 500, got 500
test_0005: Bcast: Exp2: exp 500, got 500
test_0005: Null: Exp1: exp 500, got 500
test_0005: Null: Exp2: exp 0, got 0
test_0005: END
Test Result: Pass 0
-----------------------------------------------------------
-----------------------------------------------------------
test_0006: START
test_0006: END
Test Result: Pass 0
-----------------------------------------------------------
-----------------------------------------------------------
test_0007: START
test_0007: END
Test Result: Pass 0
-----------------------------------------------------------
-----------------------------------------------------------
test_0008: START
test_0008: END
Test Result: Pass 0
-----------------------------------------------------------
-----------------------------------------------------------
test_0009: START
test_0009: received 1000 of 1000 frames
test_0009: END
Test Result: Pass 0
-----------------------------------------------------------
-----------------------------------------------------------
test_0010: START
Set CtrlMode DOWN
Get CtrlMode DOWN
Set CtrlMode ACTIVE
Get CtrlMode ACTIVE
test_0002: START
test_0002: END
test_0001: START
test_0001: received 1000 of 1000 frames
test_0001: END
Set CtrlMode DOWN
Get CtrlMode DOWN
Set CtrlMode ACTIVE
Get CtrlMode ACTIVE
test_0002: START
test_0002: END
test_0001: START
test_0001: received 1000 of 1000 frames
test_0001: END
Set CtrlMode DOWN
Get CtrlMode DOWN
Set CtrlMode ACTIVE
Get CtrlMode ACTIVE
test_0002: START
test_0002: END
test_0001: START
test_0001: received 1000 of 1000 frames
test_0001: END
Set CtrlMode DOWN
Get CtrlMode DOWN
Set CtrlMode ACTIVE
Get CtrlMode ACTIVE
test_0002: START
test_0002: END
test_0001: START
test_0001: received 1000 of 1000 frames
test_0001: END
Set CtrlMode DOWN
Get CtrlMode DOWN
Set CtrlMode ACTIVE
Get CtrlMode ACTIVE
test_0002: START
test_0002: END
test_0001: START
test_0001: received 1000 of 1000 frames
test_0001: END
Set CtrlMode DOWN
Get CtrlMode DOWN
Set CtrlMode ACTIVE
Get CtrlMode ACTIVE
test_0002: START
test_0002: END
test_0001: START
test_0001: received 1000 of 1000 frames
test_0001: END
Set CtrlMode DOWN
Get CtrlMode DOWN
Set CtrlMode ACTIVE
Get CtrlMode ACTIVE
test_0002: START
test_0002: END
test_0001: START
test_0001: received 1000 of 1000 frames
test_0001: END
Set CtrlMode DOWN
Get CtrlMode DOWN
Set CtrlMode ACTIVE
Get CtrlMode ACTIVE
test_0002: START
test_0002: END
test_0001: START
test_0001: received 1000 of 1000 frames
test_0001: END
Set CtrlMode DOWN
Get CtrlMode DOWN
Set CtrlMode ACTIVE
Get CtrlMode ACTIVE
test_0002: START
test_0002: END
test_0001: START
test_0001: received 1000 of 1000 frames
test_0001: END
Set CtrlMode DOWN
Get CtrlMode DOWN
Set CtrlMode ACTIVE
Get CtrlMode ACTIVE
test_0002: START
test_0002: END
test_0001: START
test_0001: received 1000 of 1000 frames
test_0001: END
test_0010: completed 10 of 10 iterations
test_0010: END
Test Result: Pass 0
-----------------------------------------------------------
-----------------------------------------------------------
test_0011: START
test_0011: END
Test Result: Pass 0
-----------------------------------------------------------
-----------------------------------------------------------
test_0300: START
Egress timestamp 0 Ts: 626478464 1 0
Egress timestamp 1 Ts: 657482496 1 0 [Exp: 0.030999999 Actual: 0.031004032]
Egress timestamp 2 Ts: 719486080 1 0 [Exp: 0.061999999 Actual: 0.062003583]
Egress timestamp 3 Ts: 844489088 1 0 [Exp: 0.125000000 Actual: 0.125003010]
Egress timestamp 4 Ts: 94492032 2 0 [Exp: 0.250000000 Actual: 0.250002950]
Egress timestamp 5 Ts: 594494976 2 0 [Exp: 0.500000000 Actual: 0.500002921]
Egress timestamp 6 Ts: 344498176 3 0 [Exp: 0.750000000 Actual: 0.750003219]
Egress timestamp 7 Ts: 344501248 4 0 [Exp: 1.000000000 Actual: 1.000003099]
Egress timestamp 8 Ts: 344504320 6 0 [Exp: 2.000000000 Actual: 2.000003099]
Egress timestamp 9 Ts: 344507904 11 0 [Exp: 5.000000000 Actual: 5.000003815]
test_0300: END
Test Result: Pass 0
-----------------------------------------------------------
-----------------------------------------------------------
test_0301: START
test_0301: received 10 of 10 frames
Ingress timestamp 0 Ts: 449156096 12 0
Ingress timestamp 1 Ts: 481692672 12 0 [Exp: 0.030999999 Actual: 0.032536577]
Ingress timestamp 2 Ts: 545492992 12 0 [Exp: 0.061999999 Actual: 0.063800320]
Ingress timestamp 3 Ts: 671789056 12 0 [Exp: 0.125000000 Actual: 0.126296058]
Ingress timestamp 4 Ts: 923078656 12 0 [Exp: 0.250000000 Actual: 0.251289606]
Ingress timestamp 5 Ts: 424245760 13 0 [Exp: 0.500000000 Actual: 0.501167119]
Ingress timestamp 6 Ts: 175565824 14 0 [Exp: 0.750000000 Actual: 0.751320064]
Ingress timestamp 7 Ts: 176792064 15 0 [Exp: 1.000000000 Actual: 1.001226187]
Ingress timestamp 8 Ts: 178081280 17 0 [Exp: 2.000000000 Actual: 2.001289129]
Ingress timestamp 9 Ts: 179293184 22 0 [Exp: 5.000000000 Actual: 5.001212120]
test_0301: END
Test Result: Pass 0
-----------------------------------------------------------
-----------------------------------------------------------
test_0302: START
Current timestamp 0 Ts: 289099776 24 0
Current timestamp 0 Ts: 292584960 25 0
Current timestamp 0 Ts: 296068096 26 0
Current timestamp 0 Ts: 299553280 27 0
Current timestamp 0 Ts: 303036416 28 0
Current timestamp 0 Ts: 306517504 29 0
Current timestamp 0 Ts: 310000640 30 0
Current timestamp 0 Ts: 313483776 31 0
Current timestamp 0 Ts: 316966912 32 0
Current timestamp 0 Ts: 320448000 33 0
test_0302: END
Test Result: Pass 0
-----------------------------------------------------------
-----------------------------------------------------------
test_0110: START
test_0100 frames 150000 size 1500: START
test_0100: 10 frames size 1500
test_0100: END
test_0100 frames 150000 size 512: START
test_0100: 10 frames size 512
test_0100: END
test_0100 frames 150000 size 256: START
test_0100: 10 frames size 256
test_0100: END
test_0100 frames 150000 size 128: START
test_0100: 10 frames size 128
test_0100: END
test_0100 frames 150000 size 64: START
test_0100: 10 frames size 64
test_0100: END
test_0110: DONE
Test Result: Pass 0
-----------------------------------------------------------
-----------------------------------------------------------
test_0101: START
receiveTput-1500: received 149935 frames in 1.92 secs (78213.07 frames/s, 938.56 Mbps) Lost 0
receiveTput-512: received 149945 frames in 1.90 secs (78897.49 frames/s, 323.16 Mbps) Lost 0
receiveTput-256: received 150000 frames in 1.90 secs (78895.63 frames/s, 161.58 Mbps) Lost 0
receiveTput-128: received 300000 frames in 3.70 secs (81069.05 frames/s, 83.01 Mbps) Lost 0
receiveTput-64: received 300000 frames in 3.71 secs (80912.84 frames/s, 41.43 Mbps) Lost 0
test_0101: END
Test Result: Pass 0
-----------------------------------------------------------
-----------------------------------------------------------
test_0500: START
EthTrcv link state: Up
EthTrcv link state: Up
EthTrcv link state: Up
EthTrcv link state: Up
.....
EthTrcv link state: Up
EthTrcv link state: Up
test_0500: END
Test Result: Pass 0
-----------------------------------------------------------
----------------------------
Controller 0 Counters
----------------------------
Buffer overruns : 0
CRC errors : 0
Undersize packets : 0
Oversized packets : 0
Alignment errors : 0
SQE errors : -1
Discarded inbound : -1
Erroneous inbound : 0
Discarded outbound: -1
Erroneous outbound: 0
Single collision : 0
Multiple collision: 0
Deferred transm : 0
Late collisions : 0
Excessive colls : 0
Carrier loss : 0
----------------------------
Controller 0 Rx Statistics
----------------------------
Rx Drop Events : 0
Rx Octets : 402108288
Rx Packets : 1051134
Rx Bcast Packets : 0
Rx Mcast Packets : 67
Rx CRC/Align Errors : 0
Rx Undersized Packets: 0
Rx Oversized Packets : 0
Rx Fragments : 0
Rx Jabbers : 0
Rx Collisions : -1
Rx 64 bytes or less Packets : -1
Rx 65 to 127 bytes Packets : -1
Rx 128 to 255 bytes Packets : -1
Rx 256 to 511 bytes Packets : -1
Rx 512 to 1023 bytes Packets : -1
Rx 1024 to 1518 bytes Packets : -1
Rx Unicast Packets : 1051000
----------------------------
Controller 0 Tx Statistics
----------------------------
Tx Num octets : 387075068
Tx No Unicast Packets : 753102
Tx Unicast Packets : 0
--------------------------------
Controller 0 Tx Error Counters
--------------------------------
Tx Deferred transm : 0
Tx Single collisions : 0
Tx Multiple collisions : 0
Tx Late collisions : 0
Tx Excessive collisions : 0
ETH Stack Usage: 2580 bytes
Final Tests Results: PASS
Eth Application Completed
4.10.13.4. Run eth_load_app¶
4.10.13.4.1. Configuration¶
RX buffer |
24 |
RX threshold |
12 |
RX IRQ pacePerMs |
32 |
TX buffer |
12 |
TX IRQ pacePerMs |
32 |
Link speed |
1 Gbps |
4.10.13.4.2. Steps to build and run¶
Build eth_load_app for AM263/AM273 in <mcal_sitara_mcu>/build:
export MCUPLUSSDK_ROOTDIR=/home/xl4jp/ti/mcu_plus_sdk_am263x_09_02_00_47
make OS=Linux PLATFORM=am263 PROFILE=release allclean
make OS=Linux PLATFORM=am263 PROFILE=release BUILD_VARIANT=precompile eth_load_app
Launch target config for AM263x in CCS.
Connect to Cortex_R5_0.
Load <mcal_sitara_mcu>/mcal/binary/eth_load_app/bin/am263/eth_load_app_r5f0_0_release.xer5f onto the core.
Build and run host load app:
Build and run host load app with the eth interface in the host directory
<mcal_sitara_mcu>/mcal/examples/Eth/eth_load_app/host$ make clean && make
sudo ./EthHostLoadApp -i <eno>
Run the test app in CCS
4.10.13.4.3. Sample log¶
Eth Application build date/time: May 2 2024, 17:01:22
ETH_APP: EthTrcv Controller mode change - ETHTRCV_MODE_ACTIVE
ETH_APP:ETHTRCV Link up
ETH_APP:ETHTRCV baud rate = 1000Mbps
ETH_APP:ETHTRCV in full duplex mode
ETH_APP:ETHTRCV Normal Operation
ETH_APP:ETHTRCV Tx mode Normal
ETH_APP:ETHTRCV PHY(DP83869HM) ID is proper. OUI: 0x80028, Model No: 0xf, Revision No: 0x1
ETH_APP:ETHTRCV Cable Diagnostics Ok
ETH_APP:ETHTRCV Phy test mode Normal
aa:bb:cc:dd:ee:ff
Link Speed 1Gbps
ETH MCAL Version Info
---------------------
Vendor ID : 44
Module ID : 88
SW Major Version : 9
SW Minor Version : 2
SW Patch Version : 0
ETH TRCV MCAL Version Info
---------------------
Vendor ID : 44
Module ID : 73
SW Major Version : 9
SW Minor Version : 2
SW Patch Version : 0
RX_BUF=24 TX_BUF=12
RxPacing Enable=1 pacePerMs=32 Threshold=12
TxPacing Enable=1 pacePerMs=32
Tx throughput test size 1500 Done in 8s load 43 (irqLoad 11)
Tx throughput test size 512 Done in 5s load 89 (irqLoad 16)
Tx throughput test size 256 Done in 5s load 84 (irqLoad 17)
Tx throughput test size 128 Done in 5s load 81 (irqLoad 17)
Tx throughput test size 64 Done in 5s load 75 (irqLoad 17)
Rx throughput test size 1500 Done in 7s load 34 (irqLoad 34)
Rx throughput test size 512 Done in 11s load 32 (irqLoad 32)
Rx throughput test size 256 Done in 21s load 29 (irqLoad 29)
Rx throughput test size 128 Done in 25s load 26 (irqLoad 26)
Rx throughput test size 64 Done in 21s load 26 (irqLoad 26)
Performance result - 1Gbps link
----------------------------------------------------------------------
|Pkt Size | TX throughput(Mbps) | TX packet rate(Pps) | Cpu load(%) |
---------------------------------------------------------------------
| 1500 | 959 | 79247 | 43 |
---------------------------------------------------------------------
| 512 | 923 | 219365 | 89 |
---------------------------------------------------------------------
| 256 | 520 | 241054 | 84 |
---------------------------------------------------------------------
| 128 | 277 | 244554 | 81 |
---------------------------------------------------------------------
| 64 | 153 | 245351 | 75 |
---------------------------------------------------------------------
----------------------------------------------------------------------
|Pkt Size | RX throughput(Mbps) | RX packet rate(Pps) | Cpu load(%) |
---------------------------------------------------------------------
| 1500 | 984 | 82016 | 34 |
---------------------------------------------------------------------
| 512 | 469 | 114674 | 32 |
---------------------------------------------------------------------
| 256 | 239 | 116921 | 29 |
---------------------------------------------------------------------
| 128 | 121 | 118917 | 26 |
---------------------------------------------------------------------
| 64 | 60 | 118032 | 26 |
---------------------------------------------------------------------
4.10.14. FAQ’s¶
None
4.10.15. Test Report (Link to test report)¶
Will be updated in future release.
4.10.16. References¶
4.10.17. Disclaimer¶
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements.
Customers are responsible for their applications using TI components. In order to minimize risks associated with the customer’s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such products or services might be or are used. TI’s publication of information regarding any third party’s products or services does not constitute TI’s approval, license, warranty or endorsement thereof.
Reproduction of information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations and notices. Representation or reproduction o f this information with alteration voids all warranties provided for an associated TI product or service, is an unfair and deceptive business practice, and TI is not responsible nor liable for any such use.
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