4.1. ADC

4.1.1. About This Document

Document Title	User Guide of MCAL ADC Driver
Document Version	Version 1.8
Company	Texas Instruments
Document Name	ADC User Guide

4.1.2. Document Revision History

Version	Date	Revision History	Status
Version 1.0	18 Nov 2022	Initial Version	Approved
Version 1.1	21 Dec 2022	ADC Example application testing procedure is added	Approved
Version 1.2	07 Dec 2022	ADC module is updated for DMA mode implementation.	Approved
Version 1.3	07 May 2023	ADC module is updated for example application upgrade, cross bar interrupt and DMA mode information is added.	Approved
Version 1.4	12 Jun 2023	Updated as per HTML format.	Approved
Version 1.5	25 Aug 2023	Document release version column removed	Approved
Version 1.6	20 Oct 2023	Polling Mechanism is updated for ADC module.	Approved
Version 1.7	12 Feb 2024	Polling API, Assumptions, Perfomance are updated	Approved
Version 1.8	15 Mar 2024	ADC Example application description updated for Polling and Interrupt access modes.	Approved

4.1.3. Table of contents

1. Acronyms and Definitions

2. Functional Overview

3. Deviations to requirements (Requirement Traceability)

4. Integration Details

5. API Description

6. Configuration Description

7. Memory Mapping

8. Memory footprint

9. Performance

10. Example Usage

11. FAQ’s

12. Test Report

13. References

14. TI Disclaimer

4.1.4. Acronyms and Definitions

Acronyms and Definitions used are presented in below table.

Acronyms	Descriptions
BSW	Basic Software
DET	Default Error Tracer
ADC	Analogue Digital Converter
MCU	Micro Controller Unit
OS	Operating System
API	Application Programming Interface
HW	Hardware
SW	Software
ISR	Interrupt Service Routine
SPS	Samples Per Second
SOC	Start of Conversion
EOC	End of Conversion
INT	Interrupt

4.1.5. Functional Overview

4.1.5.1. Brief Overview

This document describes MCAL ADC Driver functionality, its application interfaces and configuration details as per AUTOSAR version 4.3.1 .

Supported AUTOSAR Release	4.3.1
Supported Configuration Variants	Pre-Compile, Post-build
Vendor ID	ADC_VENDOR_ID (44)
Module ID	ADC_MODULE_ID (123)
Supported Platform	AM263x

The ADC module initiates analog to digital conversion requests and provides the conversion results for external analog monitoring channels and internally connected digital temperature sensors. It provides services to start, stop and read conversion results for configurable ADC groups consisting of one or more external analog monitoring channels.

4.1.5.1.1. ADC Driver Architecture

The following figure shows where the ADC is located in the AUTOSAR architecture

Figure 1: ADC in AUTOSAR architecture.

The ADC hardware module is a successive approximation (SAR) style ADC. This ADC is composed of a core and a wrapper. The core is composed of the analog circuits which include the channel select MUX, the sample-and hold (S/H) circuit, the successive approximation circuits, voltage reference circuits, and other analog support circuits. The wrapper is composed of the digital circuits that configure and control the ADC. These circuits include the logic for programmable conversions, result registers, interfaces to analog circuits, interfaces to the peripheral buses, post-processing circuits, and interfaces to other on-chip modules. Each ADC module consists of a single sample-and-hold (S/H) circuit. The ADC module is designed to be duplicated multiple times on the same chip, allowing simultaneous sampling or independent operation of multiple ADCs.

Figure_2: ADC Hardware Overview.

Figure_3: System Overview.

4.1.5.1.2. Initialization

Adc_Init() has to be called to initialize the ADC driver before initiating any group conversion. This will also set all the groups to ADC_IDLE state.

4.1.5.1.3. States

There are 4 states in which each ADC group for one shot single access mode can be:

1. ADC_IDLE: This is the state before starting a group, no conversion request for the group has been initiated or after the conversion result of a stream completed group is read.

2. ADC_BUSY: This is the state after a group is started but hasn’t finished i.e. conversion result for the group is not yet available.

3. ADC_COMPLETED: This is the state after a group has finished first or more samples of ADC analog input.

4. ADC_STREAM_COMPLETED: This is the state after a group has finished i.e., conversion result for the group is available.

Figure 3: ADC State Diagram - 1

Figure 4: ADC State Diagram - 2

4.1.5.2. Features Supported and Not Supported

ADC IP Features supported	Autosar Features Supported	Not Supported
12-bit resolution Single-ended signal conversions Multiple trigger sources Input multiplexer with up to 6 channels 16 individually addressable result registers Four flexible interrupts Post-Processing Blocks: Flag a high or low compare limit	Software triggered one-shot conversion where the converted group consists of exactly one channel. Hardware triggered one-shot conversion where the converted group consists of exactly one channel. Continuous conversion where the converted group consists of exactly one channel. Software triggered one-shot conversion where the converted group consists of more than one channel. Hardware triggered one-shot conversion where the converted group consists of more than one channel. Continuous conversion where the converted group consists of more than one channel. Support for limit checking for all ADC hardware channels.	ADC Hardware Features not supported Burst mode External reference set by VREFHI and VREFLO pins Differential mode support Four post-processing blocks each with Saturating offset calibration Error from set-point calculation Trigger-to-sample delay capture Autosar Features not supported Support and management of HW low power states

4.1.5.3. Assumptions

Below listed are assumed to valid for this design/implementation, exceptions and other deviations are listed for each explicitly. Care should be taken to ensure these assumptions are addressed.

1. ADC module requires system clock to be in operation.

2. ADC module is not dependent on PORT module for Configuration of ADC Port pins.

3. Configuration of ADC cross bar interrupts shall be configured in MCU module.

4. ADC data buffer control for each hardware unit is handled by MCU module.

4.1.5.4. Limitations

Maximum 4 hardware triggered channel groups can be queued, when ADC Priority implementation ADC_PRIORITY_HW and ADC_PRIORITY_HW_SW.

Note

Hardware Triggered Channel Groups can be queued with ADC Priority implementation ADC_PRIORITY_HW and ADC_PRIORITY_HW_SW.

ADC Priority implementation ADC_PRIORITY_HW and ADC_PRIORITY_HW_SW requires all four Interrupts (ADC_INT1 to ADC_INT4) for conversion of ADC (In case of using queuing mechanism).

4.1.5.5. Design overview

4.1.5.5.1. ADC Hardware Description

ADC module is composed of

1. Five Hardware units,

2. Each Hardware unit has four ADC interrupt

3. Each Hardware unit has Analog input channels ADCIN[0:5] ( have dedicated pins ).

4. Each Hardware unit has 15 SOC’s (start of conversion units) for conversion of ADC channels.

Figure 3: SOC architecture

The analog channel which needs to be converted, needs to be placed in one of the SOC’s for conversion and result will be available is respective result register as shown in below figure. Based on trigger (either HW trigger or SW trigger), conversion shall be started for ADC HW Channel.

Figure 4: ADC Channel Conversion Process

4.1.5.5.2. Autosar ADC Design

The ADC Analog input channels are configured in container AdcChannel. The actual physical channel ID needs to be specified here.

The ADC Group consists of the combination of ADC channels. These Groups configured in container AdcHwUnit.

The below figure shows, how physical channels are mapped in Group.

Figure 4: ADC Channel Group Configuration

Since the conversion of ADC Channels is based on ADC Group in AUTOSAR, the ADC Groups are placed in SOC’s based on Group’s being called for conversion using autosar API’s:

Adc_StartGroupConversion for SW triggered groups

Adc_EnableHardwareTrigger for HW triggered groups

The below figure shows the group conversion process for AUTOSAR ADC module in ADC hardware:

Figure 5: ADC Channel Group Conversion Process

Here based on group priority the ADC Groups are allocated with SOC’s of Hardware unit. Lowest priority group will be at bottom of SOC and highest will be at TOP of SOC structure. If high priority group comes during execution of low priority group, the high priority Group shall be placed above the top of low priority SOC. If the priority mechanism is active, the ADC module shall handle channel group conversion requests for groups with the same priority level, in a ‘first come first served’ order.

4.1.5.5.3. Cross Bar Interrupt

There are four interrupts for each hardware unit of ADC module, which can be access through cross bar interrupt. There are 32 cross bar interrupts for Am263x, ADC modules can be mapped to any of these cross interrupts as per requirement.

The Mapping of ADC interrupts and cross bar interrupts are handled by MCU module configuration. (Refer section MCU)

Same interrupt source number should be configured by application.

Figure 6: Interrupt Cross Bar List

4.1.5.5.4. ADC Polling Mechanism

In Polling Mechanism, we shall use the API Adc_PollingMainFunction. This API shall be responsible to change the group staus and updated the group channelbuffer(which are configured as polling mode). The Function “Adc_PollingMainFunction”, shall be called periodically or else via using API “Adc_GetStatus”.

The consistency of the group channel results can be obtained via API function Adc_GetGroupStatus and Adc_ReadGroup.

Note

Cross bar Interrupts for ADC interrupt shall be configured in MCU module.

If priority mechanism is ADC_PRIORITY_NONE, only SW triggered groups can be configured and SW groups are stored in SW Queue as per priority.

Multiple HW trigger Group can be stored in SOC’s (Depending on channels configured in Group), if priority mechanism ADC_PRIORITY_HW_SW or ADC_PRIORITY_HW.

SW trigger Group are stored in SW Queue and HW triggered Group’s are allocated with SOC’s ( if group priority is higher then current executing group ).

Its recommended to disable all the ADC interrupts related of particular Hardware unit in the application, if ADC groups are configured in Polling mode.

In case of mixed mode setting is used (Polling and Interrupt mode together) then the conversion should be triggered one after the other.

4.1.5.6. File Structure

Description of static files is provided below:

Static source and header files	Description
Adc.h	Contains the API’s of the ADC driver to be used by upper layers.
Adc.c	Contains the implementation of the API’s for ADC driver.
Adc_Irq.c and Adc_Irq.h	Contains ISR function definitions
Adc_Types.h	Contains the autosar data types and internal macro definitions.
Adc_Priv.c and Adc_Priv.h	Contains Internal functions definition of ADC driver.
Adc_Platform.c and Adc_Platform.h	Contains device specific a function definition, data types and definitions.
Adc_Utils.c and Adc_Utils.h	Utility functions implementation file. This file defines the helper functions like create, add and remove nodes

Description of generated files is provided below:

Plugin Files	Descriptions
Adc_Cfg.h	Contains the Precompile switches, Symbolic names of Group, channels and hardware units and Configured maximum number Groups and hardware units
Adc_PBcfg.c	Contains all channels Post-Build Configured parameters
Adc_Cfg.c	Contains all channels Pre-Compile Configured parameters

Figure 4: ADC header file include structure

4.1.6. Deviations to requirements (Requirement Traceability)

4.1.6.1. Module Requirements

Please refer Software Product Specification document provided as part of CSP.

4.1.6.2. Deviation of requirements against AUTOSAR specification requirements

Will be updated in future release

4.1.7. Integration Details

4.1.7.1. Dependency on Other Software Modules

4.1.7.1.1. The ADC Driver dependent modules

4.1.7.1.1.1. MCU

The ADC modules expects the MCU module to be powered on. The ADC module depends on MCU module for data buffer control and crossbar interrupt mapping of ADC interrupts depending on the Hardware unit being configured.

Suppose the Hardware Unit 1 and Hardware Unit 3 are configured for ADC module:

Figure 7: ADC Hardware container

Then, the MCU module container McuAdcConfiguration should be configured as shown in below figure:

Figure 8: McuAdcConfiguration container

Figure 9: ADC Hardware unit selection.

Similarly, the crossbar interrupts also needs to be mapped in MCU module according to HW unit and interrupts being required.

The ADC interrupts needs to be mapped to the corresponding cross bar interrupt required.

Please refer limitation section of Interrupts to be configured for ADC as per AdcPriorityImplementation.

Fig. 4.1 Figure 10: ADC Interrupt configuration.

Figure 11: ADC Interrupt selection.

4.1.7.1.1.2. DMA

The ADC Module requires DMA module to be configured, when ADC is configured in DMA mode and ADC channel Group is configured for DMA access.

1. ADC Module Configuration:

   • The ADC module parameter AdcDMAEnable should be configured for TRUE.

   • The ADC Channel Group parameter AdcGroupDataAccessMethod should be configured with ADC_GROUP_DMA_ACCESS.

   • The ADC parameter AdcDmaChannelId in AdcChannel container represents the DMA Channel ID (0 to 63) to be configured.

   • This AdcDmaChannelId parameter should be configured sequentially.

2. DMA module Configuration:

   • In CDD DMA module, CddDmaChannelTriggerConfiguration container should be configured w.r.t the trigger selection for ADC module.

   • ADC module is dependent on X-BAR DMA interrupts, thus we have configure the X-BAR interrupts in DMA module.

3. The ADC Trigger source should be configured for one and many of DMA channels using following parameters, in containers

   • CddDmaDmaChannelModule represents the DMA Channel ID (0 - 63)

   • CddDmaChannelTriggerSource represents which Trigger source we should map the DMA Channel ID.

   • CddDmaDmaChannelXbar represents the DMA Cross-BAR. If the CddDmaChannelTriggerSource is selected between DMA_TRIG_XBAR_DMA_XBAR_OUT_0 to DMA_TRIG_XBAR_DMA_XBAR_OUT_15, then this parameter should be mapped to respective Cross-BAR.

   • CddDmaDmaChannelXbarMap represents the trigger source for the Cross-BAR, which can be from module like ADC, EPWM, FSI etc.

   • The ADC Trigger source should be selected according to the Interrupt Source and ADC instance configured. The ADC parameter AdcDmaChannelId in AdcChannel container and CddDmaDmaChannelModule in CddDmaChannelTriggerConfiguration container should be same.

Figure 12: CDD DMA configuration.

Figure 13: ADC module DMA channel ID selection.

4.1.7.1.2. Error Handling module

4.1.7.1.2.1. DET

The module ADC depends on the DET (by default) in order to report development errors.

Detection and reporting of development errors can be enabled or disabled by the parameter AdcDevErrorDetect (The macro ADC_DEV_ERROR_DETECT = STD_ON generated in file Adc_Cfg.h).

The DET can be replaced optionally by an equivalent component which is responsible to recognize development errors, if no DET component is available.

The DET error is reported with Module ID.

The reported service IDs identify the services which are described earlier.

The following table represents the service IDs:

Service ID	Service
ADC_SID_INIT = 0x00	Adc_Init
ADC_SID_DEINIT = 0x01	Adc_DeInit
ADC_SID_START_GROUP_CONVERSION = 0x02	Adc_StartGroupConversion
ADC_SID_STOP_GROUP_CONVERSION = 0x03	Adc_StopGroupConversion
ADC_SID_READ_GROUP = 0x04	Adc_EnableHardwareTrigger
ADC_SID_ENABLE_HARDWARE_TRIGGER = 0x05	Adc_EnableGroupNotification
ADC_SID_DISABLE_HARDWARE_TRIGGER = 0x06	Adc_DisableHardwareTrigger
ADC_SID_ENABLE_GROUP_NOTIFICATION = 0x07	Adc_EnableGroupNotification
ADC_SID_DISABLE_GROUP_NOTIFICATION = 0x08	Adc_DisableGroupNotification
ADC_SID_GET_GROUP_STATUS = 0x09	Adc_GetGroupStatus
ADC_SID_GET_VERSION_INFO = 0x0A	Adc_GetVersionInfo
ADC_SID_GET_STREAM_LAST_POINTER = 0x0B	Adc_GetStreamLastPointer
ADC_SID_SETUP_RESULT_BUFFER = 0x0C	Adc_SetupResultBuffer
ADC_SID_SET_POWER_STATE = 0x10	Adc_SetPowerState
ADC_SID_GET_CURRENT_POWER_STATE = 0x11	Adc_GetCurrentPowerState
ADC_SID_GET_TARGET_POWER_STATE = 0x12	Adc_GetTargetPowerState
ADC_SID_PREPARE_POWER_STATE = 0x13	Adc_PreparePowerState
ADC_SID_MAIN_POWER_TRANSITION_MANAGER = 0x14	Adc_Main_PowerTransitionManager
ADC_SID_POLLING_MAINFUNCTION = 0x15	Adc_PollingMainFunction
ADC_SID_IOHWAB_NOTIFICATION = 0x20	IoHwAb_AdcNotification
ADC_SID_IOHWAB_NOTIFY_READY_FOR_POWER_STATE = 0x70	IoHwAb_Adc_NotifyReadyForPowerState
ADC_SID_REGISTER_READBACK = 0x16	Adc_RegisterReadback

The errors reported to DET module are described in the following table:

Error Code	Error Macro	Description
[0x0A]	ADC_E_UNINIT	API service used without module initialization
[0x0B]	ADC_E_BUSY	API service called during ongoing process
[0x0C]	ADC_E_IDLE	API service called while no conversion is ongoing
[0x0D]	ADC_E_ALREADY_INITIALIZED	API service called ADC is already initialized.
[0x0E]	ADC_E_PARAM_CONFIG	API service called with incorrect configuration parameter
[0x14]	ADC_E_PARAM_POINTER	API service called with invalid data buffer
[0x15]	ADC_E_PARAM_GROUP	API service called with invalid group ID
[0x16]	ADC_E_WRONG_CONV_MODE	API service called on a group with conversion mode configured as continuous
[0x17]	ADC_E_WRONG_TRIGG_SRC	API service called for group with wrong trigger source
[0x18]	ADC_E_NOTIF_CAPABILITY	Enable/disable notification function for a group whose configuration set has no notification available
[0x19]	ADC_E_BUFFER_UNINIT	Conversion started and result buffer pointer is not initialized
[0x16]	ADC_E_WRONG_CONV_MODE	API servcie called on a group with conversion mode configured as continuous and HW Trigger
[0x17]	ADC_E_WRONG_TRIGG_SRC	API service called for group with wrong trigger source
[0x18]	ADC_E_NOTIF_CAPABILITY	Enable/disable notification function for a group whose configuration set has no notification available
[0x19]	ADC_E_BUFFER_UNINIT	Conversion started and result buffer pointer is not initialized
[0x1A]	ADC_E_NOT_DISENGAGED	One or more ADC group/channel not in IDLE state
[0x1B]	ADC_E_POWER_STATE_NOT_SUPPORTED	Unsupported power state request
[0x1C]	ADC_E_TRANSITION_NOT_POSSIBLE	Requested power state cannot be reached directly
[0x1D]	ADC_E_PERIPHERAL_NOT_PREPARED	ADC not prepared for target power state

The run time errors reported to DET module are described in the following table:

Error Code	Error Macro	Description
[0x0B]	ADC_E_BUSY	API service called during ongoing process
[0x0C]	ADC_E_IDLE	API service called while no conversion is ongoing

AUTOSAR requires that API functions check the validity of their parameters. The checks are described in spec and are done as internal parameter checks of the API functions. These checks are for development error reporting and can be en/dis-abled separately. Refer to the configuration chapter where the en/dis-abling of the checks is described. En/dis-abling of single checks is an addition to the AUTOSAR standard which requires to en/dis-able the complete parameter checking via the parameter ADC_DEV_ERROR_DETECT. The following table shows which parameter checks are performed on which services:

Check Services	ADC_E_UNINIT	ADC_E_BUSY	ADC_E_IDLE	ADC_E_ALREADY_INITIALIZED	ADC_E_PARAM_CONFIG	ADC_E_PARAM_POINTER	ADC_E_PARAM_GROUP	ADC_E_WRONG_TRIGG_SRC	ADC_E_NOTIF_CAPABILITY	ADC_E_BUFFER_UNINIT
Adc_Init				x	x
Adc_DeInit	x
Adc_StartGroupConversion	x						x	x		x
Adc_StopGroupConversion	x		x				x	x
Adc_ReadGroup	x		x			x	x
Adc_EnableGroupNotification	x	x					x		x
Adc_DisableGroupNotification	x						x		x
Adc_GetGroupStatus	x						x
Adc_GetVersionInfo						x
Adc_SetupResultBuffer	x	x				x	x
Adc_EnableHardwareTrigger	x						x	x		x
Adc_DisEnableHardwareTrigger	x		x				x	x
Adc_Get_StreamLastPointer

4.1.7.1.2.2. DEM

ADC modules does not report DEM errors.

4.1.7.1.2.3. Callback Functions

The ADC driver does not provide any call back functions.

4.1.7.1.2.4. Callback Notification

Notifications:

As it is a configurable interface, the ADC defines notifications that can be mapped to callback functions provided by other modules. The mapping is not statically defined by the ADC but can be performed at configuration time. The function prototypes that can be used for the configuration have to match the appropriate function prototype signatures, which are described in the following.

Adc_GroupEndNotifyType:

This is of type Adc_GroupEndNotifyType which is defined in Adc_Types.h file. This is called to notify the group about the completion of the requested conversion and availability of the conversion results.

4.1.7.2. Hardware - Software - ISR API name mapping

For interrupt notification, ISR’s are provided in ADC driver. There are four ISR for each ADC hardware unit. Depending on hardware unit configured, it will call group notify function. The interrupt service routines shall be mapped to the interrupt sources of the respective cross bar interrupt. The supported ISR’s are part of the Adc_Irq.h file.

Following are ADC module ISR for each hardware unit:

For interrupt notification, ISR’s are provided in ADC driver. There is one ISR for each ADC hardware unit. Depending on hardware unit configured, it will call group notify function. The interrupt service routines shall be mapped to the interrupt sources of the respective cross bar interrupt. The supported ISR’s are part of the Adc_Irq.h file.

Following are ADC module ISR for each hardware unit:

ADC HW UNIT	HW Interrupt	SW ISR for ADC module
ADC HW UNIT 0	ADC0.INT1	Adc_ADCINT1_IrqUnit0
	ADC0.INT2	Adc_ADCINT2_IrqUnit0
	ADC0.INT3	Adc_ADCINT3_IrqUnit0
	ADC0.INT4	Adc_ADCINT4_IrqUnit0
ADC HW UNIT 1	ADC1.INT1	Adc_ADCINT1_IrqUnit1
	ADC1.INT2	Adc_ADCINT2_IrqUnit1
	ADC1.INT3	Adc_ADCINT3_IrqUnit1
	ADC1.INT4	Adc_ADCINT4_IrqUnit1
ADC HW UNIT 2	ADC2.INT1	Adc_ADCINT1_IrqUnit2
	ADC2.INT2	Adc_ADCINT2_IrqUnit2
	ADC2.INT3	Adc_ADCINT3_IrqUnit2
	ADC2.INT4	Adc_ADCINT4_IrqUnit2
ADC HW UNIT 3	ADC3.INT1	Adc_ADCINT1_IrqUnit3
	ADC3.INT2	Adc_ADCINT2_IrqUnit3
	ADC3.INT3	Adc_ADCINT3_IrqUnit3
	ADC3.INT4	Adc_ADCINT4_IrqUnit3
ADC HW UNIT 4	ADC4.INT1	Adc_ADCINT1_IrqUnit4
	ADC4.INT2	Adc_ADCINT2_IrqUnit4
	ADC4.INT3	Adc_ADCINT3_IrqUnit4
	ADC4.INT4	Adc_ADCINT4_IrqUnit4
DMA Module ISR	EDMA INT	CDD_EDMA_lld_transferCompletionMasterIsrFxn

4.1.7.3. Scheduling Strategy

4.1.7.3.1. SchM

Beside the OS the BSW Scheduler provides functions that module ADC calls at begin and end of critical sections.

4.1.7.3.2. Critical Sections

There is only one kind of critical sections in this driver. Within these sections all read /modify / write accesses to internal ADC driver data structures must be protected. Therefore switching to tasks that also access ADC has to be avoided and all ADC interrupts have to be suspended. This is handled internally by ADC Driver.

4.1.8. API Description

4.1.8.1. Description of the API’s

Please refer MCAL_AM263_ApiGuide.CHM document provided as part of CSP.

4.1.8.2. API’s with Service ID

The following table presents the service IDs and the related services:

Service ID	Autosar API’s Supported	Autosar API’s not Supported
0x00	Adc_Init
0x01	Adc_DeInit
0x02	Adc_StartGroupConversion
0x03	Adc_StopGroupConversion
0x04	Adc_ReadGroup
0x05	Adc_EnableHardwareTrigger
0x06	Adc_DisableHardwareTrigger
0x07	Adc_EnableGroupNotification
0x08	Adc_DisableGroupNotification
0x09	Adc_GetGroupStatus
0x0A	Adc_GetVersionInfo
0x0B	Adc_GetStreamLastPointer
0x0C	Adc_SetupResultBuffer
0x20	IoHwAb_AdcNotification
0x10		Adc_SetPowerState
0x11		Adc_GetCurrentPowerState
0x12		Adc_GetTargetPowerState
0x13		Adc_PreparePowerState
0x14		Adc_Main_PowerTransitionManager
0x15	Adc_PollingMainFunction
0x70		IoHwAb_Adc_NotifyReadyForPowerState

Refer Autosar SWS for API description mentioned in above table.

4.1.8.3. Description on Non Standard API’s

Adc_PollingMainFunction

This function will used when Group is in Polling mode.

Adc_RegisterReadback API

This function is Non- Autosar based and is used to read the data in the registers of ADC.

This functionality is enabled, if parameter AdcEnableRegisterReadbackApi is TRUE (The Parameter sets ADC_REGISTER_READBACK_API Macro as STD_ON ).

Service Id is 0x16.

Adc_InitTemperatureRead

This API not applicable for AM263.

Adc_ReadTemperature

This API not applicable for AM263.

Adc_ReadTemperatureResult

This API not applicable for AM263.

4.1.9. Configuration Description

4.1.9.1. Configuration Variants

The ADC can be configured as Post-Build or Pre-Compile variant, using EB tresos tool.

Variants	Generated Files
PostBuild	Adc_PBcfg.c , Adc_Cfg.h
Pre-Compile	Adc_Cfg.c , Adc_Cfg.h

4.1.9.2. Parameter Description

Standard Parameters	Description	Default Value	Range	Unit/Datatype
AdcHwUnitId	Numeric ID of the HW Unit. This symbolic name allows accessing Hw Unit data. Enumeration literals are defined vendor specific.	ADC_UNIT_1	ADC_UNIT_1	ENUMERATION
AdcHwPrescale	Optional ADC module specific clock prescale factor	if supported by hardware.	ADC_CLK_DIV_1_0 ADC_CLK_DIV_2_0 ADC_CLK_DIV_2_5 ADC_CLK_DIV_3_0 ADC_CLK_DIV_3_5 ADC_CLK_DIV_4_0 ADC_CLK_DIV_4_5 ADC_CLK_DIV_5_0 ADC_CLK_DIV_5_5 ADC_CLK_DIV_6_0 ADC_CLK_DIV_6_5 ADC_CLK_DIV_7_0 ADC_CLK_DIV_7_5 ADC_CLK_DIV_8_0 ADC_CLK_DIV_8_5	ENUMERATION
AdcChannelId	This parameter defines the assignment of the channel to the physical ADC hardware channel.	0	0..1024	INTEGER
AdcChannelLimitCheck	Enables or disables limit checking for an ADC channel.	FALSE	TRUE /FALSE	BOOLEAN
AdcChannelHighLimit	High limit - used for limit checking.	4095	0..4095	INTEGER
AdcChannelLowLimit	Low limit - used for limit checking.	0	0..4096	INTEGER
AdcChannelRangeSelect	In case of active limit checking: defines which conversion values are taken into account related to the boarders defined with AdcChannelLowLimit and AdcChannelHighLimit.	NA	NA	ENUMERATION
AdcGroupAccessMode	Type of access mode to group conversion results.	ADC_ACCESS_MODE_SINGLE	ADC_ACCESS_MODE_SINGLE ADC_ACCESS_MODE_STREAMING	ENUMERATION
AdcGroupConversionMode	Type of conversion mode supported by the driver.	ADC_CONV_MODE_CONTINUOUS	ADC_CONV_MODE_CONTINUOUS ADC_CONV_MODE_ONESHOT	ENUMERATION
AdcGroupId	Numeric ID of the group. This parameter is the symbolic name to be used on the API. This symbolic name allows accessing Channel Group data. This value will be assigned to the symbolic name derived of the AdcGroup container shortName.	0	0..1023	INTEGER
AdcGroupPriority	Priority level of the AdcGroup.	0	0..255	INTEGER
AdcGroupAccessMode	Type of access mode to group conversion results.	ADC_ACCESS_MODE_SINGLE	ADC_ACCESS_MODE_SINGLE ADC_ACCESS_MODE_STREAMING	ENUMERATION
AdcGroupReplacement	Replacement mechanism, which is used on ADC group level, if a group conversion is interrupted by a group which has a higher priority.	ADC_GROUP_REPL_SUSPEND_RESUME	ADC_GROUP_REPL_ABORT_RESTART ADC_GROUP_REPL_SUSPEND_RESUME	ENUMERATION
AdcGroupTriggSrc	Type of source event that starts a group conversion.	ADC_TRIGG_SRC_SW	ADC_TRIGG_SRC_HW ADC_TRIGG_SRC_SW	ENUMERATION
AdcHwTrigSignal	Configures on which edge of the hardware trigger signal the driver should react i.e. start the conversion (only if supported by the ADC hardware).	ADC_HW_TRIG_BOTH_EDGES	ADC_HW_TRIG_BOTH_EDGES ADC_HW_TRIG_FALLING_EDGE ADC_HW_TRIG_RISING_EDGE	ENUMERATION
AdcHwTrigTimer	Reload value of the ADC module embedded timer (only if supported by ADC hardware).	ADC_TRIGGER_RTI0	ADC_TRIGGER_RTI0 ADC_TRIGGER_RTI1 ADC_TRIGGER_RTI2 ADC_TRIGGER_RTI ADC_TRIGGER_INPUT_XBAR_OUT5 ADC_TRIGGER_EPWM0_SOCA ADC_TRIGGER_EPWM0_SOCB ADC_TRIGGER_EPWM1_SOCA ADC_TRIGGER_EPWM1_SOCB ADC_TRIGGER_EPWM2_SOCA ADC_TRIGGER_EPWM2_SOCB ADC_TRIGGER_EPWM3_SOCA ADC_TRIGGER_EPWM3_SOCB ADC_TRIGGER_EPWM4_SOCA ADC_TRIGGER_EPWM4_SOCB ADC_TRIGGER_EPWM5_SOCA ADC_TRIGGER_EPWM5_SOCB ADC_TRIGGER_EPWM6_SOCA ADC_TRIGGER_EPWM6_SOCB ADC_TRIGGER_EPWM7_SOCA ADC_TRIGGER_EPWM7_SOCB ADC_TRIGGER_EPWM8_SOCA ADC_TRIGGER_EPWM8_SOCB ADC_TRIGGER_EPWM9_SOCA ADC_TRIGGER_EPWM9_SOCB ADC_TRIGGER_EPWM10_SOCA ADC_TRIGGER_EPWM10_SOCB ADC_TRIGGER_EPWM11_SOCA ADC_TRIGGER_EPWM11_SOCB ADC_TRIGGER_EPWM12_SOCA ADC_TRIGGER_EPWM12_SOCB ADC_TRIGGER_EPWM13_SOCA ADC_TRIGGER_EPWM13_SOCB ADC_TRIGGER_EPWM14_SOCA ADC_TRIGGER_EPWM14_SOCB ADC_TRIGGER_EPWM15_SOCA ADC_TRIGGER_EPWM15_SOCB ADC_TRIGGER_EPWM16_SOCA ADC_TRIGGER_EPWM16_SOCB ADC_TRIGGER_EPWM17_SOCA ADC_TRIGGER_EPWM17_SOCB ADC_TRIGGER_EPWM18_SOCA ADC_TRIGGER_EPWM18_SOCB ADC_TRIGGER_EPWM19_SOCA ADC_TRIGGER_EPWM19_SOCB ADC_TRIGGER_EPWM20_SOCA ADC_TRIGGER_EPWM20_SOCB ADC_TRIGGER_EPWM21_SOCA ADC_TRIGGER_EPWM21_SOCB ADC_TRIGGER_EPWM22_SOCA ADC_TRIGGER_EPWM22_SOCB ADC_TRIGGER_EPWM23_SOCA ADC_TRIGGER_EPWM23_SOCB ADC_TRIGGER_EPWM24_SOCA ADC_TRIGGER_EPWM24_SOCB ADC_TRIGGER_EPWM25_SOCA ADC_TRIGGER_EPWM25_SOCB ADC_TRIGGER_EPWM26_SOCA ADC_TRIGGER_EPWM26_SOCB ADC_TRIGGER_EPWM27_SOCA ADC_TRIGGER_EPWM27_SOCB ADC_TRIGGER_EPWM28_SOCA ADC_TRIGGER_EPWM28_SOCB ADC_TRIGGER_EPWM29_SOCA ADC_TRIGGER_EPWM29_SOCB ADC_TRIGGER_EPWM30_SOCA ADC_TRIGGER_EPWM30_SOCB ADC_TRIGGER_EPWM31_SOCA ADC_TRIGGER_EPWM31_SOCB ADC_TRIGGER_ECAP ADC_TRIGGER_ECAP ADC_TRIGGER_ECAP ADC_TRIGGER_ECAP ADC_TRIGGER_ECAP ADC_TRIGGER_ECAP ADC_TRIGGER_ECAP ADC_TRIGGER_ECAP ADC_TRIGGER_ECAP8 ADC_TRIGGER_ECAP9	ENUMERATION
AdcNotification	Callback function for each group	AdcApp_Group0EndNotification	NA	FUNCTION-NAME
AdcStreamingBufferMode	Configure streaming buffer as "linear buffer" (i.e. the ADC Driver stops the conversion as soon as the stream buffer is full) or as "ring buffer" (wraps around if the end of the stream buffer is reached).	ADC_STREAM_BUFFER_LINEAR	ADC_STREAM_BUFFER_CIRCULAR ADC_STREAM_BUFFER_LINEAR	ENUMERATION
AdcStreamingNumSamples	Number of ADC values to be acquired per channel in streaming access mode.	1	1..255	INTEGER
AdcGroupDefinition	Assignment of AdcChannels to a AdcGroups.	NA	NA	REFERENCE
AdcDeInitApi	Adds / removes the service Adc_DeInit() from the code.	TRUE	TRUE /FALSE	BOOLEAN
AdcDevErrorDetect	Switches the Development Error Detection and Notification ON or OFF	TRUE	TRUE /FALSE	BOOLEAN
AdcEnableLimitCheck	Enables or disables limit checking feature in the ADC driver.	FALSE	TRUE /FALSE	BOOLEAN
AdcEnableQueuing	Determines, if the queuing mechanism is active in case of priority mechanism disabled.Note: If priority mechanism is enabled, queuing mechanism is always active and the parameter ADC_ENABLE_QUEUING is not evaluated. true: Enabled. false: Disabled.	TRUE	TRUE /FALSE	BOOLEAN
AdcEnableStartStopGroupApi	Adds / removes the services Adc_StartGroupConversion() and Adc_StopGroupConversion() from the code.	TRUE	TRUE /FALSE	BOOLEAN
AdcPriorityImplementation	Determines whether a priority mechanism is available for prioritization of the conversion requests and if available, the type of prioritization mechanism. The selection applies for groups with trigger source software and trigger source hardware.	ADC_PRIORITY_HW_SW	ADC_PRIORITY_HW ADC_PRIORITY_HW_SW ADC_PRIORITY_NONE	ENUMERATION
AdcGrpNotifCapability	Determines, if the group notification mechanism (the functions to enable and disable the notifications) is available at runtime.	TRUE	TRUE /FALSE	BOOLEAN
AdcHwTriggerApi	Adds / removes the services Adc_EnableHardwareTrigger() and Adc_DisableHardwareTrigger() from the code.	TRUE	TRUE /FALSE	BOOLEAN
AdcReadGroupApi	Adds / removes the service Adc_ReadGroup() and from the code.	TRUE	TRUE /FALSE	BOOLEAN
AdcResultAlignment	Alignment of ADC raw results in ADC result buffer (left/right alignment).	ADC_ALIGN_RIGHT	ADC_ALIGN_RIGHT	ENUMERATION
AdcVersionInfoApi	Adds / removes the service Adc_GetVersionInfo() from the code.	TRUE	TRUE /FALSE	BOOLEAN
AdcChannelValueSigned	Information whether the result value of the ADC driver has sign information (true) or not (false). If the result shall be interpreted as signed value it shall apply to C-language rules.	FALSE	TRUE /FALSE	BOOLEAN_LABEL
AdcGroupFirstChannelFixed	Information whether the first channel of an ADC Channel group can be configured (false) or is fixed (true) to a value determined by the ADC HW Unit.	FALSE	TRUE /FALSE	BOOLEAN_LABEL
AdcMaxChannelResolution	Maximum Channel resolution in bits (does not specify accuracy).	0	1..63	INTEGER_LABEL

Texas Instruments Parameters	Description	Default Value	Range	Unit
AdcExtHwTrigTimer	Configure the streaming buffer as a linear buffer (i.e. the ADC Driver stops the conversion as soon as the stream buffer is full) or as a ring buffer (wraps around if the end of the stream buffer is reached).	ADC_TRIGGER_RTI0	ADC_TRIGGER_RTI0 ADC_TRIGGER_RTI1 ADC_TRIGGER_RTI2 ADC_TRIGGER_RTI3 ADC_TRIGGER_INPUT_XBAR_OUT5 ADC_TRIGGER_EPWM0_SOCA ADC_TRIGGER_EPWM0_SOCB ADC_TRIGGER_EPWM1_SOCA ADC_TRIGGER_EPWM1_SOCB ADC_TRIGGER_EPWM2_SOCA ADC_TRIGGER_EPWM2_SOCB ADC_TRIGGER_EPWM3_SOCA ADC_TRIGGER_EPWM3_SOCB ADC_TRIGGER_EPWM4_SOCA ADC_TRIGGER_EPWM4_SOCB ADC_TRIGGER_EPWM5_SOCA ADC_TRIGGER_EPWM5_SOCB ADC_TRIGGER_EPWM6_SOCA ADC_TRIGGER_EPWM6_SOCB ADC_TRIGGER_EPWM7_SOCA ADC_TRIGGER_EPWM7_SOCB ADC_TRIGGER_EPWM8_SOCA ADC_TRIGGER_EPWM8_SOCB ADC_TRIGGER_EPWM9_SOCA ADC_TRIGGER_EPWM9_SOCB ADC_TRIGGER_EPWM10_SOCA ADC_TRIGGER_EPWM10_SOCB ADC_TRIGGER_EPWM11_SOCA ADC_TRIGGER_EPWM11_SOCB ADC_TRIGGER_EPWM12_SOCA ADC_TRIGGER_EPWM12_SOCB ADC_TRIGGER_EPWM13_SOCA ADC_TRIGGER_EPWM13_SOCB ADC_TRIGGER_EPWM14_SOCA ADC_TRIGGER_EPWM14_SOCB ADC_TRIGGER_EPWM15_SOCA ADC_TRIGGER_EPWM15_SOCB ADC_TRIGGER_EPWM16_SOCA ADC_TRIGGER_EPWM16_SOCB ADC_TRIGGER_EPWM17_SOCA ADC_TRIGGER_EPWM17_SOCB ADC_TRIGGER_EPWM18_SOCA ADC_TRIGGER_EPWM18_SOCB ADC_TRIGGER_EPWM19_SOCA ADC_TRIGGER_EPWM19_SOCB ADC_TRIGGER_EPWM20_SOCA ADC_TRIGGER_EPWM20_SOCB ADC_TRIGGER_EPWM21_SOCA ADC_TRIGGER_EPWM21_SOCB ADC_TRIGGER_EPWM22_SOCA ADC_TRIGGER_EPWM22_SOCB ADC_TRIGGER_EPWM23_SOCA ADC_TRIGGER_EPWM23_SOCB ADC_TRIGGER_EPWM24_SOCA ADC_TRIGGER_EPWM24_SOCB ADC_TRIGGER_EPWM25_SOCA ADC_TRIGGER_EPWM25_SOCB ADC_TRIGGER_EPWM26_SOCA ADC_TRIGGER_EPWM26_SOCB ADC_TRIGGER_EPWM27_SOCA ADC_TRIGGER_EPWM27_SOCB ADC_TRIGGER_EPWM28_SOCA ADC_TRIGGER_EPWM28_SOCB ADC_TRIGGER_EPWM29_SOCA ADC_TRIGGER_EPWM29_SOCB ADC_TRIGGER_EPWM30_SOCA ADC_TRIGGER_EPWM30_SOCB ADC_TRIGGER_EPWM31_SOCA ADC_TRIGGER_EPWM31_SOCB ADC_TRIGGER_ECAP0 ADC_TRIGGER_ECAP1 ADC_TRIGGER_ECAP2 ADC_TRIGGER_ECAP3 ADC_TRIGGER_ECAP4 ADC_TRIGGER_ECAP5 ADC_TRIGGER_ECAP6 ADC_TRIGGER_ECAP7 ADC_TRIGGER_ECAP8 ADC_TRIGGER_ECAP9	ENUMERATION
AdcDmaReference	Reference to the DMA Group Channel	NA	NA	REFERENCE
AdcMaxDmaChannelId	Number of actual DMA channels. This is of type published information and not editable	63	NA	INTEGER
AdcDmaInstance	Number of actual DMA channels. This is of type published information and not editable	0	NA	INTEGER
AdcFifoErrLog	Enables/Disables ADC Fifo error logging.Useful in debugging.	TRUE	TRUE/FALSE	BOOLEAN
AdcErrLogMaxLen	Max length of error log buffer that can be used	100	0..1024	INTEGER
AdcHwUnitMonitorMode	This is the Interrupt Mode or Polling Mode for monitoring ADC conversion done status.	ADC_INTERRUPT_MODE	ADC_INTERRUPT_MODE ADC_POLLING_MODE	ENUMERATION
AdcBufferedModeSelect	To select buffered on or off	TRUE	TRUE FALSE	BOOLEAN
AdcDMAEnable	Enables DMA Access method for ADC Channel Group.	FALSE	TRUE FALSE	BOOLEAN
AdcDeviceVariant	Select SOC variant .This parameter shall be used by driver to impose device specific constraints. The user guide shall detail the device specific constraints	AM263	NA	ENUMERATION
AdcMaxGroupCount	Maximum group across all hwunit	4	1..1024	INTEGER
AdcMaxHwUnitCount	Max HW unit - This should match the sum for the units ISR	1	5	INTEGER
AdcHwUnitActive	Enables Disable HW UNIT	TRUE	TRUE FALSE	BOOLEAN
AdcTypeofInterruptFunction	Type of ISR function	ADC_ISR_CAT1	ADC_ISR_VOID ADC_ISR_CAT1 ADC_ISR_CAT2	ENUMERATION
AdcOsCounterRef	This parameter contains a reference to the OsCounter which is used by the ADC driver.	ASPathDataOfSchema: /AUTOSAR/EcucDefs/Os/OsCounter	ASPathDataOfSchema: /AUTOSAR/EcucDefs/Os/OsCounter	REFERENCE
AdcDefaultOSCounterId	Default Os Counter Id if node reference to OsCounter ref AdcOsCounterRef is not set	0	0..16	INTEGER
AdcEnableRegisterReadbackApi	Enable API to readback ADC critical registers	FALSE	TRUE / FALSE	BOOLEAN
AdcMinRange	Minimum value of range.	0	NA	INTEGER
AdcMaxNumChannels	Number of MCAL channels - in terms of ADC HW, this represents the number of hardware steps.This is a fixed value as per the ADC module and can’t be changed	12	NA	INTEGER
AdcMinHwChannelId	Number of actual HW channels - in terms of ADC HW the actual channel input to the ADC module	0	NA	INTEGER
AdcPollingMainFunctionApi	Enable API to do the polling operation	TRUE	TRUE FALSE	BOOLEAN

4.1.9.3. Symbolic Names deviations

None.

4.1.9.4. Configuration rules and constraints to enable plausibility checks

None.

4.1.10. Memory Mapping

Memory Mapping Sections	ADC_CODE	ADC_CODE_ISR	ADC_VAR_NO_INIT	ADC_VAR	ADC_CONST	ADC_PBCFG
ADC_START_SEC_VAR_INIT_UNSPECIFIED(.bss)				x
ADC_STOP_SEC_VAR_INIT_UNSPECIFIED				x
ADC_START_SEC_CONFIG_DATA (.const)						x
ADC_STOP_SEC_CONFIG_DATA						x
ADC_START_SEC_CODE(.text)	x
ADC_STOP_SEC_CODE	x
ADC_START_SEC_VAR_INIT_32(.bss)				x
ADC_STOP_SEC_VAR_INIT_32				x
ADC_START_SEC_VAR_NO_INIT_UNSPECIFIED(.data)			x
ADC_STOP_SEC_VAR_NO_INIT_UNSPECIFIED			x
ADC_START_SEC_ISR_CODE		x
ADC_STOP_SEC_ISR_CODE		x

4.1.11. Memory footprint

Please refer Memory Footprint for more details.

4.1.12. Performance

CovMode	TriggSrc	Num_Of_Channels	Theoritical(SPS)	Practical(SPS)
One_Shot	SRC_HW	1	493827	440044
One_Shot	SRC_SW	1	493827	440044
One_Shot	SRC_HW	6	2962962	1080594
One_Shot	SRC_SW	6	2962962	1083032
Continuous	SRC_SW	6	2962962	2461538

4.1.13. Example Usage

4.1.13.1. Steps to build and run example

ADC example application demonstrating the MCAL ADC driver features is in folder <MCAL_ROOT>/examples/Adc.

This application can be built from the root folder by giving gmake –s adc_app PLATFORM=am263.

Once the build is completed we get a binary file, which is loaded in our controller and executed.

4.1.13.2. External set up Information

ADC module is tested using CC board (PROC111E2) and analog input is provided to ADC input channels through DC power supply (0-12V).

The ADC analog input for the AM263x ranges from 0 – 3.3V.

ADC_ANI0 is provided with 1V.

ADC_ANI1 is provided with 3.2V.

4.1.13.3. Configuration used to test this example

The ADC module example is configured with following groups on ADC Hardware Unit 1

1. Adc Group 0 : One Shot Conversion Software Triggered with Data Access Polling Mode.

2. Adc Group 1 : One Shot Conversion Software Triggered with Data Access Interrupt Mode.

3. Adc Group 2 : One Shot Conversion Software Triggered with Data Access Polling Mode.

4. Adc Group 3 : One Shot Conversion Software Triggered with Data Access Interrupt Mode.

The ADC module example application testing procedure as follows:

HW UNIT 1 is configured

One Shot Mode Testing: (Group 0) (Group 1) (Group 2) (Group 3) (HW UNIT 1)

1. Group is Triggered for Conversion using API Adc_StartConversion()

2. Adc_PollingMainFunction() is called for Groups configured as Data Access Polling Mode.

3. AdcApp_procIsr() is called through AdcApp_GroupEndNotification for Groups configured as Data Access Interrupt Mode.

4. Wait until the conversion is completed.

5. Conversion is stopped using API Adc_StopConversion().

6. Check the notification message, the notification counter should be incremented with ADC results available in the ADC result buffer ( Adc_AppBuffer )

Cross bar mapping:

1. ADC HW UNIT 1 : ADC1.INT1 is mapped to XBAR1 (147)

2. ADC HW UNIT 3 : ADC3.INT1 is mapped to XBAR2 (148)

Refer crossbar section in MCU module to map crossbar.

4.1.13.4. Example Logs

ADC_APP: Sample Application - STARTS !!!
ADC_APP: GROUPs 4: HWUNIT 1: LOOP COUNT 1:!!!

--------------------------------------
Apply different voltages (between 0 - 3.3 volts) to the Six ADC channels
--------------------------------------

Press any key to start conversion


 ADC MCAL Version Info
 ---------------------
 Vendor ID           : 44
 Module ID           : 123
 SW Major Version    : 9
 SW Minor Version    : 1
 SW Patch Version    : 0


 Read Buffer Content
 -------------------
 ADC Group 0 Log:
 ----------------
 Channel                ADC Value       Volt
 ----------------------------------------------------
 0              0x00000cc1      1434mV
 ADC Group 1 Log:
 ----------------
 Channel                ADC Value       Volt
 ----------------------------------------------------
 0              0x00000cc1      1434mV
 ADC Group 2 Log:
 ----------------
 Channel                ADC Value       Volt
 ----------------------------------------------------
 0              0x00000cc1      1434mV
 1              0x00000000      0000mV
 2              0x00000000      0000mV
 3              0x00000000      0000mV
 ADC Group 3 Log:
 ----------------
 Channel                ADC Value       Volt
 ----------------------------------------------------
 0              0x00000cc1      1434mV
 1              0x00000000      0000mV
 ADC Test Passed!!!
 ADC_APP: Sample Application - DONE !!!

4.1.14. FAQ’s

None

4.1.15. Test Report

Please refer AM26x ADC Driver Test Case Report provided as part of CSP.

4.1.16. References

AUTOSAR_SWS_ADC

Technical Reference Manual

4.1.17. TI Disclaimer

Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, patent infringement, and limitation of liability.

TI warrants performance of its products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements.

Customers are responsible for their applications using TI components. In order to minimize risks associated with the customer’s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards.

TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such products or services might be or are used. TI’s publication of information regarding any third party’s products or services does not constitute TI’s approval, license, warranty or endorsement thereof.

Reproduction of information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations and notices. Representation or reproduction o f this information with alteration voids all warranties provided for an associated TI product or service, is an unfair and deceptive business practice, and TI is not responsible nor liable for any such use.

Resale of TI’s products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service, is an unfair and deceptive business practice, and TI is not responsible nor liable for any such use.

Also see: Standard Terms and Conditions of Sale for Semiconductor Products https://www.ti.com/sc/docs/stdterms.htm

Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265