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AM64x MCU+ SDK
08.02.00
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Go to the documentation of this file.
54 #ifndef TISCI_PROCBOOT_H_
55 #define TISCI_PROCBOOT_H_
161 #define TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_ARMV8_DBG_EN (0x00000001U)
163 #define TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_ARMV8_DBG_NIDEN (0x00000002U)
165 #define TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_ARMV8_DBG_SPIDEN (0x00000004U)
167 #define TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_ARMV8_DBG_SPNIDEN (0x00000008U)
169 #define TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_ARMV8_AARCH32 (0x00000100U)
174 #define TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_R5_DBG_EN (0x00000001U)
176 #define TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_R5_DBG_NIDEN (0x00000002U)
178 #define TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_R5_LOCKSTEP (0x00000100U)
180 #define TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_R5_TEINIT (0x00000200U)
182 #define TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_R5_NMFI_EN (0x00000400U)
184 #define TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_R5_TCM_RSTBASE (0x00000800U)
186 #define TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_R5_BTCM_EN (0x00001000U)
188 #define TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_R5_ATCM_EN (0x00002000U)
190 #define TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_R5_MEM_INIT_DIS (0x00004000U)
193 #define TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_R5_SINGLE_CORE (0x00008000U)
199 #define TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_C7X_L2PL_MASK (0x0000000FU)
201 #define TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_C7X_L2PL_SHIFT (0x00000000U)
203 #define TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_C7X_L2PL_1 (0x00000001U)
205 #define TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_C7X_L2PL_2 (0x00000002U)
207 #define TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_C7X_L2PL_3 (0x00000003U)
209 #define TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_C7X_L2PL_4 (0x00000004U)
211 #define TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_C7X_L2PL_5 (0x00000005U)
215 #define TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_C7X_L2AL_MASK (0x000000F0U)
217 #define TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_C7X_L2AL_SHIFT (0x00000004U)
219 #define TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_C7X_L2AL_2 (0x00000020U)
221 #define TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_C7X_L2AL_3 (0x00000030U)
223 #define TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_C7X_L2AL_4 (0x00000040U)
225 #define TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_C7X_L2AL_5 (0x00000050U)
235 #define TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_C6X_SSCLKMV_MASK (0x00000007U)
237 #define TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_C6X_SSCLKMV_SHIFT (0x00000000U)
239 #define TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_C6X_SSCLKMV_DIV2 (0x00000001U)
241 #define TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_C6X_SSCLKMV_DIV3 (0x00000002U)
243 #define TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_C6X_SSCLKMV_DIV4 (0x00000003U)
248 #define TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_M4F_DBG_EN (0x00000001U)
250 #define TISCI_MSG_VAL_PROC_BOOT_CFG_FLAG_M4F_DBG_NIDEN (0x00000002U)
291 #define TISCI_MSG_VAL_PROC_BOOT_CTRL_FLAG_ARMV8_ACINACTM (0x00000001U)
293 #define TISCI_MSG_VAL_PROC_BOOT_CTRL_FLAG_ARMV8_AINACTS (0x00000002U)
295 #define TISCI_MSG_VAL_PROC_BOOT_CTRL_FLAG_ARMV8_L2FLUSHREQ (0x00000100U)
300 #define TISCI_MSG_VAL_PROC_BOOT_CTRL_FLAG_R5_CORE_HALT (0x00000001U)
302 #define TISCI_MSG_VAL_PROC_BOOT_CTRL_FLAG_R5_LPSC (0x00000002U)
304 #define TISCI_MSG_VAL_PROC_BOOT_CTRL_FLAG_R5_RESET (0x00000004U)
389 #define TISCI_MSG_VAL_PROC_BOOT_STATUS_FLAG_ARMV8_WFE (0x00000001U)
391 #define TISCI_MSG_VAL_PROC_BOOT_STATUS_FLAG_ARMV8_WFI (0x00000002U)
393 #define TISCI_MSG_VAL_PROC_BOOT_STATUS_FLAG_ARMV8_L2F_DONE (0x00000010U)
395 #define TISCI_MSG_VAL_PROC_BOOT_STATUS_FLAG_ARMV8_STANDBYWFIL2 (0x00000020U)
400 #define TISCI_MSG_VAL_PROC_BOOT_STATUS_FLAG_R5_WFE (0x00000001U)
402 #define TISCI_MSG_VAL_PROC_BOOT_STATUS_FLAG_R5_WFI (0x00000002U)
404 #define TISCI_MSG_VAL_PROC_BOOT_STATUS_FLAG_R5_CLK_GATED (0x00000004U)
406 #define TISCI_MSG_VAL_PROC_BOOT_STATUS_FLAG_R5_LOCKSTEP_PERMITTED (0x00000100U)
408 #define TISCI_MSG_VAL_PROC_BOOT_STATUS_FLAG_R5_SINGLECORE_ONLY (0x00000200U)
413 #define TISCI_MSG_VAL_PROC_BOOT_STATUS_FLAG_C7X_WFE (0x00000001U)
415 #define TISCI_MSG_VAL_PROC_BOOT_STATUS_FLAG_C7X_WFI (0x00000002U)
420 #define TISCI_MSG_VAL_PROC_BOOT_STATUS_FLAG_M4F_WFI (0x00000002U)
struct tisci_header hdr
Definition: tisci_procboot.h:89
uint32_t bootvector_hi
Definition: tisci_procboot.h:266
Processor Status Wait.
Definition: tisci_procboot.h:479
Release physical processor control response.
Definition: tisci_procboot.h:119
Processor Status Wait Response.
Definition: tisci_procboot.h:503
uint8_t delay_before_iteration_loop_start_us
Definition: tisci_procboot.h:485
struct tisci_header hdr
Definition: tisci_procboot.h:442
struct tisci_header hdr
Definition: tisci_procboot.h:120
uint8_t processor_id
Definition: tisci_procboot.h:136
Response to authenticate and start image request.
Definition: tisci_procboot.h:368
uint8_t processor_id
Definition: tisci_procboot.h:481
uint32_t status_flags_1_set_any_wait
Definition: tisci_procboot.h:487
uint32_t control_flags_1_set
Definition: tisci_procboot.h:318
Release physical processor control request.
Definition: tisci_procboot.h:101
struct tisci_msg_proc_request_req __attribute__((__packed__))
struct tisci_header hdr
Definition: tisci_procboot.h:480
uint32_t bootvector_hi
Definition: tisci_procboot.h:445
uint32_t config_flags_1
Definition: tisci_procboot.h:446
struct tisci_header hdr
Definition: tisci_procboot.h:346
uint8_t processor_id
Definition: tisci_procboot.h:317
uint8_t processor_id
Definition: tisci_procboot.h:103
uint32_t bootvector_lo
Definition: tisci_procboot.h:265
Processor Status request.
Definition: tisci_procboot.h:381
uint32_t control_flags_1
Definition: tisci_procboot.h:447
uint32_t image_address_hi
Definition: tisci_procboot.h:371
Response to optional processor specific message for sequence control.
Definition: tisci_procboot.h:335
uint32_t certificate_address_hi
Definition: tisci_procboot.h:348
uint32_t config_flags_1_clear
Definition: tisci_procboot.h:268
struct tisci_header hdr
Definition: tisci_procboot.h:70
uint32_t status_flags_1
Definition: tisci_procboot.h:448
uint8_t host_id
Definition: tisci_procboot.h:137
uint8_t processor_id
Definition: tisci_procboot.h:443
uint8_t processor_id
Definition: tisci_procboot.h:383
struct tisci_header hdr
Definition: tisci_procboot.h:135
Processor Status Response.
Definition: tisci_procboot.h:441
uint32_t bootvector_lo
Definition: tisci_procboot.h:444
Request for physical processor control response.
Definition: tisci_procboot.h:88
This file contains:
Definition: tisci_procboot.h:69
Processor Boot Configuration.
Definition: tisci_procboot.h:262
uint32_t status_flags_1_set_all_wait
Definition: tisci_procboot.h:486
Request to handover control of a processor to another host if permitted.
Definition: tisci_procboot.h:134
uint32_t config_flags_1_set
Definition: tisci_procboot.h:267
uint8_t processor_id
Definition: tisci_procboot.h:71
uint32_t certificate_address_lo
Definition: tisci_procboot.h:347
Optional processor specific message for sequence control.
Definition: tisci_procboot.h:315
struct tisci_header hdr
Definition: tisci_procboot.h:369
Response to handover of control of a processor to another host if permitted.
Definition: tisci_procboot.h:154
uint32_t status_flags_1_clr_all_wait
Definition: tisci_procboot.h:488
Authenticate and start image.
Definition: tisci_procboot.h:345
uint32_t image_size
Definition: tisci_procboot.h:372
uint32_t control_flags_1_clear
Definition: tisci_procboot.h:319
Response to Processor Boot Configuration message.
Definition: tisci_procboot.h:284
struct tisci_header hdr
Definition: tisci_procboot.h:285
struct tisci_header hdr
Definition: tisci_procboot.h:155
struct tisci_header hdr
Definition: tisci_procboot.h:382
struct tisci_header hdr
Definition: tisci_procboot.h:316
uint32_t status_flags_1_clr_any_wait
Definition: tisci_procboot.h:489
struct tisci_header hdr
Definition: tisci_procboot.h:102
uint8_t processor_id
Definition: tisci_procboot.h:264
uint32_t image_address_lo
Definition: tisci_procboot.h:370
uint8_t delay_per_iteration_us
Definition: tisci_procboot.h:484
uint8_t num_wait_iterations
Definition: tisci_procboot.h:482
struct tisci_header hdr
Definition: tisci_procboot.h:504
struct tisci_header hdr
Definition: tisci_procboot.h:336
struct tisci_header hdr
Definition: tisci_procboot.h:263
uint8_t num_match_iterations
Definition: tisci_procboot.h:483