AM64x MCU+ SDK  08.02.00

Detailed Description

Optional processor specific message for sequence control.

Parameters
hdrMessage header
processor_idID of processor
control_flags_1_setOptional Processor specific Control Flags to set. Setting a bit here implies required bit has to be set to 1.
control_flags_1_clearOptional Processor specific Control Flags to clear. Setting a bit here implies required bit has to be cleared to 0.

Data Fields

struct tisci_header hdr
 
uint8_t processor_id
 
uint32_t control_flags_1_set
 
uint32_t control_flags_1_clear
 

Field Documentation

◆ hdr

struct tisci_header tisci_msg_proc_set_control_req::hdr

◆ processor_id

uint8_t tisci_msg_proc_set_control_req::processor_id

◆ control_flags_1_set

uint32_t tisci_msg_proc_set_control_req::control_flags_1_set

◆ control_flags_1_clear

uint32_t tisci_msg_proc_set_control_req::control_flags_1_clear