icss_emac.h

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/*
 *  Copyright (C) 2021 Texas Instruments Incorporated
 *
 *  Redistribution and use in source and binary forms, with or without
 *  modification, are permitted provided that the following conditions
 *  are met:
 *
 *    Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *
 *    Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the
 *    distribution.
 *
 *    Neither the name of Texas Instruments Incorporated nor the names of
 *    its contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
#ifndef ICSS_EMAC_H_
#define ICSS_EMAC_H_
 
/* ========================================================================== */
/*                             Include Files                                  */
/* ========================================================================== */
 
#include <stdint.h>
#include <kernel/dpl/SystemP.h>
#include <drivers/pruicss.h>
#include <board/ethphy.h>
#include <drivers/hw_include/csl_types.h>
 
#ifdef __cplusplus
extern "C" {
#endif
 
/* ========================================================================== */
/*                           Macros & Typedefs                                */
/* ========================================================================== */
 
#define ICSS_EMAC_MAX_PORTS_PER_INSTANCE    (2)
 
#define ICSS_EMAC_MODE_MAC1                 (1U)
 
#define ICSS_EMAC_MODE_MAC2                 (2U)
 
#define ICSS_EMAC_MODE_SWITCH               (3U)
 
#define ICSS_EMAC_MODE_DUALMAC              (4U)
 
#define ICSS_EMAC_MII_MODE                  (0U)
 
#define ICSS_EMAC_RGMII_MODE                (1U)
 
#define ICSS_EMAC_LEARNING_DISABLE   (0U)
 
#define ICSS_EMAC_LEARNING_ENABLE    (1U)
 
#define ICSS_EMAC_ENABLE_PACING             (0)
 
#define ICSS_EMAC_DISABLE_PACING            (1)
 
#define ICSS_EMAC_INTR_PACING_MODE1         (0)
 
#define ICSS_EMAC_QUEUE1 ((uint32_t)0U)
 
#define ICSS_EMAC_QUEUE2 ((uint32_t)1U)
 
#define ICSS_EMAC_QUEUE3 ((uint32_t)2U)
 
#define ICSS_EMAC_QUEUE4 ((uint32_t)3U)
 
#define ICSS_EMAC_QUEUE5 ((uint32_t)4U)
 
#define ICSS_EMAC_QUEUE6 ((uint32_t)5U)
 
#define ICSS_EMAC_QUEUE7 ((uint32_t)6U)
 
#define ICSS_EMAC_QUEUE8 ((uint32_t)7U)
 
#define ICSS_EMAC_QUEUE9 ((uint32_t)8U)
 
#define ICSS_EMAC_QUEUE10 ((uint32_t)9U)
 
#define ICSS_EMAC_QUEUE11 ((uint32_t)10U)
 
#define ICSS_EMAC_QUEUE12 ((uint32_t)11U)
 
#define ICSS_EMAC_QUEUE13 ((uint32_t)12U)
 
#define ICSS_EMAC_QUEUE14 ((uint32_t)13U)
 
#define ICSS_EMAC_QUEUE15 ((uint32_t)14U)
 
#define ICSS_EMAC_QUEUE16 ((uint32_t)15U)
 
#define ICSS_EMAC_COLQUEUE ((uint32_t)16U)
 
#define ICSS_EMAC_NUMQUEUES ((uint32_t)17U)
 
#define ICSS_EMAC_MAXMTU  (1518U)
 
#define ICSS_EMAC_MINMTU  (14U)
 
#define ICSS_EMAC_PORT_0 (0)
 
#define ICSS_EMAC_PORT_1 (1U)
 
#define ICSS_EMAC_PORT_2 (2U)
 
#define ICSS_EMAC_IOCTL_PORT_CTRL_DISABLE                   (0u)
 
#define ICSS_EMAC_IOCTL_PORT_CTRL_ENABLE                    (1u)
 
#define ICSS_EMAC_STORM_PREV_CTRL_ENABLE                    (0u)
 
#define ICSS_EMAC_STORM_PREV_CTRL_DISABLE                   (1u)
 
#define ICSS_EMAC_STORM_PREV_CTRL_SET_CREDITS               (2u)
 
#define ICSS_EMAC_STORM_PREV_CTRL_INIT                      (3u)
 
#define ICSS_EMAC_STORM_PREV_CTRL_RESET                     (4u)
 
#define ICSS_EMAC_STORM_PREV_CTRL_ENABLE_BC                 (5u)
 
#define ICSS_EMAC_STORM_PREV_CTRL_DISABLE_BC                (6u)
 
#define ICSS_EMAC_STORM_PREV_CTRL_SET_CREDITS_BC            (7u)
 
#define ICSS_EMAC_STORM_PREV_CTRL_INIT_BC                   (8u)
 
#define ICSS_EMAC_STORM_PREV_CTRL_RESET_BC                  (9u)
 
#define ICSS_EMAC_STORM_PREV_CTRL_ENABLE_MC                 (10u)
 
#define ICSS_EMAC_STORM_PREV_CTRL_DISABLE_MC                (11u)
 
#define ICSS_EMAC_STORM_PREV_CTRL_SET_CREDITS_MC            (12u)
 
#define ICSS_EMAC_STORM_PREV_CTRL_INIT_MC                   (13u)
 
#define ICSS_EMAC_STORM_PREV_CTRL_RESET_MC                  (14u)
 
#define ICSS_EMAC_STORM_PREV_CTRL_ENABLE_UC                 (15u)
 
#define ICSS_EMAC_STORM_PREV_CTRL_DISABLE_UC                (16u)
 
#define ICSS_EMAC_STORM_PREV_CTRL_SET_CREDITS_UC            (17u)
 
#define ICSS_EMAC_STORM_PREV_CTRL_INIT_UC                   (18u)
 
#define ICSS_EMAC_STORM_PREV_CTRL_RESET_UC                  (19u)
 
#define ICSS_EMAC_LEARN_CTRL_UPDATE_TABLE                   (0u)
 
#define ICSS_EMAC_LEARN_CTRL_CLR_TABLE                      (1u)
 
#define ICSS_EMAC_LEARN_CTRL_AGEING                         (2u)
 
#define ICSS_EMAC_LEARN_CTRL_FIND_MAC                       (3u)
 
#define ICSS_EMAC_LEARN_CTRL_REMOVE_MAC                     (4u)
 
#define ICSS_EMAC_LEARN_CTRL_INC_COUNTER                    (5u)
 
#define ICSS_EMAC_LEARN_CTRL_INIT_TABLE                     (6u)
 
#define ICSS_EMAC_LEARN_CTRL_SET_PORTSTATE                  (7u)
 
#define ICSS_EMAC_IOCTL_STAT_CTRL_GET                   (0u)
 
#define ICSS_EMAC_IOCTL_STAT_CTRL_CLEAR                 (1u)
 
#define ICSS_EMAC_IOCTL_PORT_CTRL                           (0u)
 
#define ICSS_EMAC_IOCTL_LEARNING_CTRL                       (1u)
 
#define ICSS_EMAC_IOCTL_STORM_PREV_CTRL                     (2u)
 
#define ICSS_EMAC_IOCTL_STATS_CTRL                          (3u)
 
#define ICSS_EMAC_IOCTL_PROMISCUOUS_CTRL                    (4u)
 
#define ICSS_EMAC_IOCTL_MULTICAST_FILTER_CTRL               (5u)
 
#define ICSS_EMAC_IOCTL_VLAN_FILTER_CTRL                    (6u)
 
#define ICSS_EMAC_IOCTL_PORT_FLUSH_CTRL                     (7u)
 
#define ICSS_EMAC_IOCTL_MULTICAST_FILTER_CTRL_ENABLE        (0u)
 
#define ICSS_EMAC_IOCTL_MULTICAST_FILTER_CTRL_DISABLE       (1u)
 
#define ICSS_EMAC_IOCTL_MULTICAST_FILTER_CTRL_OVERRIDE_HASHMASK    (2u)
 
#define ICSS_EMAC_IOCTL_MULTICAST_FILTER_CTRL_ADD_MACID   (3u)
 
#define ICSS_EMAC_IOCTL_MULTICAST_FILTER_CTRL_REMOVE_MACID   (4u)
 
#define ICSS_EMAC_IOCTL_MULTICAST_FILTER_CTRL_GET_DROPPED   (5u)
 
#define ICSS_EMAC_IOCTL_VLAN_FILTER_CTRL_ENABLE_CMD                (0u)
 
#define ICSS_EMAC_IOCTL_VLAN_FILTER_CTRL_DISABLE_CMD               (1u)
 
#define ICSS_EMAC_IOCTL_VLAN_FILTER_CTRL_UNTAG_HOST_RCV_ALL_CMD    (2u)
 
#define ICSS_EMAC_IOCTL_VLAN_FILTER_CTRL_UNTAG_HOST_RCV_NAL_CMD    (3u)
 
#define ICSS_EMAC_IOCTL_VLAN_FILTER_CTRL_PRIOTAG_HOST_RCV_ALL_CMD    (4u)
 
#define ICSS_EMAC_IOCTL_VLAN_FILTER_CTRL_PRIOTAG_HOST_RCV_NAL_CMD    (5u)
 
#define ICSS_EMAC_IOCTL_VLAN_FILTER_CTRL_ADD_VID_CMD                 (6u)
 
#define ICSS_EMAC_IOCTL_VLAN_FILTER_CTRL_REMOVE_VID_CMD              (7u)
 
#define ICSS_EMAC_LEARNING_PORT_STATE_LEARNING          (0U)
#define ICSS_EMAC_LEARNING_PORT_STATE_NOT_LEARNING      (1U)
#define ICSS_EMAC_LEARNING_PORT_STATE_LOCKED            (2U)
 
#define ICSS_EMAC_OBJECT_SIZE_IN_BYTES                  (42000)
 
typedef struct ICSS_EMAC_Config_s *ICSS_EMAC_Handle;
 
typedef int32_t (*ICSS_EMAC_CallBack)(void *arg0, void *arg1, void *arg2);
 
/* ========================================================================== */
/*                         Structure Declarations                             */
/* ========================================================================== */
 
typedef struct ICSS_EMAC_FwStaticMmap_s
{
    uint32_t versionOffset;             
    uint32_t version2Offset;            
    uint32_t featureOffset;             
    uint32_t futureFeatureOffset;       
    uint32_t statisticsOffset;          
    uint32_t statisticsSize;            
    uint32_t stormPreventionOffsetBC;   
    uint32_t phySpeedOffset;            
    uint32_t portStatusOffset;          
    uint32_t portControlAddr;           
    uint32_t portMacAddr;               
    uint32_t rxInterruptStatusOffset;   
    uint32_t stormPreventionOffsetMC;   
    uint32_t stormPreventionOffsetUC;   
    uint32_t p0QueueDescOffset;         
    uint32_t p0ColQueueDescOffset;      
    uint32_t emacTtsConfigBaseOffset;   
    uint32_t interfaceMacAddrOffset;    
    uint32_t colStatusAddr;             
    uint32_t promiscuousModeOffset;     
} ICSS_EMAC_FwStaticMmap;
 
typedef struct ICSS_EMAC_FwDynamicMmap_s
{
    uint32_t queueSizeOffset;                           
    uint32_t queueOffset;                               
    uint32_t queueDescriptorOffset;                     
    uint32_t txQueueSize[ICSS_EMAC_NUMQUEUES-1U];       
    uint32_t rxHostQueueSize[ICSS_EMAC_NUMQUEUES - 1U]; 
    uint32_t collisionQueueSize;                        
    uint32_t p0Q1BufferDescOffset;                      
    uint32_t p0ColBufferDescOffset;                     
    uint32_t p0Q1BufferOffset;                          
    uint32_t transmitQueuesBufferOffset;                
    uint32_t p0ColBufferOffset;                         
    uint32_t hostQ1RxContextOffset;                     
    uint32_t p1Q1SwitchTxContextOffset;                 
    uint32_t portQueueDescOffset;                       
    uint32_t q1EmacTxContextOffset;                     
    uint32_t numQueues;                                 
} ICSS_EMAC_FwDynamicMmap;
 
typedef struct ICSS_EMAC_FwVlanFilterParams_s
{
    uint32_t ctrlBitmapOffset;
    uint32_t ctrlEnableBit;
    uint32_t ctrlUntagHostRcvAllowBit;
    uint32_t ctrlPriotagHostRcvAllowBit;
    uint32_t filterTableBaseAddress;
    uint32_t vidMaxValue;
} ICSS_EMAC_FwVlanFilterParams;
 
typedef struct ICSS_EMAC_FwMulticastFilterParams_s
{
    uint32_t ctrlOffset;
    uint32_t maskSizeBytes;
    uint32_t maskInitVal;
    uint32_t maskOffset;
    uint32_t overrideStatusOffset;
    uint32_t tableOffset;
    uint32_t ctrlEnabledValue;
    uint32_t ctrlDisabledValue;
    uint32_t maskOverrideSetValue;
    uint32_t maskOverrideNotSetValue;
    uint32_t hostRcvAllowedValue;
    uint32_t hostRcvNotAllowedValue;
} ICSS_EMAC_FwMulticastFilterParams;
 
/*
*  \brief     ICSS EMAC Init Configuration Structure
*/
typedef struct ICSS_EMAC_Attrs_s
{
    uint8_t                     emacMode;
    uint32_t                    phyAddr[ICSS_EMAC_MAX_PORTS_PER_INSTANCE];
    uint8_t                     phyToMacInterfaceMode;
    uint8_t                     halfDuplexEnable;
    uint8_t                     enableIntrPacing;
    uint8_t                     intrPacingMode;
    uint16_t                    pacingThreshold;
    uint8_t                     ethPrioQueue;
    uint8_t                     learningEnable;
    uint8_t                     portMask;
    uint8_t                     txInterruptEnable;
    uint32_t                    linkIntNum;
    /* Link interrupt number on R5F*/
    uint32_t                    rxIntNum;
    /* Receive Packet interrupt number on R5F*/
    uint32_t                    txIntNum;
    /* Transmit completion interrupt number on R5F.
       Valid only if txInterruptEnable is set to 1 */
    uint32_t                    l3OcmcBaseAddr;
    uint32_t                    l3OcmcSize;
    uint32_t                    linkTaskPriority;
    uint32_t                    rxTaskPriority;
    uint32_t                    txTaskPriority;
    uint32_t                    splitQueue;
} ICSS_EMAC_Attrs;
 
typedef struct ICSS_EMAC_InternalObject_t
{
    uint32_t reserved[ICSS_EMAC_OBJECT_SIZE_IN_BYTES/sizeof(uint32_t)];
} ICSS_EMAC_InternalObject;
 
typedef struct ICSS_EMAC_Config_s
{
    void                    *object;
    const ICSS_EMAC_Attrs   *attrs;
} ICSS_EMAC_Config;
 
typedef struct ICSS_EMAC_CallBackConfig_s
{
    ICSS_EMAC_CallBack  callBack;
    void                *userArg;
} ICSS_EMAC_CallBackConfig;
 
typedef struct ICSS_EMAC_CallBackObject_s
{
    ICSS_EMAC_CallBackConfig port0LinkCallBack;
    ICSS_EMAC_CallBackConfig port1LinkCallBack;
    ICSS_EMAC_CallBackConfig rxNRTCallBack;
    ICSS_EMAC_CallBackConfig rxRTCallBack;
    ICSS_EMAC_CallBackConfig txCallBack;
    ICSS_EMAC_CallBackConfig learningExCallBack;
    ICSS_EMAC_CallBackConfig customTxCallBack;
    ICSS_EMAC_CallBackConfig customRxCallBack;
} ICSS_EMAC_CallBackObject;
 
typedef struct ICSS_EMAC_Params_s
{
    PRUICSS_Handle                      pruicssHandle;
    const PRUICSS_IntcInitData          *pruicssIntcInitData;
    ICSS_EMAC_FwStaticMmap              *fwStaticMMap;
    ICSS_EMAC_FwDynamicMmap             *fwDynamicMMap;
    ICSS_EMAC_FwVlanFilterParams        *fwVlanFilterParams;
    ICSS_EMAC_FwMulticastFilterParams   *fwMulticastFilterParams;
    ICSS_EMAC_CallBackObject            callBackObject;
    ETHPHY_Handle                       ethphyHandle[ICSS_EMAC_MAX_PORTS_PER_INSTANCE];
    uint8_t                             macId[6];
} ICSS_EMAC_Params;
 
typedef struct ICSS_EMAC_RxArgument_s
{
    ICSS_EMAC_Handle    icssEmacHandle;
    uint32_t            destAddress;
    uint8_t             queueNumber;
    uint8_t             port;
    uint32_t            more;
} ICSS_EMAC_RxArgument;
 
typedef struct ICSS_EMAC_TxArgument_s
{
    ICSS_EMAC_Handle    icssEmacHandle;
    const uint8_t       *srcAddress;
    uint8_t             portNumber;
    uint8_t             queuePriority;
    uint16_t            lengthOfPacket;
} ICSS_EMAC_TxArgument;
 
typedef struct ICSS_EMAC_IoctlCmd_s
{
    uint8_t command;
    void    *ioctlVal;
} ICSS_EMAC_IoctlCmd;
 
typedef struct ICSS_EMAC_PruStatistics_s
{
/* The fields here are aligned here so that it's consistent
  with the memory layout in PRU DRAM, this is to facilitate easy
  memcpy or DMA transfer. Don't change the order of fields without
  modifying the order of fields in PRU DRAM. For details refer to guide
*/
    volatile uint32_t txBcast;                  
    volatile uint32_t txMcast;                  
    volatile uint32_t txUcast;                  
    volatile uint32_t txOctets;                 
    volatile uint32_t rxBcast;                  
    volatile uint32_t rxMcast;                  
    volatile uint32_t rxUcast;                  
    volatile uint32_t rxOctets;                 
    volatile uint32_t tx64byte;                 
    volatile uint32_t tx65_127byte;             
    volatile uint32_t tx128_255byte;            
    volatile uint32_t tx256_511byte;            
    volatile uint32_t tx512_1023byte;           
    volatile uint32_t tx1024byte;               
    volatile uint32_t rx64byte;                 
    volatile uint32_t rx65_127byte;             
    volatile uint32_t rx128_255byte;            
    volatile uint32_t rx256_511byte;            
    volatile uint32_t rx512_1023byte;           
    volatile uint32_t rx1024byte;               
    volatile uint32_t lateColl;                 
    volatile uint32_t singleColl;               
    volatile uint32_t multiColl;                
    volatile uint32_t excessColl;               
    volatile uint32_t rxMisAlignmentFrames;     
    volatile uint32_t stormPrevCounter;         
    volatile uint32_t stormPrevCounterMC;         
    volatile uint32_t stormPrevCounterUC;         
    volatile uint32_t macRxError;               
    volatile uint32_t SFDError;                  
    volatile uint32_t defTx;                    
    volatile uint32_t macTxError;               
    volatile uint32_t rxOverSizedFrames;        
    volatile uint32_t rxUnderSizedFrames;       
    volatile uint32_t rxCRCFrames;              
    volatile uint32_t droppedPackets;           
/* Debug variables, these are not part of standard MIB. Useful for debugging */
/* Reserved for future Use */
    volatile uint32_t txOverFlow;               
    volatile uint32_t txUnderFlow;              
    volatile uint32_t sqeTestError;             
    volatile uint32_t TXqueueLevel;             
    volatile uint32_t CSError;                  
} ICSS_EMAC_PruStatistics;
/* ========================================================================== */
/*                       Function Declarations                                */
/* ========================================================================== */
 
void ICSS_EMAC_init(void);
 
void ICSS_EMAC_deinit(void);
 
void ICSS_EMAC_Params_init(ICSS_EMAC_Params *params);
 
ICSS_EMAC_Handle ICSS_EMAC_open(uint32_t idx, const ICSS_EMAC_Params *params);
 
void ICSS_EMAC_close(ICSS_EMAC_Handle icssEmacHandle);
 
int32_t ICSS_EMAC_ioctl(ICSS_EMAC_Handle icssEmacHandle,
                        uint32_t         ioctlCommand,
                        uint8_t          portNo,
                        void             *ioctlParams);
 
int32_t ICSS_EMAC_rxPktGet(ICSS_EMAC_RxArgument *rxArg, void *userArg);
 
int32_t ICSS_EMAC_rxPktInfo(ICSS_EMAC_Handle icssEmacHandle,
                            int32_t          *portNumber,
                            int32_t          *queueNumber);
 
int32_t ICSS_EMAC_txPacket(const ICSS_EMAC_TxArgument *txArg, void *userArg);
 
/* ========================================================================== */
/*                            Global Variables                                */
/* ========================================================================== */
 
#ifdef __cplusplus
}
#endif
 
#endif /* #ifndef ICSS_EMAC_H_ */