63 #ifndef HWA_VPAC3L_VISS_H_ 64 #define HWA_VPAC3L_VISS_H_ 67 #include <VX/vx_kernels.h> 81 #define TIVX_VPAC_VISS_MAX_OUTPUTS (6U) 83 #define TIVX_VPAC_VISS_FCP_NUM_INSTANCES (1U) 86 #define TIVX_VPAC_VISS_IR_DISABLE (0U) 88 #define TIVX_VPAC_VISS_IR_ENABLE (1U) 91 #define TIVX_VPAC_VISS_BAYER_DISABLE (0U) 93 #define TIVX_VPAC_VISS_BAYER_ENABLE (1U) 98 #define TIVX_VPAC_VISS_MAX_OUTPUTS (6U) 107 #define TIVX_VPAC_VISS_FCP1_DISABLED (0U) 109 #define TIVX_VPAC_VISS_FCP1_INPUT_RFE (1U) 111 #define TIVX_VPAC_VISS_FCP1_INPUT_CAC (2U) 113 #define TIVX_VPAC_VISS_FCP1_INPUT_NSF4 (3U) 115 #define TIVX_VPAC_VISS_FCP1_INPUT_GLBCE (4U) 118 #define TIVX_VPAC_VISS_FCP0 (0U) 121 #define TIVX_VPAC_VISS_FCP_OUT0 (0U) 123 #define TIVX_VPAC_VISS_FCP_OUT1 (0U) 125 #define TIVX_VPAC_VISS_FCP_OUT2 (1U) 127 #define TIVX_VPAC_VISS_FCP_OUT3 (1U) 129 #define TIVX_VPAC_VISS_FCP_OUT4 (0U) 133 #define TIVX_VPAC_VISS_MAP_FCP_OUTPUT(fcp, output) (output<<1 | fcp) 147 uint32_t sensor_dcc_id;
156 uint32_t fcp1_config;
174 uint32_t enable_bayer_op;
180 uint32_t output_fcp_mapping[5];
192 uint32_t bypass_nsf4;
196 uint32_t bypass_glbce;
227 uint32_t h3a_aewb_af_mode;
266 uint32_t enable_error_events;
277 uint32_t wdtimer_timeout_cycles;
294 } tivx_vpac_viss_psa_timestamp_data_t;
The Flex Color Processing (FCP) data structure used in the tivx_vpac_viss_params_t structure for prog...
#define TIVX_VPAC_VISS_MAX_OUTPUTS
Max Output Channels.
The configuration data structure used by the TIVX_KERNEL_VISS kernel.