MCUSW
Adc User Guide

Introduction

This document details AUTOSAR BSW ADC module implementation

  • Supported AUTOSAR Release : 4.3.1
  • Supported Configuration Variants : Post-build, Pre-Compile
  • Vendor ID : ADC_VENDOR_ID (44)
  • Module ID : ADC_MODULE_ID (123)

The ADC module initializes, configures and controls the ADC hardware as detailed in AUTOSAR BSW ADC Driver Specification. Following section highlights key aspects of this implementation, which would be interest for integrator.


Adc Driver Architecture/Design

Please refer the ADC design, which is included as part of release (Adc Design Document)


Functional Description

Clock Source to adc

Programming of clock source for the adc, is beyond the scope of this document. The driver expects user of this module has programmed required clock source. The example application demonstrates configuring clock sources for the adc.

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Adc Sample output

Minimum sampling clock source given as input to the ADC is 25 MHZ and it is observed that ADC hardware samples data faster than CPU reads it. Adc sampled output is inconsistent because of this. So it is reccommended to increase delay parameters AdcChannelAveragingMode, AdcChannelOpenDelay and AdcChannelSampleDelay according to the requirement.

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Adc Instance, Adc Hw Unit ID mapping and ISR mapping

All adc instances are supported by this driver implementation. The following table lists the mapping between instance of hardware and AdcHwUnitId of the configurator

AdcHwUnitId Adc Instance Associated ISR (if notification is enabled)
0 MCU INSTANCE 0 Adc_IrqUnit0
1 MCU INSTANCE 1 Adc_IrqUnit1

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Configuration

The Adc Driver implementation supports multiple configuration variants (refer section Introduction), the driver expects generated Adc_Cfg.h to be present as (File Structure). Please refer (Build) to specify path to the generated configuration. The associated adc configuration generated files Adc_Cfg.c and Adc_PBcfg.c to be present as shown (File Structure)

The following section details on the un-supported features and additional features added.


Variance / Deviation from the specification

AdcClockReference

To configure the clock source for Adc, one would have to access/configure common registers. It’s recommended that clock sources for the Adc hardware are done in SBL / Start up code.


Implementation Specific Configurations

This driver implementation introduces below listed configurable options.

Please refer the ADC design section NON Standard configurable parameters (NON Standard configurable parameters), which is included as part of release (Adc Design Document)


Compile Time Configurations for Performance

  1. ADC_DEV_ERROR_DETECT Control checks of configurations and parameters. Turn OFF to improve performance.
  2. ADC_GROUP_LOG Control checks of group logging. Turn OFF to improve performance.
  3. ADC_FIFO_ERR_LOG Control checks of fifo error logging. Turn OFF to improve performance.

Non Standard Service APIs


Adc_RegisterReadback

As noted from the previous MCAL implementation, some of the critical configuration registers could potentially be corrupted by other entities (s/w or h/w). One of the recommended detection methods would be to periodically read-back the configuration and confirm configuration is consistent. The service API defined below shall be implemented to enable this detection

Service Name Adc_RegisterReadback
Syntax Std_ReturnType Adc_RegisterReadback (Adc_HWUnitType HWUnit, Adc_RegisterReadbackType *RegRbPtr)
Service ID[hex] 0x0F
Sync/Async Synchronous
Reentrancy Non Reentrant
Parameters (in) HWUnit : ADC Hardware microcontroller peripheral unit ID
Parameters (out) RegRbPtr : A pointer of type Adc_RegisterReadbackType, which holds the read back values
Return Value E_OK: Register read back has been done E_NOT_OK: Register read back failed (in case of invalid hw unit id or RegRbPtr is NULL_PTR
Description Reads the important registers of the hardware unit and returns the value in the structure.

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Interrupt Configuration

The Driver doesn’t register any interrupts handler (ISR), it’s expected that consumer of this driver registers the required interrupt handler.

For every Adc hardwarebunit with notification enabled, an ISR requires to be registered. The Interrupt number associated with instance of the Adc is detailed in TRM (also, please refer the demo application). Please refer AdcApp_InterruptConfig () in Adc demo application.

Refer section (Adc Instance, Adc Hw Unit ID mapping and ISR mapping), for association between hw unit ID and ISR

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Power-up

The driver doesn't configure the functional clock and power for the adc modules. Its expected that SBL power-up the required modules. Please refer SBL documentation.

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Build and Running the Example Application

Please follow steps detailed in section (Build) to build library or example

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Example Application

  • Support both Post Build and Pre Compile Configuration Variants
  • For each Configured hardware unit id, with default configuration provided in the release
    • Configured 2 groups, one with One shot mode and HW Unit assigned is ADC_0
    • Second group with Continuous mode assigned to ADC_1.

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Steps to run example application

Please refer (Running Examples)

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Memory Mapping

Various objects of this implementation (e.g. variables, functions, constants) are defined under different sections. The linker command file at (Examples Linker File (Select memory location to hold example binary)) defines separate section for these objects. When the driver is integrated, its expected that these sections are created and placed in appropriate memory locations. (Locations of these objects depend on the system design and performance needs)

Section ADC_CODE ADC_VAR ADC_VAR_NOINIT ADC_CONST ADC_CONFIG
ADC_DATA_NO_INIT_UNSPECIFIED_SECTION USED
ADC_DATA_INIT_32_SECTION USED
ADC_TEXT_SECTION USED
ADC_DATA_INIT_UNSPECIFIED_SECTION USED
ADC_CONST_32_SECTION USED
ADC_ISR_TEXT_SECTION USED
ADC_CONFIG_SECTION USED

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Cache

This driver implementation has been validated with cache enabled. For optimal performance it’s recommended to place (Memory Mapping) sections in cache enabled memory area.

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Dependencies on SW Modules


DET

This implementation depends on the DET in order to report development errors and can be turned OFF. Refer section (Development Error Reporting) for detailed error codes.

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SchM

This implementation requires 1 level of exclusive access to guard critical sections. Invokes SchM_Enter_Adc_ADC_EXCLUSIVE_AREA_0 (), SchM_Exit_Adc_ADC_EXCLUSIVE_AREA_0 () to enter critical section and exit.

In the example implementation (File Structure SchM_Adc.c) , all the interrupts on CPU are disabled. However, disabling of the enabled Adc interrupt should suffice.

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File Structure

adc_design_dir_detailed.png
Detailed Directory Structure
  1. Driver implemented by : Adc.h, Adc_Irq.h, Adc.c, Adc_Utils.c, Adc_Irq.c, Adc_Priv.c and Adc_Priv.h
  2. Example Configuration by : Adc_Cfg.h, Adc_Cfg.c and Adc_PBcfg.c
  3. Example Application by : AdcApp.c and AdcApp.h

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Error Handling


Development Error Reporting

Development errors are reported to the DET using the service Det_ReportError(), when enabled. The driver interface (Adc.h File Structure) lists the SID

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Error codes

Type of Error Related Error code Value (Hex)
API service called without module initialization ADC_E_UINIT 0x0A
API service called when adc group conversion ongoing ADC_E_BUSY 0x0B
API service for initialization is called when already initialized ADC_E_ALREADY_INITIALIZED 0x0D
API parameter checking: invalid config ADC_E_PARAM_CONFIG 0xE
API parameter checking: invalid pointer ADC_E_PARAM_POINTER 0x14
API parameter checking: invalid group id ADC_E_PARAM_GROUP 0x15
API parameter checking: invalid conversion mode ADC_E_WRONG_CONV_MODE 0x16
API parameter checking: invalid trigger source ADC_E_WRONG_TRIGG_SRC 0x17 </tr
API parameter checking: No notification configured ADC_E_NOTIF_CAPABILITY 0x18
API parameter checking: Result Buffer not initialized ADC_E_BUFFER_UNINIT 0x19
API parameter checking: Group/Channel not in idle state ADC_E_NOT_DISENGAGED 0x1A
API parameter checking: Unsupported power state request ADC_E_POWER_STATE_NOT_SUPPORTED 0x1B
API parameter checking: Requested power state can not be reached directly. ADC_E_TRANSITION_NOT_POSSIBLE 0x1C
API parameter checking: ADC not prepared for target power state. ADC_E_PERIPHERAL_NOT_PREPARED 0x1D

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Production Code Error Reporting

Production error are reported to DEM via the service DEM_ReportErrorStatus(). In addition to standard errors, this implementation reports "ADC_E_HARDWARE_ERROR" when ADC HW calibration/FSM state fails.

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API Description

  • All Api's particular to enabling and disabling hardware trigger of hardware triggered channel groups and management of hardware low-power states are not supported.

Refer API Documentation for details

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Example Application

The example application demonstrates use of Adc module, the list below identifies key steps performed the example. The configuration file is present at (File Structure)

  • Initializes “Result Status Flag”
  • AdcApp_Startup ()
    • Builds interrupt list and registers ISR for enabled Adc instance
  • AdcApp_PowerAndClkSrc ()
    • Sets up clock sources for the adc modules
  • AdcApp_mainTest ()
    • For each enabled instance
      • Initialize Adc driver with configured conversion modes
      • Set Up Result Buffer
      • Enable group notification if notify capability is ON
      • Start ADC Conversion
      • Wait for conversion to get complete
      • Disable group notification if notify capability is ON
      • Stop ADC Conversion(Explicitly only in case of continuous mode)
      • Prints Conversion Results
      • De-Initialize Adc driver
  • Checks for error status and stack corruption.

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Example Log

J721E

    ADC_APP: Sample Application - STARTS !!!
    ADC_APP: Variant - Post Build being used !!!
    ADC_APP: GROUPs 2: HWUNIT 2: LOOP COUNT 5: NUM STREAMS 1:!!!

    ADC_APP:  ADC MCAL Version Info
    ADC_APP: ---------------------
    ADC_APP:  Vendor ID           : 44
    ADC_APP:  Module ID           : 123
    ADC_APP:  SW Major Version    : 0
    ADC_APP:  SW Minor Version    : 1
    ADC_APP:  SW Patch Version    : 0


     Result Buffer Content
     ---------------------
     ADC Group 0 Log:
     ----------------
     Channel    Stream    HW_CH       ADC Value    Volt
     ----------------------------------------------------
     0          0         ADC_IN0     0x00000da7  1536 mV
     ADC Group 1 Log:
     ----------------
     Channel    Stream    HW_CH       ADC Value    Volt
     ----------------------------------------------------
     0          0         ADC_IN0     0x00000f20  1701 mV

     Read Buffer Content
     -------------------
     ADC Group 0 Log:
     ----------------
     Channel    Set Idx   HW_CH       ADC Value    Volt
     ----------------------------------------------------
     0          0         ADC_IN0     0x00000d99  1530 mV
     0          1         ADC_IN0     0x00000dae  1539 mV
     0          2         ADC_IN0     0x00000db0  1540 mV
     0          3         ADC_IN0     0x00000da8  1536 mV
     0          4         ADC_IN0     0x00000da7  1536 mV
     ADC Group 1 Log:
     ----------------
     Channel    Set Idx   HW_CH       ADC Value    Volt
     ----------------------------------------------------
     0          0         ADC_IN0     0x00000dbe  1546 mV
     0          1         ADC_IN0     0x00000f1a  1699 mV
     0          2         ADC_IN0     0x00000f20  1701 mV
     0          3         ADC_IN0     0x00000f20  1701 mV
     0          4         ADC_IN0     0x00000f20  1701 mV
     Warning: ADC Group 1 values are out of range!!
    ADC_APP: ADC Stack Usage: 816 bytes
    ADC_APP: ADC Test Passed!!!
    ADC_APP: Sample Application - DONE !!!

J7200

    ADC_APP: Sample Application - STARTS !!!
    ADC_APP: Variant - Post Build being used !!!
    ADC_APP: GROUPs 1: HWUNIT 1: LOOP COUNT 5: NUM STREAMS 1:!!!

    ADC_APP:  ADC MCAL Version Info
    ADC_APP: ---------------------
    ADC_APP:  Vendor ID           : 44
    ADC_APP:  Module ID           : 123
    ADC_APP:  SW Major Version    : 1
    ADC_APP:  SW Minor Version    : 2
    ADC_APP:  SW Patch Version    : 1


    Result Buffer Content
    ---------------------
    ADC Group 0 Log:
    ----------------
    Channel    Stream    HW_CH       ADC Value    Volt
    ----------------------------------------------------
    0          0         ADC_IN0     0x00000f55  1725 mV

    Read Buffer Content
    -------------------
    ADC Group 0 Log:
    ----------------
    Channel    Set Idx   HW_CH       ADC Value    Volt
    ----------------------------------------------------
    0          0         ADC_IN0     0x00000f64  1731 mV
    0          1         ADC_IN0     0x00000f54  1724 mV
    0          2         ADC_IN0     0x00000f71  1737 mV
    0          3         ADC_IN0     0x00000f68  1733 mV
    0          4         ADC_IN0     0x00000f55  1725 mV
    ADC_APP: ADC Stack Usage: 1156 bytes
    ADC_APP: ADC Test Passed!!!
    ADC_APP: Sample Application - DONE !!!

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References

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Document Revision History

Revision Date Author Description Status
0.1 25 Mar 2019 Sunil M S First version Pending Review
0.2 1 Apr 2019 Sunil M S Addressed review comments Approved
0.3 16 Oct 2018 Sujith S Added Logs from J721E testing Approved
0.4 02 Nov 2020 Nikki S J7200 updated Approved