enum Timer_A3.CAP_t |
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XDCscript usage |
meta-domain |
values of type Timer_A3.CAP_t
const Timer_A3.CAP_OFF;
// Compare mode
const Timer_A3.CAP;
// Capture mode
enum Timer_A3.CCIE_t |
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XDCscript usage |
meta-domain |
values of type Timer_A3.CCIE_t
const Timer_A3.CCIE_OFF;
const Timer_A3.CCIE;
enum Timer_A3.CCIFG_t |
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XDCscript usage |
meta-domain |
values of type Timer_A3.CCIFG_t
const Timer_A3.CCIFG_OFF;
const Timer_A3.CCIFG;
enum Timer_A3.CCIS_t |
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XDCscript usage |
meta-domain |
values of type Timer_A3.CCIS_t
const Timer_A3.CCIS_0;
// CCIxA
const Timer_A3.CCIS_1;
// CCIxB
const Timer_A3.CCIS_2;
// GND
const Timer_A3.CCIS_3;
// Vcc
enum Timer_A3.CCI_t |
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XDCscript usage |
meta-domain |
values of type Timer_A3.CCI_t
const Timer_A3.CCI_OFF;
const Timer_A3.CCI;
enum Timer_A3.CM_t |
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XDCscript usage |
meta-domain |
values of type Timer_A3.CM_t
const Timer_A3.CM_0;
// No Capture
const Timer_A3.CM_1;
// Rising Edge
const Timer_A3.CM_2;
// Falling Edge
const Timer_A3.CM_3;
// Both Edges
enum Timer_A3.COV_t |
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XDCscript usage |
meta-domain |
values of type Timer_A3.COV_t
const Timer_A3.COV_OFF;
const Timer_A3.COV;
enum Timer_A3.ID_t |
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XDCscript usage |
meta-domain |
values of type Timer_A3.ID_t
const Timer_A3.ID_0;
// Divider - /1
const Timer_A3.ID_1;
// Divider - /2
const Timer_A3.ID_2;
// Divider - /4
const Timer_A3.ID_3;
// Divider - /8
enum Timer_A3.IVValues |
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TA3IV Definitions
XDCscript usage |
meta-domain |
values of type Timer_A3.IVValues
const Timer_A3.TAIV_NONE;
// No Interrupt pending
const Timer_A3.TAIV_TACCR1;
// TACCR1_CCIFG
const Timer_A3.TAIV_TACCR2;
// TACCR2_CCIFG
const Timer_A3.TAIV_6;
// Reserved
const Timer_A3.TAIV_8;
// Reserved
const Timer_A3.TAIV_TAIFG;
// TAIFG
enum Timer_A3.MC_t |
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XDCscript usage |
meta-domain |
values of type Timer_A3.MC_t
const Timer_A3.MC_0;
// Stop Mode
const Timer_A3.MC_1;
// Up Mode
const Timer_A3.MC_2;
// Continuous Mode
const Timer_A3.MC_3;
// Up/Down Mode
enum Timer_A3.OUTMOD_t |
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XDCscript usage |
meta-domain |
values of type Timer_A3.OUTMOD_t
const Timer_A3.OUTMOD_0;
// PWM output mode: 0 - OUT bit value
const Timer_A3.OUTMOD_1;
// PWM output mode: 1 - Set
const Timer_A3.OUTMOD_2;
// PWM output mode: 2 - PWM toggle/reset
const Timer_A3.OUTMOD_3;
// PWM output mode: 3 - PWM set/reset
const Timer_A3.OUTMOD_4;
// PWM output mode: 4 - Toggle
const Timer_A3.OUTMOD_5;
// PWM output mode: 5 - Reset
const Timer_A3.OUTMOD_6;
// PWM output mode: 6 - PWM toggle/set
const Timer_A3.OUTMOD_7;
// PWM output mode: 7 - PWM reset/set
enum Timer_A3.OUT_t |
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XDCscript usage |
meta-domain |
values of type Timer_A3.OUT_t
const Timer_A3.OUT_OFF;
const Timer_A3.OUT;
enum Timer_A3.SCCI_t |
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XDCscript usage |
meta-domain |
values of type Timer_A3.SCCI_t
const Timer_A3.SCCI_OFF;
// Latched capture signal (read)
const Timer_A3.SCCI;
// Latched capture signal (read)
enum Timer_A3.SCS_t |
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XDCscript usage |
meta-domain |
values of type Timer_A3.SCS_t
const Timer_A3.SCS_OFF;
// Asynchronous Capture
const Timer_A3.SCS;
// Sychronous Capture
enum Timer_A3.TACLR_t |
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XDCscript usage |
meta-domain |
values of type Timer_A3.TACLR_t
const Timer_A3.TACLR_OFF;
const Timer_A3.TACLR;
enum Timer_A3.TAIE_t |
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XDCscript usage |
meta-domain |
values of type Timer_A3.TAIE_t
const Timer_A3.TAIE_OFF;
const Timer_A3.TAIE;
enum Timer_A3.TAIFG_t |
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XDCscript usage |
meta-domain |
values of type Timer_A3.TAIFG_t
const Timer_A3.TAIFG_OFF;
const Timer_A3.TAIFG;
enum Timer_A3.TASSEL_t |
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XDCscript usage |
meta-domain |
values of type Timer_A3.TASSEL_t
const Timer_A3.TASSEL_0;
// TACLK
const Timer_A3.TASSEL_1;
// ACLK
const Timer_A3.TASSEL_2;
// SMCLK
const Timer_A3.TASSEL_3;
// INCLK
struct Timer_A3.ForceSetDefaultRegister_t |
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Force Set Default Register
XDCscript usage |
meta-domain |
var obj = new Timer_A3.ForceSetDefaultRegister_t;
obj.register = String ...
obj.regForceSet = Bool ...
DETAILS
Type to store if each register needs to be forced initialized
even if the register is in default state.
SEE
struct Timer_A3.TACCTLx_t |
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Capture/Compare Control Register
XDCscript usage |
meta-domain |
var obj = new Timer_A3.TACCTLx_t;
// Capture mode
00 No capture
01 Capture on rising edge
10 Capture on falling edge
11 Capture on both rising and falling edges
// Capture/compare input select. These bits select the TACCRx input signal.
See the device-specific data sheet for specific signal connections.
00 CCIxA
01 CCIxB
10 GND
11 VCC
// Synchronize capture source. This bit is used to synchronize the capture input
signal with the timer clock.
0 Asynchronous capture
1 Synchronous capture
// Synchronized capture/compare input. The selected CCI input signal is
latched with the EQUx signal and can be read via this bit
// Capture mode
0 Compare mode
1 Capture mode
// Output mode. Modes 2, 3, 6, and 7 are not useful for TACCR0 because
EQUx = EQU0.
000 OUT bit value
001 Set
010 Toggle/reset
011 Set/reset
100 Toggle
101 Reset
110 Toggle/set
111 Reset/set
// Capture/compare interrupt enable. This bit enables the interrupt request of
the corresponding CCIFG flag.
0 Interrupt disabled
1 Interrupt enabled
// Capture/compare input. The selected input signal can be read by this bit
// Output. For output mode 0, this bit directly controls the state of the output.
0 Output low
1 Output high
// Capture overflow. This bit indicates a capture overflow occurred. COV must
be reset with software.
0 No capture overflow occurred
1 Capture overflow occurred
// Capture/compare interrupt flag
0 No interrupt pending
1 Interrupt pending
SEE
struct Timer_A3.TACTL_t |
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Timer_A Control Register
XDCscript usage |
meta-domain |
var obj = new Timer_A3.TACTL_t;
// Timer_A clock source select
00 TACLK
01 ACLK
10 SMCLK
11 INCLK
// Input divider. These bits select the divider for the input clock.
00 /1
01 /2
10 /4
11 /8
// Mode control. Setting MCx = 00h when Timer_A is not in use conserves
power.
00 Stop mode: the timer is halted.
01 Up mode: the timer counts up to TACCR0.
10 Continuous mode: the timer counts up to 0FFFFh.
11 Up/down mode: the timer counts up to TACCR0 then down to 0000h
// Timer_A clear. Setting this bit resets TAR, the clock divider, and the count
direction. The TACLR bit is automatically reset and is always read as zero
// Timer_A interrupt enable. This bit enables the TAIFG interrupt request.
0 Interrupt disabled
1 Interrupt enabled
// Timer_A interrupt flag
0 No interrupt pending
1 Interrupt pending
SEE
Timer_A3.addPeripheralsMap() // module-wide |
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Create a map of all peripherals available on a device
XDCscript usage |
meta-domain |
ARGUMENTS
DETAILS
The config parameter
peripherals is by default undefined in an
xdc.platform.ICpuDataSheet instance. This function gathers
all instance configuration parameters that are of the type
xdc.platform.IPeripheral into the map
peripherals.
Timer_A3.getAll() // module-wide |
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Find all peripherals of a certain type
XDCscript usage |
meta-domain |
DETAILS
The type of the peripherals returned is defined by the type of the
caller.
RETURNS
Returns an array of IPeripheral instances
Timer_A3.getRegisters() // module-wide |
|
Find all registers defined by the peripheral
XDCscript usage |
meta-domain |
Timer_A3.getRegisters() returns String[]
RETURNS
Returns an array of register names
Instance Config Parameters |
|
XDCscript usage |
meta-domain |
var params = new Timer_A3.Params;
// Instance config-params object
params.INCLK = Float 0;
// Timer_A INCLK
params.TACCR0 = Int 0;
// TACCR0, Timer_A Capture/Compare Register 0
params.TACCR1 = Int 0;
// TACCR1, Timer_A Capture/Compare Register 1
params.TACCR2 = Int 0;
// TACCR2, Timer_A Capture/Compare Register 2
// TACCTL0, Capture/Compare Control Register 0
};
// TACCTL1, Capture/Compare Control Register 1
};
// TACCTL2, Capture/Compare Control Register 2
};
params.TACLK = Float 0;
// Timer_A TACLK
// TACTL, Timer_A3 Control Register
};
params.baseAddr = UInt undefined;
// Address of the peripheral's control register
// Determine if each Register needs to be forced set or not
{
register: "TACTL",
regForceSet: false
},
{
register: "TACCTL0",
regForceSet: false
},
{
register: "TACCTL1",
regForceSet: false
},
{
register: "TACCTL2",
regForceSet: false
},
{
register: "TACCR0",
regForceSet: false
},
{
register: "TACCR1",
regForceSet: false
},
{
register: "TACCR2",
regForceSet: false
}
];
params.intNum = UInt undefined;
// Interrupt source number
params.name = String undefined;
// Specific peripheral name given by the device
params.owner = String undefined;
// String specifying the entity that manages the peripheral
config Timer_A3.INCLK // instance |
|
Timer_A INCLK
XDCscript usage |
meta-domain |
var params = new Timer_A3.Params;
...
params.INCLK = Float 0;
config Timer_A3.TACCR0 // instance |
|
TACCR0, Timer_A Capture/Compare Register 0
XDCscript usage |
meta-domain |
var params = new Timer_A3.Params;
...
params.TACCR0 = Int 0;
config Timer_A3.TACCR1 // instance |
|
TACCR1, Timer_A Capture/Compare Register 1
XDCscript usage |
meta-domain |
var params = new Timer_A3.Params;
...
params.TACCR1 = Int 0;
config Timer_A3.TACCR2 // instance |
|
TACCR2, Timer_A Capture/Compare Register 2
XDCscript usage |
meta-domain |
var params = new Timer_A3.Params;
...
params.TACCR2 = Int 0;
config Timer_A3.TACCTL0 // instance |
|
TACCTL0, Capture/Compare Control Register 0
XDCscript usage |
meta-domain |
var params = new Timer_A3.Params;
...
};
config Timer_A3.TACCTL1 // instance |
|
TACCTL1, Capture/Compare Control Register 1
XDCscript usage |
meta-domain |
var params = new Timer_A3.Params;
...
};
config Timer_A3.TACCTL2 // instance |
|
TACCTL2, Capture/Compare Control Register 2
XDCscript usage |
meta-domain |
var params = new Timer_A3.Params;
...
};
config Timer_A3.TACLK // instance |
|
Timer_A TACLK
XDCscript usage |
meta-domain |
var params = new Timer_A3.Params;
...
params.TACLK = Float 0;
config Timer_A3.TACTL // instance |
|
TACTL, Timer_A3 Control Register
XDCscript usage |
meta-domain |
var params = new Timer_A3.Params;
...
};
config Timer_A3.baseAddr // instance |
|
Address of the peripheral's control register
XDCscript usage |
meta-domain |
var params = new Timer_A3.Params;
...
params.baseAddr = UInt undefined;
DETAILS
A peripheral's registers are commonly accessed through a structure
that defines the offsets of a particular register from the lowest
address mapped to a peripheral. That lowest address is specified by
this parameter.
config Timer_A3.forceSetDefaultRegister // instance |
|
Determine if each Register needs to be forced set or not
XDCscript usage |
meta-domain |
var params = new Timer_A3.Params;
...
{
register: "TACTL",
regForceSet: false
},
{
register: "TACCTL0",
regForceSet: false
},
{
register: "TACCTL1",
regForceSet: false
},
{
register: "TACCTL2",
regForceSet: false
},
{
register: "TACCR0",
regForceSet: false
},
{
register: "TACCR1",
regForceSet: false
},
{
register: "TACCR2",
regForceSet: false
}
];
config Timer_A3.intNum // instance |
|
Interrupt source number
XDCscript usage |
meta-domain |
var params = new Timer_A3.Params;
...
params.intNum = UInt undefined;
config Timer_A3.name // instance |
|
Specific peripheral name given by the device
XDCscript usage |
meta-domain |
var params = new Timer_A3.Params;
...
params.name = String undefined;
DETAILS
Devices can have more than one peripheral of the same type. In such
cases, device data sheets give different names to the instances of a
same peripheral. For example, the name for a timer module could be
TimerA3, and a device that has two such timers can name them TA0
and TA1.
config Timer_A3.owner // instance |
|
String specifying the entity that manages the peripheral
XDCscript usage |
meta-domain |
var params = new Timer_A3.Params;
...
params.owner = String undefined;
Instance Creation |
|
XDCscript usage |
meta-domain |
var params =
new Timer_A3.
Params;
// Allocate instance config-params
params.config = ...
// Assign individual configs
// Create an instance-object
Timer_A3.getNumberOfTimers() // instance |
|
XDCscript usage |
meta-domain |
inst.getNumberOfTimers() returns UChar
Timer_A3.getTimer_A_OUT() // instance |
|
Returns Timer_A OUT in ms rising-edge interval based on a channel input
XDCscript usage |
meta-domain |
inst.getTimer_A_OUT(UChar channel) returns Float
DETAILS
This function calculates a time base rising-edge of clock based on
clock source, TxCCRx register and OUTMOD settings.
SEE