metaonly interface ti.catalog.msp430.peripherals.timer.ITimer_A
index URL

MSP430 ITimer_A interface

XDCspec summary sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
metaonly interface ITimer_A {  ...
// inherits xdc.platform.IPeripheral
instance:  ...
XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
package ti.catalog.msp430.peripherals.timer;
 
metaonly interface ITimer_A inherits IPeripheral {
module-wide constants & types
    enum CAP_t//  {
        CAP_OFF// Compare mode,
        CAP// Capture mode
    };
    enum CCIE_t//  {
        CCIE_OFF,
        CCIE
    };
    enum CCIFG_t//  {
        CCIFG_OFF,
        CCIFG
    };
    enum CCIS_t//  {
        CCIS_0// CCIxA,
        CCIS_1// CCIxB,
        CCIS_2// GND,
        CCIS_3// Vcc
    };
    enum CCI_t//  {
        CCI_OFF,
        CCI
    };
    enum CM_t//  {
        CM_0// No Capture,
        CM_1// Rising Edge,
        CM_2// Falling Edge,
        CM_3// Both Edges
    };
    enum COV_t//  {
        COV_OFF,
        COV
    };
    enum ID_t//  {
        ID_0// Divider - /1,
        ID_1// Divider - /2,
        ID_2// Divider - /4,
        ID_3// Divider - /8
    };
    enum IVValues// TA3IV Definitions {
        TAIV_NONE// No Interrupt pending,
        TAIV_TACCR1// TACCR1_CCIFG,
        TAIV_TACCR2// TACCR2_CCIFG,
        TAIV_6// Reserved,
        TAIV_8// Reserved,
        TAIV_TAIFG// TAIFG
    };
    enum MC_t//  {
        MC_0// Stop Mode,
        MC_1// Up Mode,
        MC_2// Continuous Mode,
        MC_3// Up/Down Mode
    };
    enum OUTMOD_t//  {
        OUTMOD_0// PWM output mode: 0 - OUT bit value,
        OUTMOD_1// PWM output mode: 1 - Set,
        OUTMOD_2// PWM output mode: 2 - PWM toggle/reset,
        OUTMOD_3// PWM output mode: 3 - PWM set/reset,
        OUTMOD_4// PWM output mode: 4 - Toggle,
        OUTMOD_5// PWM output mode: 5 - Reset,
        OUTMOD_6// PWM output mode: 6 - PWM toggle/set,
        OUTMOD_7// PWM output mode: 7 - PWM reset/set
    };
    enum OUT_t//  {
        OUT_OFF,
        OUT
    };
    enum SCCI_t//  {
        SCCI_OFF// Latched capture signal (read),
        SCCI// Latched capture signal (read)
    };
    enum SCS_t//  {
        SCS_OFF// Asynchronous Capture,
        SCS// Sychronous Capture
    };
    enum TACLR_t//  {
        TACLR_OFF,
        TACLR
    };
    enum TAIE_t//  {
        TAIE_OFF,
        TAIE
    };
    enum TAIFG_t//  {
        TAIFG_OFF,
        TAIFG
    };
    enum TASSEL_t//  {
        TASSEL_0// TACLK,
        TASSEL_1// ACLK,
        TASSEL_2// SMCLK,
        TASSEL_3// INCLK
    };
    typedef IPeripheral.Instance IPeripheralArray// [];
    typedef String StringArray// [];
    metaonly struct ForceSetDefaultRegister_t// Force Set Default Register {
        String register;
        Bool regForceSet;
    };
    metaonly struct TACCTLx_t// Capture/Compare Control Register {
        ITimer_A.CM_t CM// Capture mode 00 No capture 01 Capture on rising edge 10 Capture on falling edge 11 Capture on both rising and falling edges;
        ITimer_A.CCIS_t CCIS// Capture/compare input select. These bits select the TACCRx input signal. See the device-specific data sheet for specific signal connections. 00 CCIxA 01 CCIxB 10 GND 11 VCC;
        ITimer_A.SCS_t SCS// Synchronize capture source. This bit is used to synchronize the capture input signal with the timer clock. 0 Asynchronous capture 1 Synchronous capture;
        ITimer_A.SCCI_t SCCI// Synchronized capture/compare input. The selected CCI input signal is latched with the EQUx signal and can be read via this bit;
        ITimer_A.CAP_t CAP// Capture mode 0 Compare mode 1 Capture mode;
        ITimer_A.OUTMOD_t OUTMOD// Output mode. Modes 2, 3, 6, and 7 are not useful for TACCR0 because EQUx = EQU0. 000 OUT bit value 001 Set 010 Toggle/reset 011 Set/reset 100 Toggle 101 Reset 110 Toggle/set 111 Reset/set;
        ITimer_A.CCIE_t CCIE// Capture/compare interrupt enable. This bit enables the interrupt request of the corresponding CCIFG flag. 0 Interrupt disabled 1 Interrupt enabled;
        ITimer_A.CCI_t CCI// Capture/compare input. The selected input signal can be read by this bit;
        ITimer_A.OUT_t OUT// Output. For output mode 0, this bit directly controls the state of the output. 0 Output low 1 Output high;
        ITimer_A.COV_t COV// Capture overflow. This bit indicates a capture overflow occurred. COV must be reset with software. 0 No capture overflow occurred 1 Capture overflow occurred;
        ITimer_A.CCIFG_t CCIFG// Capture/compare interrupt flag 0 No interrupt pending 1 Interrupt pending;
    };
    metaonly struct TACTL_t// Timer_A Control Register {
        ITimer_A.TASSEL_t TASSEL// Timer_A clock source select 00 TACLK 01 ACLK 10 SMCLK 11 INCLK;
        ITimer_A.ID_t ID// Input divider. These bits select the divider for the input clock. 00 /1 01 /2 10 /4 11 /8;
        ITimer_A.MC_t MC// Mode control. Setting MCx = 00h when Timer_A is not in use conserves power. 00 Stop mode: the timer is halted. 01 Up mode: the timer counts up to TACCR0. 10 Continuous mode: the timer counts up to 0FFFFh. 11 Up/down mode: the timer counts up to TACCR0 then down to 0000h;
        ITimer_A.TACLR_t TACLR// Timer_A clear. Setting this bit resets TAR, the clock divider, and the count direction. The TACLR bit is automatically reset and is always read as zero;
        ITimer_A.TAIE_t TAIE// Timer_A interrupt enable. This bit enables the TAIFG interrupt request. 0 Interrupt disabled 1 Interrupt enabled;
        ITimer_A.TAIFG_t TAIFG// Timer_A interrupt flag 0 No interrupt pending 1 Interrupt pending;
    };
module-wide functions
    Void addPeripheralsMap// Create a map of all peripherals available on a device(ICpuDataSheet.Instance cds);
    IPeripheral.IPeripheralArray getAll// Find all peripherals of a certain type();
    IPeripheral.StringArray getRegisters// Find all registers defined by the peripheral();
 
instance:
per-instance config parameters
    config Float INCLK// Timer_A INCLK = 0;
    config Float TACLK// Timer_A TACLK = 0;
    config UInt baseAddr// Address of the peripheral's control register;
    config UInt intNum// Interrupt source number;
    config String name// Specific peripheral name given by the device;
    config String owner// String specifying the entity that manages the peripheral;
per-instance creation
    create// Create an instance-object(IClock.Instance clock);
per-instance functions
    UChar getNumberOfTimers// ();
}
enum ITimer_A.CAP_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
enum CAP_t {
    CAP_OFF,
    // Compare mode
    CAP
    // Capture mode
};
enum ITimer_A.CCIE_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
enum CCIE_t {
    CCIE_OFF,
    CCIE
};
enum ITimer_A.CCIFG_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
enum CCIFG_t {
    CCIFG_OFF,
    CCIFG
};
enum ITimer_A.CCIS_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
enum CCIS_t {
    CCIS_0,
    // CCIxA
    CCIS_1,
    // CCIxB
    CCIS_2,
    // GND
    CCIS_3
    // Vcc
};
enum ITimer_A.CCI_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
enum CCI_t {
    CCI_OFF,
    CCI
};
enum ITimer_A.CM_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
enum CM_t {
    CM_0,
    // No Capture
    CM_1,
    // Rising Edge
    CM_2,
    // Falling Edge
    CM_3
    // Both Edges
};
enum ITimer_A.COV_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
enum COV_t {
    COV_OFF,
    COV
};
enum ITimer_A.ID_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
enum ID_t {
    ID_0,
    // Divider - /1
    ID_1,
    // Divider - /2
    ID_2,
    // Divider - /4
    ID_3
    // Divider - /8
};
enum ITimer_A.IVValues
index URL

TA3IV Definitions

XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
enum IVValues {
    TAIV_NONE,
    // No Interrupt pending
    TAIV_TACCR1,
    // TACCR1_CCIFG
    TAIV_TACCR2,
    // TACCR2_CCIFG
    TAIV_6,
    // Reserved
    TAIV_8,
    // Reserved
    TAIV_TAIFG
    // TAIFG
};
enum ITimer_A.MC_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
enum MC_t {
    MC_0,
    // Stop Mode
    MC_1,
    // Up Mode
    MC_2,
    // Continuous Mode
    MC_3
    // Up/Down Mode
};
enum ITimer_A.OUTMOD_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
enum OUTMOD_t {
    OUTMOD_0,
    // PWM output mode: 0 - OUT bit value
    OUTMOD_1,
    // PWM output mode: 1 - Set
    OUTMOD_2,
    // PWM output mode: 2 - PWM toggle/reset
    OUTMOD_3,
    // PWM output mode: 3 - PWM set/reset
    OUTMOD_4,
    // PWM output mode: 4 - Toggle
    OUTMOD_5,
    // PWM output mode: 5 - Reset
    OUTMOD_6,
    // PWM output mode: 6 - PWM toggle/set
    OUTMOD_7
    // PWM output mode: 7 - PWM reset/set
};
enum ITimer_A.OUT_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
enum OUT_t {
    OUT_OFF,
    OUT
};
enum ITimer_A.SCCI_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
enum SCCI_t {
    SCCI_OFF,
    // Latched capture signal (read)
    SCCI
    // Latched capture signal (read)
};
enum ITimer_A.SCS_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
enum SCS_t {
    SCS_OFF,
    // Asynchronous Capture
    SCS
    // Sychronous Capture
};
enum ITimer_A.TACLR_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
enum TACLR_t {
    TACLR_OFF,
    TACLR
};
enum ITimer_A.TAIE_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
enum TAIE_t {
    TAIE_OFF,
    TAIE
};
enum ITimer_A.TAIFG_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
enum TAIFG_t {
    TAIFG_OFF,
    TAIFG
};
enum ITimer_A.TASSEL_t
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
enum TASSEL_t {
    TASSEL_0,
    // TACLK
    TASSEL_1,
    // ACLK
    TASSEL_2,
    // SMCLK
    TASSEL_3
    // INCLK
};
typedef ITimer_A.IPeripheralArray
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
typedef IPeripheral.Instance IPeripheralArray[];
typedef ITimer_A.StringArray
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
typedef String StringArray[];
struct ITimer_A.ForceSetDefaultRegister_t
index URL

Force Set Default Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
metaonly struct ForceSetDefaultRegister_t {
    String register;
    Bool regForceSet;
};
DETAILS
Type to store if each register needs to be forced initialized even if the register is in default state.
SEE
ForceSetDefaultRegister_t
struct ITimer_A.TACCTLx_t
index URL

Capture/Compare Control Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
metaonly struct TACCTLx_t {
    ITimer_A.CM_t CM;
    // Capture mode 00 No capture 01 Capture on rising edge 10 Capture on falling edge 11 Capture on both rising and falling edges
    ITimer_A.CCIS_t CCIS;
    // Capture/compare input select. These bits select the TACCRx input signal. See the device-specific data sheet for specific signal connections. 00 CCIxA 01 CCIxB 10 GND 11 VCC
    ITimer_A.SCS_t SCS;
    // Synchronize capture source. This bit is used to synchronize the capture input signal with the timer clock. 0 Asynchronous capture 1 Synchronous capture
    ITimer_A.SCCI_t SCCI;
    // Synchronized capture/compare input. The selected CCI input signal is latched with the EQUx signal and can be read via this bit
    ITimer_A.CAP_t CAP;
    // Capture mode 0 Compare mode 1 Capture mode
    ITimer_A.OUTMOD_t OUTMOD;
    // Output mode. Modes 2, 3, 6, and 7 are not useful for TACCR0 because EQUx = EQU0. 000 OUT bit value 001 Set 010 Toggle/reset 011 Set/reset 100 Toggle 101 Reset 110 Toggle/set 111 Reset/set
    ITimer_A.CCIE_t CCIE;
    // Capture/compare interrupt enable. This bit enables the interrupt request of the corresponding CCIFG flag. 0 Interrupt disabled 1 Interrupt enabled
    ITimer_A.CCI_t CCI;
    // Capture/compare input. The selected input signal can be read by this bit
    ITimer_A.OUT_t OUT;
    // Output. For output mode 0, this bit directly controls the state of the output. 0 Output low 1 Output high
    ITimer_A.COV_t COV;
    // Capture overflow. This bit indicates a capture overflow occurred. COV must be reset with software. 0 No capture overflow occurred 1 Capture overflow occurred
    ITimer_A.CCIFG_t CCIFG;
    // Capture/compare interrupt flag 0 No interrupt pending 1 Interrupt pending
};
SEE
TACCTLx_t
struct ITimer_A.TACTL_t
index URL

Timer_A Control Register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
metaonly struct TACTL_t {
    ITimer_A.TASSEL_t TASSEL;
    // Timer_A clock source select 00 TACLK 01 ACLK 10 SMCLK 11 INCLK
    ITimer_A.ID_t ID;
    // Input divider. These bits select the divider for the input clock. 00 /1 01 /2 10 /4 11 /8
    ITimer_A.MC_t MC;
    // Mode control. Setting MCx = 00h when Timer_A is not in use conserves power. 00 Stop mode: the timer is halted. 01 Up mode: the timer counts up to TACCR0. 10 Continuous mode: the timer counts up to 0FFFFh. 11 Up/down mode: the timer counts up to TACCR0 then down to 0000h
    ITimer_A.TACLR_t TACLR;
    // Timer_A clear. Setting this bit resets TAR, the clock divider, and the count direction. The TACLR bit is automatically reset and is always read as zero
    ITimer_A.TAIE_t TAIE;
    // Timer_A interrupt enable. This bit enables the TAIFG interrupt request. 0 Interrupt disabled 1 Interrupt enabled
    ITimer_A.TAIFG_t TAIFG;
    // Timer_A interrupt flag 0 No interrupt pending 1 Interrupt pending
};
SEE
TACTL_t
ITimer_A.addPeripheralsMap()  // module-wide
index URL

Create a map of all peripherals available on a device

XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
Void addPeripheralsMap(ICpuDataSheet.Instance cds);
ARGUMENTS
cds — an xdc.platform.ICpuDataSheet instance
DETAILS
The config parameter peripherals is by default undefined in an xdc.platform.ICpuDataSheet instance. This function gathers all instance configuration parameters that are of the type xdc.platform.IPeripheral into the map peripherals.
ITimer_A.getAll()  // module-wide
index URL

Find all peripherals of a certain type

XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
IPeripheral.IPeripheralArray getAll();
DETAILS
The type of the peripherals returned is defined by the type of the caller.
RETURNS
Returns an array of IPeripheral instances
ITimer_A.getRegisters()  // module-wide
index URL

Find all registers defined by the peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
IPeripheral.StringArray getRegisters();
RETURNS
Returns an array of register names
config ITimer_A.INCLK  // instance
index URL

Timer_A INCLK

XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
config Float INCLK = 0;
config ITimer_A.TACLK  // instance
index URL

Timer_A TACLK

XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
config Float TACLK = 0;
config ITimer_A.baseAddr  // instance
index URL

Address of the peripheral's control register

XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
config UInt baseAddr;
DETAILS
A peripheral's registers are commonly accessed through a structure that defines the offsets of a particular register from the lowest address mapped to a peripheral. That lowest address is specified by this parameter.
config ITimer_A.intNum  // instance
index URL

Interrupt source number

XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
config UInt intNum;
config ITimer_A.name  // instance
index URL

Specific peripheral name given by the device

XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
config String name;
DETAILS
Devices can have more than one peripheral of the same type. In such cases, device data sheets give different names to the instances of a same peripheral. For example, the name for a timer module could be TimerA3, and a device that has two such timers can name them TA0 and TA1.
config ITimer_A.owner  // instance
index URL

String specifying the entity that manages the peripheral

XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
config String owner;
Instance Creation
index URL

XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
create(IClock.Instance clock);
// Create an instance-object
ITimer_A.getNumberOfTimers()  // instance
index URL
XDCspec declarations sourced in ti/catalog/msp430/peripherals/timer/ITimer_A.xdc
UChar getNumberOfTimers();
generated on Tue, 24 Aug 2010 15:40:48 GMT