1    /*!
     2     *  ======== Timer_A3 ========
     3     *  MSP430 Timer_A3 timer
     4     */
     5    metaonly module Timer_A3 inherits ITimer_A {
     6    
     7    instance:
     8        /*! TACTL, Timer_A3 Control Register */
     9        config TACTL_t TACTL = {
    10            TASSEL : TASSEL_0,
    11            ID : ID_0,    
    12            MC : MC_0,          
    13            TACLR : TACLR_OFF, 
    14            TAIE : TAIE_OFF,       
    15            TAIFG : TAIFG_OFF
    16        };
    17        
    18        /*! TACCTL0, Capture/Compare Control Register 0 */    
    19        config TACCTLx_t TACCTL0 = {
    20            CM : CM_0,
    21            CCIS : CCIS_0,
    22            SCS : SCS_OFF,
    23            SCCI : SCCI_OFF,
    24            CAP : CAP_OFF,
    25            OUTMOD : OUTMOD_0,
    26            CCIE : CCIE_OFF,
    27            CCI : CCI_OFF,
    28            OUT : OUT_OFF,
    29            COV : COV_OFF,
    30            CCIFG : CCIFG_OFF
    31        };
    32        
    33        /*! TACCTL1, Capture/Compare Control Register 1 */
    34        config TACCTLx_t TACCTL1 = {
    35            CM : CM_0,
    36            CCIS : CCIS_0,
    37            SCS : SCS_OFF,
    38            SCCI : SCCI_OFF,
    39            CAP : CAP_OFF,
    40            OUTMOD : OUTMOD_0,
    41            CCIE : CCIE_OFF,
    42            CCI : CCI_OFF,
    43            OUT : OUT_OFF,
    44            COV : COV_OFF,
    45            CCIFG : CCIFG_OFF
    46        };
    47        
    48        /*! TACCTL2, Capture/Compare Control Register 2 */
    49        config TACCTLx_t TACCTL2 = {
    50            CM : CM_0,
    51            CCIS : CCIS_0,
    52            SCS : SCS_OFF,
    53            SCCI : SCCI_OFF,
    54            CAP : CAP_OFF,
    55            OUTMOD : OUTMOD_0,
    56            CCIE : CCIE_OFF,
    57            CCI : CCI_OFF,
    58            OUT : OUT_OFF,
    59            COV : COV_OFF,
    60            CCIFG : CCIFG_OFF
    61        };
    62        
    63        /*! TACCR0, Timer_A Capture/Compare Register 0 */
    64        config int TACCR0 = 0;
    65        /*! TACCR1, Timer_A Capture/Compare Register 1 */
    66        config int TACCR1 = 0;                         
    67        /*! TACCR2, Timer_A Capture/Compare Register 2 */
    68        config int TACCR2 = 0;
    69    
    70        /*! Determine if each Register needs to be forced set or not */
    71        readonly config ForceSetDefaultRegister_t forceSetDefaultRegister[] =
    72        [
    73            { register : "TACTL"   , regForceSet : false },
    74            { register : "TACCTL0" , regForceSet : false },
    75            { register : "TACCTL1" , regForceSet : false },
    76            { register : "TACCTL2" , regForceSet : false },
    77            { register : "TACCR0"  , regForceSet : false },
    78            { register : "TACCR1"  , regForceSet : false },
    79            { register : "TACCR2"  , regForceSet : false }
    80        ];
    81        
    82        /*!
    83        *  ======== getTimer_A_OUT ========
    84        *  Returns Timer_A OUT in ms rising-edge interval based on a channel input
    85        *
    86        *  This function calculates a time base rising-edge of clock based on
    87        *  clock source, TxCCRx register and OUTMOD settings.
    88        *
    89        *  @see #getTimer_A_OUT
    90        */
    91        Float getTimer_A_OUT(UChar channel);
    92    }