SYSCTL Module

System Control (SysCtl) determines the overall operation of the device. The API provides functions to configure the clocking of the device, the set of peripherals that are enabled, the windowed watchdog, the NMI watchdog, and low-power modes. It also provides functions to handle and obtain information about resets and missing clock detection failures.

group sysctl_api

Defines

SYSCTL_WD_CHKBITS 0x0028U
SYSCTL_WD_ENRSTKEY 0x0055U
SYSCTL_WD_RSTKEY 0x00AAU
SYSCTL_PERIPH_REG_M 0x001FU
SYSCTL_PERIPH_REG_S 0x0000U
SYSCTL_PERIPH_BIT_M 0x1F00U
SYSCTL_PERIPH_BIT_S 0x0008U
SYSCTL_REG_KEY 0xA5A50000U
SYSCTL_PLL_KEY 0XCAFE0000U
SYSCTL_CLBCLKCTL_TILECLKDIV_S 0x4U
SYSCTL_TYPE_LOCK_S 0xFU
SYSCTL_LPM_IDLE 0x0000U
SYSCTL_LPM_STANDBY 0x0001U
SYSCTL_LPM_HALT 0x0002U
SYSCTL_DEFAULT_OSC_FREQ 10000000U
SYSCTL_BOOT_ROM_STATUS 0x0002U
SYSCTL_BOOT_ROM_POR 0x2000U
SYSCTL_BOOT_ROM_XRS 0x1000U
Device_cal ((void (*)(void))((uintptr_t)0x70228))
SYSCTL_SYSDIV_M 0x00003F00U
SYSCTL_SYSDIV_S 8U
SYSCTL_REFDIV_M 0x007C0000U
SYSCTL_REFDIV_S 18U
SYSCTL_ODIV_M (uint32_t)0x0F800000U
SYSCTL_ODIV_S 23U
SYSCTL_REFDIV(x) ((((uint32_t)(x) - 1U) << SYSCTL_REFDIV_S

) & \

SYSCTL_REFDIV_M)

Macro to format Clock divider value. x is a number from 1 to 32.

SYSCTL_ODIV(x) ((((uint32_t)(x) - 1U) << SYSCTL_ODIV_S

) & \

SYSCTL_ODIV_M)

Macro to format Clock divider value. x is a number from 1 to 32.

SYSCTL_SYSDIV(x) ((((x) / 2U) << SYSCTL_SYSDIV_S) & SYSCTL_SYSDIV_M)

Macro to format system clock divider value. x must be 1 or even values up to 126.

SYSCTL_IMULT_M (uint32_t)0x000000FFU
SYSCTL_IMULT_S 0U
SYSCTL_IMULT(x) (((x) << SYSCTL_IMULT_S) & SYSCTL_IMULT_M)

Macro to format integer multiplier value. x is a number from 1 to 127.

SYSCTL_FMULT_M 0x0000C000U
SYSCTL_FMULT_S 14U
SYSCTL_FMULT_NONE 0x00000000U

No fractional multiplier.

SYSCTL_FMULT_0 0x00000000U

No fractional multiplier.

SYSCTL_FMULT_1_4 0x00004000U

Fractional multiplier of 0.25.

SYSCTL_FMULT_1_2 0x00008000U

Fractional multiplier of 0.50.

SYSCTL_FMULT_3_4 0x0000C000U

Fractional multiplier of 0.75.

SYSCTL_DCC_BASE_M (uint32_t)0x30000000U
SYSCTL_DCC_BASE_S 28U
SYSCTL_DCC_BASE_0 0x00000000U

DCC0 module.

SYSCTL_DCC_BASE_1 0x10000000U

DCC1 module.

SYSCTL_DCC_BASE_2 0x20000000U

DCC2 module.

SYSCTL_OSCSRC_M 0x00030000U
SYSCTL_OSCSRC_S 16U
SYSCTL_OSCSRC_OSC2 0x00000000U

Internal oscillator INTOSC2.

SYSCTL_OSCSRC_XTAL 0x00010000U

External oscillator (XTAL) in crystal mode.

SYSCTL_OSCSRC_XTAL_SE 0x00030000U

External oscillator (XTAL) in single-ended mode.

SYSCTL_OSCSRC_OSC1 0x00020000U

Internal oscillator INTOSC1.

SYSCTL_PLL_ENABLE 0x80000000U

Enable PLL.

SYSCTL_PLL_DISABLE 0x00000000U

Disable PLL.

SYSCTL_PLL_BYPASS 0x40000000U

Bypass PLL.

SYSCTL_PLL_CONFIG_M 0xC0000000U
SYSCTL_PLL_RETRIES 100U
SYSCTL_PLLLOCK_TIMEOUT 2000U
SYSCTL_DCC_COUNTER0_TOLERANCE 1U
SYSCTL_DCC_COUNTER0_WINDOW 1000U
SYSCTL_NMI_NMIINT 0x1U

NMI Interrupt Flag.

SYSCTL_NMI_CLOCKFAIL 0x2U

Clock Fail Interrupt Flag.

SYSCTL_NMI_RAMUNCERR 0x4U

RAM Uncorrectable Error NMI Flag.

SYSCTL_NMI_FLUNCERR 0x8U

Flash Uncorrectable Error NMI Flag.

SYSCTL_NMI_CPU1HWBISTERR 0x10U

HW BIST Error NMI Flag.

SYSCTL_NMI_SYSDBGNMI 0x80U

System Debug Module NMI Flag.

SYSCTL_NMI_CLBNMI 0x100U

Reconfigurable Logic NMI Flag.

SYSCTL_NMI_SWERR 0x2000U

SW Error Force NMI Flag.

SYSCTL_NMI_CRC_FAIL 0x4000U

BGCRC calculation failed.

SYSCTL_CAUSE_POR 0x00000001U

Power-on reset.

SYSCTL_CAUSE_XRS 0x00000002U

External reset pin.

SYSCTL_CAUSE_WDRS 0x00000004U

Watchdog reset.

SYSCTL_CAUSE_NMIWDRS 0x00000008U

NMI watchdog reset.

SYSCTL_CAUSE_SCCRESET 0x00000100U

SCCRESETn by DCSM.

SYSCTL_ADCSOC_SRC_PWM1SOCA 0x1U

ePWM1 SOCA for ADCSOCAO

SYSCTL_ADCSOC_SRC_PWM2SOCA 0x2U

ePWM2 SOCA for ADCSOCAO

SYSCTL_ADCSOC_SRC_PWM3SOCA 0x4U

ePWM3 SOCA for ADCSOCAO

SYSCTL_ADCSOC_SRC_PWM4SOCA 0x8U

ePWM4 SOCA for ADCSOCAO

SYSCTL_ADCSOC_SRC_PWM5SOCA 0x10U

ePWM5 SOCA for ADCSOCAO

SYSCTL_ADCSOC_SRC_PWM6SOCA 0x20U

ePWM6 SOCA for ADCSOCAO

SYSCTL_ADCSOC_SRC_PWM7SOCA 0x40U

ePWM7 SOCA for ADCSOCAO

SYSCTL_ADCSOC_SRC_PWM1SOCB 0x10000U

ePWM1 SOCB for ADCSOCBO

SYSCTL_ADCSOC_SRC_PWM2SOCB 0x20000U

ePWM2 SOCB for ADCSOCBO

SYSCTL_ADCSOC_SRC_PWM3SOCB 0x40000U

ePWM3 SOCB for ADCSOCBO

SYSCTL_ADCSOC_SRC_PWM4SOCB 0x80000U

ePWM4 SOCB for ADCSOCBO

SYSCTL_ADCSOC_SRC_PWM5SOCB 0x100000U

ePWM5 SOCB for ADCSOCBO

SYSCTL_ADCSOC_SRC_PWM6SOCB 0x200000U

ePWM6 SOCB for ADCSOCBO

SYSCTL_ADCSOC_SRC_PWM7SOCB 0x400000U

ePWM7 SOCB for ADCSOCBO

Enums

enum SysCtl_PeripheralPCLOCKCR

The following are values that can be passed to SysCtl_enablePeripheral() and SysCtl_disablePeripheral() as the peripheral parameter.

Values:

enumerator SYSCTL_PERIPH_CLK_DMA = 0x0200

DMA clock.

enumerator SYSCTL_PERIPH_CLK_TIMER0 = 0x0300

CPUTIMER0 clock.

enumerator SYSCTL_PERIPH_CLK_TIMER1 = 0x0400

CPUTIMER1 clock.

enumerator SYSCTL_PERIPH_CLK_TIMER2 = 0x0500

CPUTIMER2 clock.

enumerator SYSCTL_PERIPH_CLK_CPUBGCRC = 0x0D00

CPUBGCRC clock.

enumerator SYSCTL_PERIPH_CLK_HRPWM = 0x1000

HRPWM clock.

enumerator SYSCTL_PERIPH_CLK_TBCLKSYNC = 0x1200

TBCLKSYNC clock.

enumerator SYSCTL_PERIPH_CLK_ERAD = 0x1800

ERAD clock.

enumerator SYSCTL_PERIPH_CLK_EPWM1 = 0x0002

EPWM1 clock.

enumerator SYSCTL_PERIPH_CLK_EPWM2 = 0x0102

EPWM2 clock.

enumerator SYSCTL_PERIPH_CLK_EPWM3 = 0x0202

EPWM3 clock.

enumerator SYSCTL_PERIPH_CLK_EPWM4 = 0x0302

EPWM4 clock.

enumerator SYSCTL_PERIPH_CLK_EPWM5 = 0x0402

EPWM5 clock.

enumerator SYSCTL_PERIPH_CLK_EPWM6 = 0x0502

EPWM6 clock.

enumerator SYSCTL_PERIPH_CLK_EPWM7 = 0x0602

EPWM7 clock.

enumerator SYSCTL_PERIPH_CLK_ECAP1 = 0x0003

ECAP1 clock.

enumerator SYSCTL_PERIPH_CLK_ECAP2 = 0x0103

ECAP2 clock.

enumerator SYSCTL_PERIPH_CLK_ECAP3 = 0x0203

ECAP3 clock.

enumerator SYSCTL_PERIPH_CLK_EQEP1 = 0x0004

EQEP1 clock.

enumerator SYSCTL_PERIPH_CLK_EQEP2 = 0x0104

EQEP2 clock.

enumerator SYSCTL_PERIPH_CLK_SCIA = 0x0007

SCI_A clock.

enumerator SYSCTL_PERIPH_CLK_SPIA = 0x0008

SPI_A clock.

enumerator SYSCTL_PERIPH_CLK_SPIB = 0x0108

SPI_B clock.

enumerator SYSCTL_PERIPH_CLK_I2CA = 0x0009

I2C_A clock.

enumerator SYSCTL_PERIPH_CLK_I2CB = 0x0109

I2C_B clock.

enumerator SYSCTL_PERIPH_CLK_CANA = 0x000A

CAN_A clock.

enumerator SYSCTL_PERIPH_CLK_ADCA = 0x000D

ADC_A clock.

enumerator SYSCTL_PERIPH_CLK_ADCC = 0x020D

ADC_C clock.

enumerator SYSCTL_PERIPH_CLK_CMPSS1 = 0x000E

CMPSS1 clock.

enumerator SYSCTL_PERIPH_CLK_CMPSS2 = 0x010E

CMPSS2 clock.

enumerator SYSCTL_PERIPH_CLK_CMPSS3 = 0x020E

CMPSS3 clock.

enumerator SYSCTL_PERIPH_CLK_CMPSS4 = 0x030E

CMPSS4 clock.

enumerator SYSCTL_PERIPH_CLK_CLB1 = 0x0011

CLB1 clock.

enumerator SYSCTL_PERIPH_CLK_CLB2 = 0x0111

CLB2 clock.

enumerator SYSCTL_PERIPH_CLK_FSITXA = 0x0012

FSITX_A clock.

enumerator SYSCTL_PERIPH_CLK_FSIRXA = 0x0112

FSIRX_A clock.

enumerator SYSCTL_PERIPH_CLK_LINA = 0x0013

LIN_A clock.

enumerator SYSCTL_PERIPH_CLK_LINB = 0x0113

LIN_B clock.

enumerator SYSCTL_PERIPH_CLK_PMBUSA = 0x0014

PMBUS_A clock.

enumerator SYSCTL_PERIPH_CLK_DCC0 = 0x0015

DCC0 clock.

enumerator SYSCTL_PERIPH_CLK_DCC1 = 0x0115

DCC1 clock.

enumerator SYSCTL_PERIPH_CLK_MPOST0 = 0x0016

MPOST0 clock.

enumerator SYSCTL_PERIPH_CLK_HICA = 0x0019

HICA clock.

enum SysCtl_PeripheralSOFTPRES

The following are values that can be passed to SysCtl_resetPeripheral() as the peripheral parameter.

Values:

enumerator SYSCTL_PERIPH_RES_CPU1CPUBGCRC = 0x0D00

Reset CPU1_CPUBGCRC clock.

enumerator SYSCTL_PERIPH_RES_CPU1ERAD = 0x1800

Reset CPU1_ERAD clock.

enumerator SYSCTL_PERIPH_RES_EPWM1 = 0x0002

Reset EPWM1 clock.

enumerator SYSCTL_PERIPH_RES_EPWM2 = 0x0102

Reset EPWM2 clock.

enumerator SYSCTL_PERIPH_RES_EPWM3 = 0x0202

Reset EPWM3 clock.

enumerator SYSCTL_PERIPH_RES_EPWM4 = 0x0302

Reset EPWM4 clock.

enumerator SYSCTL_PERIPH_RES_EPWM5 = 0x0402

Reset EPWM5 clock.

enumerator SYSCTL_PERIPH_RES_EPWM6 = 0x0502

Reset EPWM6 clock.

enumerator SYSCTL_PERIPH_RES_EPWM7 = 0x0602

Reset EPWM7 clock.

enumerator SYSCTL_PERIPH_RES_ECAP1 = 0x0003

Reset ECAP1 clock.

enumerator SYSCTL_PERIPH_RES_ECAP2 = 0x0103

Reset ECAP2 clock.

enumerator SYSCTL_PERIPH_RES_ECAP3 = 0x0203

Reset ECAP3 clock.

enumerator SYSCTL_PERIPH_RES_EQEP1 = 0x0004

Reset EQEP1 clock.

enumerator SYSCTL_PERIPH_RES_EQEP2 = 0x0104

Reset EQEP2 clock.

enumerator SYSCTL_PERIPH_RES_SCIA = 0x0007

Reset SCI_A clock.

enumerator SYSCTL_PERIPH_RES_SPIA = 0x0008

Reset SPI_A clock.

enumerator SYSCTL_PERIPH_RES_SPIB = 0x0108

Reset SPI_B clock.

enumerator SYSCTL_PERIPH_RES_I2CA = 0x0009

Reset I2C_A clock.

enumerator SYSCTL_PERIPH_RES_I2CB = 0x0109

Reset I2C_B clock.

enumerator SYSCTL_PERIPH_RES_CANA = 0x000A

Reset CAN_A clock.

enumerator SYSCTL_PERIPH_RES_ADCA = 0x000D

Reset ADC_A clock.

enumerator SYSCTL_PERIPH_RES_ADCC = 0x020D

Reset ADC_C clock.

enumerator SYSCTL_PERIPH_RES_CMPSS1 = 0x000E

Reset CMPSS1 clock.

enumerator SYSCTL_PERIPH_RES_CMPSS2 = 0x010E

Reset CMPSS2 clock.

enumerator SYSCTL_PERIPH_RES_CMPSS3 = 0x020E

Reset CMPSS3 clock.

enumerator SYSCTL_PERIPH_RES_CMPSS4 = 0x030E

Reset CMPSS4 clock.

enumerator SYSCTL_PERIPH_RES_CLB1 = 0x0011

Reset CLB1 clock.

enumerator SYSCTL_PERIPH_RES_CLB2 = 0x0111

Reset CLB2 clock.

enumerator SYSCTL_PERIPH_RES_FSITXA = 0x0012

Reset FSITX_A clock.

enumerator SYSCTL_PERIPH_RES_FSIRXA = 0x0112

Reset FSIRX_A clock.

enumerator SYSCTL_PERIPH_RES_LINA = 0x0013

Reset LIN_A clock.

enumerator SYSCTL_PERIPH_RES_LINB = 0x0113

Reset LIN_B clock.

enumerator SYSCTL_PERIPH_RES_PMBUSA = 0x0014

Reset PMBUS_A clock.

enumerator SYSCTL_PERIPH_RES_DCC0 = 0x0015

Reset DCC0 clock.

enumerator SYSCTL_PERIPH_RES_DCC1 = 0x0115

Reset DCC1 clock.

enumerator SYSCTL_PERIPH_RES_HICA = 0x0019

Reset HIC_A clock.

enum SysCtl_WDPredivider

The following are values that can be passed to SysCtl_setWatchdogPredivider() as the predivider parameter.

Values:

enumerator SYSCTL_WD_PREDIV_2 = 0x800

PREDIVCLK = INTOSC1 / 2.

enumerator SYSCTL_WD_PREDIV_4 = 0x900

PREDIVCLK = INTOSC1 / 4.

enumerator SYSCTL_WD_PREDIV_8 = 0xA00

PREDIVCLK = INTOSC1 / 8.

enumerator SYSCTL_WD_PREDIV_16 = 0xB00

PREDIVCLK = INTOSC1 / 16.

enumerator SYSCTL_WD_PREDIV_32 = 0xC00

PREDIVCLK = INTOSC1 / 32.

enumerator SYSCTL_WD_PREDIV_64 = 0xD00

PREDIVCLK = INTOSC1 / 64.

enumerator SYSCTL_WD_PREDIV_128 = 0xE00

PREDIVCLK = INTOSC1 / 128.

enumerator SYSCTL_WD_PREDIV_256 = 0xF00

PREDIVCLK = INTOSC1 / 256.

enumerator SYSCTL_WD_PREDIV_512 = 0x000

PREDIVCLK = INTOSC1 / 512.

enumerator SYSCTL_WD_PREDIV_1024 = 0x100

PREDIVCLK = INTOSC1 / 1024.

enumerator SYSCTL_WD_PREDIV_2048 = 0x200

PREDIVCLK = INTOSC1 / 2048.

enumerator SYSCTL_WD_PREDIV_4096 = 0x300

PREDIVCLK = INTOSC1 / 4096.

enum SysCtl_WDPrescaler

The following are values that can be passed to SysCtl_setWatchdogPrescaler() as the prescaler parameter.

Values:

enumerator SYSCTL_WD_PRESCALE_1 = 1

WDCLK = PREDIVCLK / 1.

enumerator SYSCTL_WD_PRESCALE_2 = 2

WDCLK = PREDIVCLK / 2.

enumerator SYSCTL_WD_PRESCALE_4 = 3

WDCLK = PREDIVCLK / 4.

enumerator SYSCTL_WD_PRESCALE_8 = 4

WDCLK = PREDIVCLK / 8.

enumerator SYSCTL_WD_PRESCALE_16 = 5

WDCLK = PREDIVCLK / 16.

enumerator SYSCTL_WD_PRESCALE_32 = 6

WDCLK = PREDIVCLK / 32.

enumerator SYSCTL_WD_PRESCALE_64 = 7

WDCLK = PREDIVCLK / 64.

enum SysCtl_WDMode

The following are values that can be passed to SysCtl_setWatchdogMode() as the prescaler parameter.

Values:

enumerator SYSCTL_WD_MODE_RESET

Watchdog can generate a reset signal.

enumerator SYSCTL_WD_MODE_INTERRUPT

Watchdog can generate an interrupt signal; reset signal is disabled.

enum SysCtl_LSPCLKPrescaler

The following are values that can be passed to SysCtl_setLowSpeedClock() as the prescaler parameter.

Values:

enumerator SYSCTL_LSPCLK_PRESCALE_1 = 0

LSPCLK = SYSCLK / 1.

enumerator SYSCTL_LSPCLK_PRESCALE_2 = 1

LSPCLK = SYSCLK / 2.

enumerator SYSCTL_LSPCLK_PRESCALE_4 = 2

LSPCLK = SYSCLK / 4 (default)

enumerator SYSCTL_LSPCLK_PRESCALE_6 = 3

LSPCLK = SYSCLK / 6.

enumerator SYSCTL_LSPCLK_PRESCALE_8 = 4

LSPCLK = SYSCLK / 8.

enumerator SYSCTL_LSPCLK_PRESCALE_10 = 5

LSPCLK = SYSCLK / 10.

enumerator SYSCTL_LSPCLK_PRESCALE_12 = 6

LSPCLK = SYSCLK / 12.

enumerator SYSCTL_LSPCLK_PRESCALE_14 = 7

LSPCLK = SYSCLK / 14.

enum SysCtl_AccessPeripheral

The following are values that can be passed to SysCtl_setPeripheralAccessControl() and SysCtl_getPeripheralAccessControl() as the peripheral parameter.

Values:

enumerator SYSCTL_ACCESS_ADCA = 0x0

ADCA access.

enumerator SYSCTL_ACCESS_ADCC = 0x4

ADCC access.

enumerator SYSCTL_ACCESS_CMPSS1 = 0x10

CMPSS1 access.

enumerator SYSCTL_ACCESS_CMPSS2 = 0x12

CMPSS2 access.

enumerator SYSCTL_ACCESS_CMPSS3 = 0x14

CMPSS3 access.

enumerator SYSCTL_ACCESS_CMPSS4 = 0x16

CMPSS4 access.

enumerator SYSCTL_ACCESS_EPWM1 = 0x48

EPWM1 access.

enumerator SYSCTL_ACCESS_EPWM2 = 0x4A

EPWM2 access.

enumerator SYSCTL_ACCESS_EPWM3 = 0x4C

EPWM3 access.

enumerator SYSCTL_ACCESS_EPWM4 = 0x4E

EPWM4 access.

enumerator SYSCTL_ACCESS_EPWM5 = 0x50

EPWM5 access.

enumerator SYSCTL_ACCESS_EPWM6 = 0x52

EPWM6 access.

enumerator SYSCTL_ACCESS_EPWM7 = 0x54

EPWM7 access.

enumerator SYSCTL_ACCESS_EQEP1 = 0x70

EQEP1 access.

enumerator SYSCTL_ACCESS_EQEP2 = 0x72

EQEP2 access.

enumerator SYSCTL_ACCESS_ECAP1 = 0x80

ECAP1 access.

enumerator SYSCTL_ACCESS_ECAP2 = 0x82

ECAP2 access.

enumerator SYSCTL_ACCESS_ECAP3 = 0x84

ECAP3 access.

enumerator SYSCTL_ACCESS_CLB1 = 0xB0

CLB1 access.

enumerator SYSCTL_ACCESS_CLB2 = 0xB2

CLB2 access.

enumerator SYSCTL_ACCESS_SCIA = 0x100

SCIA access.

enumerator SYSCTL_ACCESS_SPIA = 0x110

SPIA access.

enumerator SYSCTL_ACCESS_SPIB = 0x112

SPIB access.

enumerator SYSCTL_ACCESS_I2CA = 0x120

I2CA access.

enumerator SYSCTL_ACCESS_I2CB = 0x122

I2CB access.

enumerator SYSCTL_ACCESS_PMBUSA = 0x130

PMBUS_A access.

enumerator SYSCTL_ACCESS_LINA = 0x138

LIN_A access.

enumerator SYSCTL_ACCESS_LINB = 0x13A

LIN_B access.

enumerator SYSCTL_ACCESS_CANA = 0x140

DCANA access.

enumerator SYSCTL_ACCESS_FSIATX = 0x158

FSIATX access.

enumerator SYSCTL_ACCESS_FSIARX = 0x15A

FSIARX access.

enumerator SYSCTL_ACCESS_HRPWMA = 0x1AA

HRPWM_A access.

enumerator SYSCTL_ACCESS_HICA = 0x1AC

HIC_A access.

enum SysCtl_AccessMaster

The following are values that can be passed to SysCtl_setPeripheralAccessControl() and SysCtl_getPeripheralAccessControl() as the master parameter.

Values:

enumerator SYSCTL_ACCESS_CPU1 = 0U

CPU access to the peripheral.

enumerator SYSCTL_ACCESS_DMA1 = 4U

DMA access to the peripheral.

enumerator SYSCTL_ACCESS_HICMASTER = 6U

HICA access to the peripheral.

enum SysCtl_AccessPermission

The following are values that can be passed to SysCtl_setPeripheralAccessControl() as the permission parameter.

Values:

enumerator SYSCTL_ACCESS_FULL = 3U

Full Access for both read and write.

enumerator SYSCTL_ACCESS_PROTECTED = 2U

Protected RD access such that FIFOs. Clear on read, registers are not changed and no write access.

enumerator SYSCTL_ACCESS_NONE = 0U

No read or write access.

enum SysCtl_ClockOut

The following are values that can be passed to SysCtl_selectClockOutSource() as the source parameter.

Values:

enumerator SYSCTL_CLOCKOUT_PLLSYS = 0U

PLL System Clock post SYSCLKDIV.

enumerator SYSCTL_CLOCKOUT_PLLRAW = 1U

PLL Raw Clock.

enumerator SYSCTL_CLOCKOUT_SYSCLK = 2U

CPU System Clock.

enumerator SYSCTL_CLOCKOUT_INTOSC1 = 5U

Internal Oscillator 1.

enumerator SYSCTL_CLOCKOUT_INTOSC2 = 6U

Internal Oscillator 2.

enumerator SYSCTL_CLOCKOUT_XTALOSC = 7U

External Oscillator.

enum SysCtl_ExternalOscMode

The following are values that can be passed to SysCtl_setExternalOscMode() as the mode parameter.

Values:

enumerator SYSCTL_XTALMODE_CRYSTAL = 1U

XTAL Oscillator Crystal Mode.

enumerator SYSCTL_XTALMODE_SINGLE = 2U

XTAL Oscillator Single-Ended Mode.

enum SysCtl_SyncOutputSource

The following values define the syncSrc parameter for SysCtl_setSyncOutputConfig().

Values:

enumerator SYSCTL_SYNC_OUT_SRC_EPWM1SYNCOUT = 0X0U

EPWM1SYNCOUT –> EXTSYNCOUT.

enumerator SYSCTL_SYNC_OUT_SRC_EPWM2SYNCOUT = 0X1U

EPWM2SYNCOUT –> EXTSYNCOUT.

enumerator SYSCTL_SYNC_OUT_SRC_EPWM3SYNCOUT = 0X2U

EPWM3SYNCOUT –> EXTSYNCOUT.

enumerator SYSCTL_SYNC_OUT_SRC_EPWM4SYNCOUT = 0X3U

EPWM4SYNCOUT –> EXTSYNCOUT.

enumerator SYSCTL_SYNC_OUT_SRC_EPWM5SYNCOUT = 0X4U

EPWM5SYNCOUT –> EXTSYNCOUT.

enumerator SYSCTL_SYNC_OUT_SRC_EPWM6SYNCOUT = 0X5U

EPWM6SYNCOUT –> EXTSYNCOUT.

enumerator SYSCTL_SYNC_OUT_SRC_EPWM7SYNCOUT = 0X6U

EPWM7SYNCOUT –> EXTSYNCOUT.

enumerator SYSCTL_SYNC_OUT_SRC_ECAP1SYNCOUT = 0x18

ECAP1SYNCOUT –> EXTSYNCOUT.

enumerator SYSCTL_SYNC_OUT_SRC_ECAP2SYNCOUT = 0x19

ECAP2SYNCOUT –> EXTSYNCOUT.

enumerator SYSCTL_SYNC_OUT_SRC_ECAP3SYNCOUT = 0x20

ECAP3SYNCOUT –> EXTSYNCOUT.

enum SysCtl_DeviceParametric

The following values define the parametric parameter for SysCtl_getDeviceParametric().

Values:

enumerator SYSCTL_DEVICE_QUAL

Device Qualification Status.

enumerator SYSCTL_DEVICE_PINCOUNT

Device Pin Count.

enumerator SYSCTL_DEVICE_INSTASPIN

Device InstaSPIN Feature Set.

enumerator SYSCTL_DEVICE_FLASH

Device Flash size (KB)

enumerator SYSCTL_DEVICE_FAMILY

Device Family.

enumerator SYSCTL_DEVICE_PARTNO

Device Part Number.

enumerator SYSCTL_DEVICE_CLASSID

Device Class ID.

enum SysCtl_SelType

The following are values that can be passed to SysCtl_configureType() as the peripheral parameter.

Values:

enumerator SYSCTL_ECAPTYPE = 0x1

Configure ECAP Type for the device.

enum SysCtl_XClkDivider

The following are values that can be passed to SysCtl_setXClk() as divider parameter.

Values:

enumerator SYSCTL_XCLKOUT_DIV_1 = 0

XCLKOUT = XCLKOUT / 1.

enumerator SYSCTL_XCLKOUT_DIV_2 = 1

XCLKOUT = XCLKOUT / 2.

enumerator SYSCTL_XCLKOUT_DIV_4 = 2

XCLKOUT = XCLKOUT / 4.

enumerator SYSCTL_XCLKOUT_DIV_8 = 3

XCLKOUT = XCLKOUT / 8.

enum SysCtl_Cputimer2ClkDivider

The following are values that can be passed to SysCtl_setCputimer2Clk() as divider parameter.

Values:

enumerator SYSCTL_TMR2CLKPRESCALE_1

Cputimer2 clock = Cputimer2 clock / 1.

enumerator SYSCTL_TMR2CLKPRESCALE_2

Cputimer2 clock = Cputimer2 clock / 2.

enumerator SYSCTL_TMR2CLKPRESCALE_4

Cputimer2 clock = Cputimer2 clock / 4.

enumerator SYSCTL_TMR2CLKPRESCALE_8

Cputimer2 clock = Cputimer2 clock / 8.

enumerator SYSCTL_TMR2CLKPRESCALE_16

Cputimer2 clock = Cputimer2 clock / 16.

enum SysCtl_Cputimer2ClkSource

The following are values that can be passed to SysCtl_setCputimer2Clk() as source parameter.

Values:

enumerator SYSCTL_TMR2CLKSRCSEL_SYSCLK = 0U

System Clock.

enumerator SYSCTL_TMR2CLKSRCSEL_INTOSC1 = 1U

Internal Oscillator 1.

enumerator SYSCTL_TMR2CLKSRCSEL_INTOSC2 = 2U

Internal Oscillator 2.

enumerator SYSCTL_TMR2CLKSRCSEL_XTAL = 3U

Crystal oscillator.

enumerator SYSCTL_TMR2CLKSRCSEL_AUXPLLCLK = 6U

Aux PLL CLock.

enum SysCtl_ClkRegSel

The following are values that can be passed to SysCtl_lockClkConfig() as the peripheral parameter.

Values:

enumerator SYSCTL_REG_SEL_CLKSRCCTL1 = 0x0000

CLKSRCCTL1 lock.

enumerator SYSCTL_REG_SEL_CLKSRCCTL2 = 0x0100

CLKSRCCTL2 lock.

enumerator SYSCTL_REG_SEL_CLKSRCCTL3 = 0x0200

CLKSRCCTL3 lock.

enumerator SYSCTL_REG_SEL_SYSPLLCTL1 = 0x0300

SYSPLLCTL1 lock.

enumerator SYSCTL_REG_SEL_SYSPLLMULT = 0x0600

SYSPLLMULT lock.

enumerator SYSCTL_REG_SEL_SYSCLKDIVSEL = 0x0B00

SYSCLKDIVSEL lock.

enumerator SYSCTL_REG_SEL_PERCLKDIVSEL = 0x0D00

PERCLKDIVSEL lock.

enumerator SYSCTL_REG_SEL_CLBCLKCTL = 0x0E00

CLBCLKCTL lock.

enumerator SYSCTL_REG_SEL_LOSPCP = 0x0F00

LOSPCP lock.

enumerator SYSCTL_REG_SEL_XTALCR = 0x1000

XTALCR lock.

enum SysCtl_CpuRegSel

The following are values that can be passed to SysCtl_lockSysConfig() as the peripheral parameter.

Values:

enumerator SYSCTL_REG_SEL_PIEVERRADDR = 0x0200

PIEVERRADDR lock.

enumerator SYSCTL_REG_SEL_PCLKCR0 = 0x0300

PCLKCR0 lock.

enumerator SYSCTL_REG_SEL_PCLKCR2 = 0x0500

PCLKCR2 lock.

enumerator SYSCTL_REG_SEL_PCLKCR3 = 0x0600

PCLKCR3 lock.

enumerator SYSCTL_REG_SEL_PCLKCR4 = 0x0700

PCLKCR4 lock.

enumerator SYSCTL_REG_SEL_PCLKCR7 = 0x0A00

PCLKCR7 lock.

enumerator SYSCTL_REG_SEL_PCLKCR8 = 0x0B00

PCLKCR8 lock.

enumerator SYSCTL_REG_SEL_PCLKCR9 = 0x0C00

PCLKCR9 lock.

enumerator SYSCTL_REG_SEL_PCLKCR10 = 0x0D00

PCLKCR10 lock.

enumerator SYSCTL_REG_SEL_PCLKCR13 = 0x1000

PCLKCR13 lock.

enumerator SYSCTL_REG_SEL_PCLKCR14 = 0x1100

PCLKCR14 lock.

enumerator SYSCTL_REG_SEL_LPMCR = 0x1500

LPMCR lock.

enumerator SYSCTL_REG_SEL_GPIOLPMSEL0 = 0x1600

GPIOLPMSEL0 lock.

enumerator SYSCTL_REG_SEL_GPIOLPMSEL1 = 0x1700

GPIOLPMSEL1 lock.

enumerator SYSCTL_REG_SEL_PCLKCR17 = 0x1800

PCLKCR17 lock.

enumerator SYSCTL_REG_SEL_PCLKCR18 = 0x1900

PCLKCR18 lock.

enumerator SYSCTL_REG_SEL_PCLKCR19 = 0x1A00

PCLKCR19 lock.

enumerator SYSCTL_REG_SEL_PCLKCR20 = 0x1B00

PCLKCR20 lock.

enumerator SYSCTL_REG_SEL_PCLKCR21 = 0x1C00

PCLKCR21 lock.

enumerator SYSCTL_REG_SEL_PCLKCR22 = 0x1D00

PCLKCR22 lock.

enumerator SYSCTL_REG_SEL_PCLKCR24 = 0x1F00

PCLKCR24 lock.

enumerator SYSCTL_REG_SEL_PCLKCR25 = 0x0101

PCLKCR25 lock.

enum SysCtl_CLBClkDivider

The following are values that can be passed to SysCtl_setCLBClk() as cpuInst parameter.

Values:

enumerator SYSCTL_CLBCLKOUT_DIV_1

CLB clock = CLB clock / 1.

enumerator SYSCTL_CLBCLKOUT_DIV_2

CLB clock = CLB clock / 2.

enumerator SYSCTL_CLBCLKOUT_DIV_3

CLB clock = CLB clock / 3.

enumerator SYSCTL_CLBCLKOUT_DIV_4

CLB clock = CLB clock / 4.

enumerator SYSCTL_CLBCLKOUT_DIV_5

CLB clock = CLB clock / 5.

enumerator SYSCTL_CLBCLKOUT_DIV_6

CLB clock = CLB clock / 6.

enumerator SYSCTL_CLBCLKOUT_DIV_7

CLB clock = CLB clock / 7.

enumerator SYSCTL_CLBCLKOUT_DIV_8

CLB clock = CLB clock / 8.

enum SysCtl_CLBTClkDivider

Values:

enumerator SYSCTL_CLBTCLKOUT_DIV_1

CLBTCLKOUT = CLB clock / 1.

enumerator SYSCTL_CLBTCLKOUT_DIV_2

CLBTCLKOUT = CLB clock / 2.

enum SysCtl_CLBInst

Values:

enumerator SYSCTL_CLB1 = 0x10

CLB 1 instance.

enumerator SYSCTL_CLB2 = 0x11

CLB 2 instance.

enum SysCtl_CLBClkm

Values:

enumerator SYSCTL_CLBCLK_SYNC

CLB is synchronous to SYSCLK.

enumerator SYSCTL_CLBCLK_ASYNC

CLB runs of asynchronous clock.

Functions

void SysCtl_deviceCal(void)

Wrapper function for Device_cal function

Return

None.

Parameters

  • None: This is a wrapper function for the Device_cal function available in the OTP memory. The function saves and restores the core registers which are being used by the Device_cal function

void SysCtl_resetPeripheral(SysCtl_PeripheralSOFTPRES peripheral)

Resets a peripheral

This function uses the SOFTPRESx registers to reset a specified peripheral. Module registers will be returned to their reset states.

Parameters

  • peripheral: is the peripheral to reset.

Note

This includes registers containing trim values.The peripheral software reset needed by CPU2 can be communicated to CPU1 via IPC for all shared peripherals.

Return

None.

void SysCtl_enablePeripheral(SysCtl_PeripheralPCLOCKCR peripheral)

Enables a peripheral.

Peripherals are enabled with this function. At power-up, all peripherals are disabled; they must be enabled in order to operate or respond to register reads/writes.

Parameters

  • peripheral: is the peripheral to enable.

Note

Note that there should be atleast 5 cycles delay between enabling the peripheral clock and accessing the peripheral registers. The delay should be added by the user if the peripheral is accessed immediately after this function call. Use asm(” RPT #5 || NOP”); to add 5 cycle delay post this function call.

Return

None.

void SysCtl_disablePeripheral(SysCtl_PeripheralPCLOCKCR peripheral)

Disables a peripheral.

Peripherals are disabled with this function. Once disabled, they will not operate or respond to register reads/writes.

Parameters

  • peripheral: is the peripheral to disable.

Return

None.

void SysCtl_resetDevice(void)

Resets the device.

This function performs a watchdog reset of the device.

Return

This function does not return.

uint32_t SysCtl_getResetCause(void)

Gets the reason for a reset.

This function will return the reason(s) for a reset. Since the reset reasons are sticky until either cleared by software or an external reset, multiple reset reasons may be returned if multiple resets have occurred. The reset reason will be a logical OR of

  • SYSCTL_CAUSE_POR - Power-on reset

  • SYSCTL_CAUSE_XRS - External reset pin

  • SYSCTL_CAUSE_WDRS - Watchdog reset

  • SYSCTL_CAUSE_NMIWDRS - NMI watchdog reset

  • SYSCTL_CAUSE_SCCRESET - SCCRESETn reset from DCSM

Note

If you re-purpose the reserved boot ROM RAM, the POR and XRS reset statuses won’t be accurate.

Return

Returns the reason(s) for a reset.

void SysCtl_clearResetCause(uint32_t rstCauses)

Clears reset reasons.

This function clears the specified sticky reset reasons. Once cleared, another reset for the same reason can be detected, and a reset for a different reason can be distinguished (instead of having two reset causes set). If the reset reason is used by an application, all reset causes should be cleared after they are retrieved with

SysCtl_getResetCause().
Parameters

  • rstCauses: are the reset causes to be cleared; must be a logical OR of SYSCTL_CAUSE_POR, SYSCTL_CAUSE_XRS, SYSCTL_CAUSE_WDRS, SYSCTL_CAUSE_NMIWDRS, and/or SYSCTL_CAUSE_SCCRESET.

Note

Some reset causes are cleared by the boot ROM.

Return

None.

void SysCtl_setLowSpeedClock(SysCtl_LSPCLKPrescaler prescaler)

Sets the low speed peripheral clock rate prescaler.

This function configures the clock rate of the low speed peripherals. The

prescaler parameter is the value by which the SYSCLK rate is divided to get the LSPCLK rate. For example, a prescaler of SYSCTL_LSPCLK_PRESCALE_4 will result in a LSPCLK rate that is a quarter of the SYSCLK rate.
Parameters

  • prescaler: is the LSPCLK rate relative to SYSCLK

Return

None.

void SysCtl_selectClockOutSource(SysCtl_ClockOut source)

Selects a clock source to mux to an external GPIO pin (XCLKOUT).

This function configures the specified clock source to be muxed to an external clock out (XCLKOUT) GPIO pin. The

source parameter may take a value of one of the following values:

  • SYSCTL_CLOCKOUT_PLLSYS

  • SYSCTL_CLOCKOUT_PLLRAW

  • SYSCTL_CLOCKOUT_SYSCLK

  • SYSCTL_CLOCKOUT_INTOSC1

  • SYSCTL_CLOCKOUT_INTOSC2

  • SYSCTL_CLOCKOUT_XTALOSC

Parameters

  • source: is the internal clock source to be configured.

Return

None.

void SysCtl_setExternalOscMode(SysCtl_ExternalOscMode mode)

Set the external oscillator mode.

This function sets the external oscillator mode specified by the

mode parameter which may take one of two values:

  • SYSCTL_XTALMODE_CRYSTAL - Crystal Mode

  • SYSCTL_XTALMODE_SINGLE - Single-Ended Mode

Parameters

  • mode: is the external oscillator mode to be configured.

Note

The external oscillator must be powered off before this configuration can be performed.

Return

None.

uint16_t SysCtl_getExternalOscCounterValue(void)

Gets the external oscillator counter value.

This function returns the X1 clock counter value. When the return value reaches 0x3FF, it freezes. Before switching from INTOSC2 to an external oscillator (XTAL), an application should call this function to make sure the counter is saturated.

Return

Returns the value of the 10-bit X1 clock counter.

void SysCtl_clearExternalOscCounterValue(void)

Clears the external oscillator counter value.

Return

None.

void SysCtl_turnOnOsc(uint32_t oscSource)

Turns on the specified oscillator sources.

This function turns on the oscillator specified by the

oscSource parameter which may take a value of SYSCTL_OSCSRC_XTAL
Parameters

  • oscSource: is the oscillator source to be configured.

Note

SYSCTL_OSCSRC_OSC1 is not a valid value for oscSource.

Return

None.

void SysCtl_turnOffOsc(uint32_t oscSource)

Turns off the specified oscillator sources.

This function turns off the oscillator specified by the

oscSource parameter which may take a value of SYSCTL_OSCSRC_XTAL
Parameters

  • oscSource: is the oscillator source to be configured.

Note

SYSCTL_OSCSRC_OSC1 is not a valid value for oscSource.

Return

None.

void SysCtl_enterIdleMode(void)

Enters IDLE mode.

This function puts the device into IDLE mode. The CPU clock is gated while all peripheral clocks are left running. Any enabled interrupt will wake the CPU up from IDLE mode.

Return

None.

void SysCtl_enterStandbyMode(void)

Enters STANDBY mode.

This function puts the device into STANDBY mode. This will gate both the CPU clock and any peripheral clocks derived from SYSCLK. The watchdog is left active, and an NMI or an optional watchdog interrupt will wake the CPU subsystem from STANDBY mode.

GPIOs may be configured to wake the CPU subsystem. See SysCtl_enableLPMWakeupPin().

The CPU will receive an interrupt (WAKEINT) on wakeup.

Return

None.

void SysCtl_enterHaltMode(void)

Enters HALT mode.

This function puts the device into HALT mode. This will gate almost all systems and clocks and allows for the power-down of oscillators and analog blocks. The watchdog may be left clocked to produce a reset. See SysCtl_enableWatchdogInHalt() to enable this. GPIOs should be configured to wake the CPU subsystem. See SysCtl_enableLPMWakeupPin().

The CPU will receive an interrupt (WAKEINT) on wakeup.

Return

None.

void SysCtl_enableLPMWakeupPin(uint32_t pin)

Enables a pin to wake up the device from the following mode(s):

  • STANDBY

  • HALT

This function connects a pin to the LPM circuit, allowing an event on the pin to wake up the device when when it is in following mode(s):

  • STANDBY

  • HALT

Parameters

  • pin: is the identifying number of the pin.

The pin is specified by its numerical value. For example, GPIO34 is specified by passing 34 as pin. Only GPIOs 0 through 63 are capable of being connected to the LPM circuit.

Return

None.

void SysCtl_disableLPMWakeupPin(uint32_t pin)

Disables a pin to wake up the device from the following mode(s):

  • STANDBY

  • HALT

This function disconnects a pin to the LPM circuit, disallowing an event on the pin to wake up the device when when it is in following mode(s):

  • STANDBY

  • HALT

Parameters

  • pin: is the identifying number of the pin.

The pin is specified by its numerical value. For example, GPIO34 is specified by passing 34 as pin. Only GPIOs 0 through 63 are valid.

Return

None.

void SysCtl_setStandbyQualificationPeriod(uint16_t cycles)

Sets the number of cycles to qualify an input on waking from STANDBY mode.

This function sets the number of OSCCLK clock cycles used to qualify the selected inputs when waking from STANDBY mode. The

cycles parameter should be passed a cycle count between 2 and 65 cycles inclusive.
Parameters

  • cycles: is the number of OSCCLK cycles.

Return

None.

void SysCtl_enableWatchdogStandbyWakeup(void)

Enable the device to wake from STANDBY mode upon a watchdog interrupt.

Note

In order to use this option, you must configure the watchdog to generate an interrupt using SysCtl_setWatchdogMode().

Return

None.

void SysCtl_disableWatchdogStandbyWakeup(void)

Disable the device from waking from STANDBY mode upon a watchdog interrupt.

Return

None.

void SysCtl_enableWatchdogInHalt(void)

Enable the watchdog to run while in HALT mode.

This function configures the watchdog to continue to run while in HALT mode. Additionally, INTOSC1 and INTOSC2 are not powered down when the system enters HALT mode. By default the watchdog is gated when the system enters HALT.

Return

None.

void SysCtl_disableWatchdogInHalt(void)

Disable the watchdog from running while in HALT mode.

This function gates the watchdog when the system enters HALT mode. INTOSC1 and INTOSC2 will be powered down. This is the default behavior of the device.

Return

None.

void SysCtl_setWatchdogMode(SysCtl_WDMode mode)

Configures whether the watchdog generates a reset or an interrupt signal.

This function configures the action taken when the watchdog counter reaches its maximum value. When the

mode parameter is SYSCTL_WD_MODE_INTERRUPT, the watchdog is enabled to generate a watchdog interrupt signal and disables the generation of a reset signal. This will allow the watchdog module to wake up the device from IDLE or STANDBY if desired (see SysCtl_enableWatchdogStandbyWakeup()).
Parameters

  • mode: is a flag to select the watchdog mode.

When the mode parameter is SYSCTL_WD_MODE_RESET, the watchdog will be put into reset mode and generation of a watchdog interrupt signal will be disabled. This is how the watchdog is configured by default.

Note

Check the status of the watchdog interrupt using SysCtl_isWatchdogInterruptActive() before calling this function. If the interrupt is still active, switching from interrupt mode to reset mode will immediately reset the device.

Return

None.

bool SysCtl_isWatchdogInterruptActive(void)

Gets the status of the watchdog interrupt signal.

This function returns the status of the watchdog interrupt signal. If the interrupt is active, this function will return true. If false, the interrupt is NOT active.

Note

Make sure to call this function to ensure that the interrupt is not active before making any changes to the configuration of the watchdog to prevent any unexpected behavior. For instance, switching from interrupt mode to reset mode while the interrupt is active will immediately reset the device.

Return

true if the interrupt is active and false if it is not.

void SysCtl_disableWatchdog(void)

Disables the watchdog.

This function disables the watchdog timer. Note that the watchdog timer is enabled on reset.

Return

None.

void SysCtl_enableWatchdog(void)

Enables the watchdog.

This function enables the watchdog timer. Note that the watchdog timer is enabled on reset.

Return

None.

void SysCtl_serviceWatchdog(void)

Services the watchdog.

This function resets the watchdog.

Return

None.

void SysCtl_enableWatchdogReset(void)

Writes the first key to enter the watchdog reset.

This function writes the first key to enter the watchdog reset.

Return

None.

void SysCtl_resetWatchdog(void)

Writes the second key to reset the watchdog.

This function writes the second key to reset the watchdog.

Return

None.

void SysCtl_setWatchdogPredivider(SysCtl_WDPredivider predivider)

Sets up watchdog clock (WDCLK) pre-divider.

This function sets up the watchdog clock (WDCLK) pre-divider. There are two dividers that scale INTOSC1 to WDCLK. The

predivider parameter divides INTOSC1 down to PREDIVCLK and the prescaler (set by the SysCtl_setWatchdogPrescaler() function) divides PREDIVCLK down to WDCLK.
Parameters

  • predivider: is the value that configures the pre-divider.

Return

None.

void SysCtl_setWatchdogPrescaler(SysCtl_WDPrescaler prescaler)

Sets up watchdog clock (WDCLK) prescaler.

This function sets up the watchdog clock (WDCLK) prescaler. There are two dividers that scale INTOSC1 to WDCLK. The predivider (set with the

SysCtl_setWatchdogPredivider() function) divides INTOSC1 down to PREDIVCLK and the prescaler parameter divides PREDIVCLK down to WDCLK.
Parameters

  • prescaler: is the value that configures the watchdog clock relative to the value from the pre-divider.

Return

None.

uint16_t SysCtl_getWatchdogCounterValue(void)

Gets the watchdog counter value.

Return

Returns the current value of the 8-bit watchdog counter. If this count value overflows, a watchdog output pulse is generated.

bool SysCtl_getWatchdogResetStatus(void)

Gets the watchdog reset status.

This function returns the watchdog reset status. If this function returns true, that indicates that a watchdog reset generated the last reset condition. Otherwise, it was an external device or power-up reset condition.

Return

Returns true if the watchdog generated the last reset condition.

void SysCtl_clearWatchdogResetStatus(void)

Clears the watchdog reset status.

This function clears the watchdog reset status. To check if it was set first, see SysCtl_getWatchdogResetStatus().

Return

None.

void SysCtl_setWatchdogWindowValue(uint16_t value)

Set the minimum threshold value for windowed watchdog

This function sets the minimum threshold value used to define the lower limit of the windowed watchdog functionality.

Parameters

  • value: is the value to set the window threshold

Return

None.

void SysCtl_clearWatchdogOverride(void)

Clears the watchdog override.

This function clears the watchdog override and locks the watchdog timer module to remain in its prior state which could be either enable /disable. The watchdog timer will remain in this state until the next system reset.

Return

None.

void SysCtl_enableNMIGlobalInterrupt(void)

Enable the NMI Global interrupt bit

Note: This bit should be set after the device security related initialization is complete.

Return

None.

bool SysCtl_getNMIStatus(void)

Read NMI interrupts.

Read the current state of NMI interrupt.

Return

true if NMI interrupt is triggered, false if not.

uint16_t SysCtl_getNMIFlagStatus(void)

Read NMI Flags.

Read the current state of individual NMI interrupts

Return

Value of NMIFLG register. These defines are provided to decode the value:

  • SYSCTL_NMI_NMIINT - NMI Interrupt Flag

  • SYSCTL_NMI_CLOCKFAIL - Clock Fail Interrupt Flag

  • SYSCTL_NMI_RAMUNCERR - RAM Uncorrectable Error NMI Flag

  • SYSCTL_NMI_FLUNCERR - Flash Uncorrectable Error NMI Flag

  • SYSCTL_NMI_CPU1HWBISTERR - HW BIST Error NMI Flag

  • SYSCTL_NMI_SYSDBGNMI - System Debug Module NMI Flag

  • SYSCTL_NMI_CLBNMI - Reconfigurable Logic NMI Flag

  • SYSCTL_NMI_SWERR - SW Error Force NMI Flag

  • SYSCTL_NMI_CRC_FAIL - BGCRC calculation failed.

bool SysCtl_isNMIFlagSet(uint32_t nmiFlags)

Check if the individual NMI interrupts are set.

Check if interrupt flags corresponding to the passed in bit mask are asserted.

Parameters

  • nmiFlags: Bit mask of the NMI interrupts that user wants to clear. The bit format of this parameter is same as of the NMIFLG register. These defines are provided:

    • SYSCTL_NMI_NMIINT - NMI Interrupt Flag

    • SYSCTL_NMI_CLOCKFAIL - Clock Fail Interrupt Flag

    • SYSCTL_NMI_RAMUNCERR - RAM Uncorrectable Error NMI Flag

    • SYSCTL_NMI_FLUNCERR - Flash Uncorrectable Error NMI Flag

    • SYSCTL_NMI_CPU1HWBISTERR - HW BIST Error NMI Flag

    • SYSCTL_NMI_SYSDBGNMI - System Debug Module NMI Flag

    • SYSCTL_NMI_CLBNMI - Reconfigurable Logic NMI Flag

    • SYSCTL_NMI_SWERR - SW Error Force NMI Flag

    • SYSCTL_NMI_CRC_FAIL - BGCRC calculation failed.

Return

true if any of the NMI asked for in the parameter bit mask is set. false if none of the NMI requested in the parameter bit mask are set.

void SysCtl_clearNMIStatus(uint32_t nmiFlags)

Function to clear individual NMI interrupts.

Clear NMI interrupt flags that correspond with the passed in bit mask.

Parameters

  • nmiFlags: Bit mask of the NMI interrupts that user wants to clear. The bit format of this parameter is same as of the NMIFLG register. These defines are provided:

    • SYSCTL_NMI_NMIINT - NMI Interrupt Flag

    • SYSCTL_NMI_CLOCKFAIL - Clock Fail Interrupt Flag

    • SYSCTL_NMI_RAMUNCERR - RAM Uncorrectable Error NMI Flag

    • SYSCTL_NMI_FLUNCERR - Flash Uncorrectable Error NMI Flag

    • SYSCTL_NMI_CPU1HWBISTERR - HW BIST Error NMI Flag

    • SYSCTL_NMI_SYSDBGNMI - System Debug Module NMI Flag

    • SYSCTL_NMI_CLBNMI - Reconfigurable Logic NMI Flag

    • SYSCTL_NMI_SWERR - SW Error Force NMI Flag

    • SYSCTL_NMI_CRC_FAIL - BGCRC calculation failed.

Note: The NMI Interrupt flag is always cleared by default and therefore doesn’t have to be included in the bit mask.

Return

None.

void SysCtl_clearAllNMIFlags(void)

Clear all the NMI Flags that are currently set.

Return

None.

void SysCtl_forceNMIFlags(uint32_t nmiFlags)

Function to force individual NMI interrupt fail flags

Return

None.

Parameters

  • nmiFlags: Bit mask of the NMI interrupts that user wants to clear. The bit format of this parameter is same as of the NMIFLG register. These defines are provided:

    • SYSCTL_NMI_NMIINT - NMI Interrupt Flag

    • SYSCTL_NMI_CLOCKFAIL - Clock Fail Interrupt Flag

    • SYSCTL_NMI_RAMUNCERR - RAM Uncorrectable Error NMI Flag

    • SYSCTL_NMI_FLUNCERR - Flash Uncorrectable Error NMI Flag

    • SYSCTL_NMI_CPU1HWBISTERR - HW BIST Error NMI Flag

    • SYSCTL_NMI_SYSDBGNMI - System Debug Module NMI Flag

    • SYSCTL_NMI_CLBNMI - Reconfigurable Logic NMI Flag

    • SYSCTL_NMI_SWERR - SW Error Force NMI Flag

    • SYSCTL_NMI_CRC_FAIL - BGCRC calculation failed.

uint16_t SysCtl_getNMIWatchdogCounter(void)

Gets the NMI watchdog counter value.

Note: The counter is clocked at the SYSCLKOUT rate.

Return

Returns the NMI watchdog counter register’s current value.

void SysCtl_setNMIWatchdogPeriod(uint16_t wdPeriod)

Sets the NMI watchdog period value.

This function writes to the NMI watchdog period register that holds the value to which the NMI watchdog counter is compared. When the two registers match, a reset is generated. By default, the period is 0xFFFF.

Parameters

  • wdPeriod: is the 16-bit value at which a reset is generated.

Note

If a value smaller than the current counter value is passed into the wdPeriod parameter, a NMIRSn will be forced.

Return

None.

uint16_t SysCtl_getNMIWatchdogPeriod(void)

Gets the NMI watchdog period value.

Return

Returns the NMI watchdog period register’s current value.

uint32_t SysCtl_getNMIShadowFlagStatus(void)

Read NMI Shadow Flags.

Read the current state of individual NMI interrupts

Return

Value of NMISHDFLG register. These defines are provided to decode the value:

  • SYSCTL_NMI_NMIINT - NMI Interrupt Flag

  • SYSCTL_NMI_CLOCKFAIL - Clock Fail Interrupt Flag

  • SYSCTL_NMI_RAMUNCERR - RAM Uncorrectable Error NMI Flag

  • SYSCTL_NMI_FLUNCERR - Flash Uncorrectable Error NMI Flag

  • SYSCTL_NMI_CPU1HWBISTERR - HW BIST Error NMI Flag

  • SYSCTL_NMI_SYSDBGNMI - System Debug Module NMI Flag

  • SYSCTL_NMI_CLBNMI - Reconfigurable Logic NMI Flag

  • SYSCTL_NMI_SWERR - SW Error Force NMI Flag

  • SYSCTL_NMI_CRC_FAIL - BGCRC calculation failed.

bool SysCtl_isNMIShadowFlagSet(uint32_t nmiFlags)

Check if the individual NMI shadow flags are set.

Check if interrupt flags corresponding to the passed in bit mask are asserted.

Parameters

  • nmiFlags: Bit mask of the NMI interrupts that user wants to clear. The bit format of this parameter is same as of the NMIFLG register. These defines are provided:

    • SYSCTL_NMI_NMIINT - NMI Interrupt Flag

    • SYSCTL_NMI_CLOCKFAIL - Clock Fail Interrupt Flag

    • SYSCTL_NMI_RAMUNCERR - RAM Uncorrectable Error NMI Flag

    • SYSCTL_NMI_FLUNCERR - Flash Uncorrectable Error NMI Flag

    • SYSCTL_NMI_CPU1HWBISTERR - HW BIST Error NMI Flag

    • SYSCTL_NMI_SYSDBGNMI - System Debug Module NMI Flag

    • SYSCTL_NMI_CLBNMI - Reconfigurable Logic NMI Flag

    • SYSCTL_NMI_SWERR - SW Error Force NMI Flag

    • SYSCTL_NMI_CRC_FAIL - BGCRC calculation failed.

Return

true if any of the NMI asked for in the parameter bit mask is set. false if none of the NMI requested in the parameter bit mask are set.

void SysCtl_enableMCD(void)

Enable the missing clock detection (MCD) Logic

Return

None.

void SysCtl_disableMCD(void)

Disable the missing clock detection (MCD) Logic

Return

None.

bool SysCtl_isMCDClockFailureDetected(void)

Get the missing clock detection Failure Status

Note

A failure means the oscillator clock is missing

Return

Returns true if a failure is detected or false if a failure isn’t detected

void SysCtl_resetMCD(void)

Reset the missing clock detection logic after clock failure

Return

None.

void SysCtl_connectMCDClockSource(void)

Re-connect missing clock detection clock source to stop simulating clock failure

Return

None.

void SysCtl_disconnectMCDClockSource(void)

Disconnect missing clock detection clock source to simulate clock failure. This is for testing the MCD functionality.

Return

None.

void SysCtl_lockAccessControlRegs(void)

Lock the Access Control Registers

This function locks the access control registers and puts them in a read-only state.

Note

Only a reset can unlock the access control registers.

Return

None.

void SysCtl_setPeripheralAccessControl(SysCtl_AccessPeripheral peripheral, SysCtl_AccessMaster master, SysCtl_AccessPermission permission)

Set the peripheral access control permissions

This function sets the specified peripheral access control permissions for the the specified master (CPU1, CLA1, or DMA1)

Parameters

  • peripheral: is the selected peripheral

  • master: is the selected master (CPU1, CLA1, or DMA1)

  • permission: is the selected access permissions

The peripheral parameter can have one enumerated value in the format of SYSCTL_ACCESS_X where X is the name of the peripheral instance to be configured such as SYSCTL_ACCESS_ADCA.

The master parameter can have one the following enumerated values:

  • SYSCTL_ACCESS_CPU1 - CPU1 Master

  • SYSCTL_ACCESS_CLA1 - CLA1 Master

  • SYSCTL_ACCESS_DMA1 - DMA1 Master

The permission parameter can have one the following enumerated values:

  • SYSCTL_ACCESS_FULL - Full Access for both read and write

  • SYSCTL_ACCESS_PROTECTED - Protected read access such that FIFOs, clear on read registers are not changed, and no write access

  • SYSCTL_ACCESS_NONE - No read or write access

Return

None.

uint32_t SysCtl_getPeripheralAccessControl(SysCtl_AccessPeripheral peripheral, SysCtl_AccessMaster master)

Get the peripheral access control permissions

This function gets the specified peripheral access control permissions for the the specified master (CPU1, CLA1, or DMA1)

Parameters

  • peripheral: is the selected peripheral

  • master: is the selected master (CPU1, CLA1, or DMA1)

The peripheral parameter can have one enumerated value in the format of SYSCTL_ACCESS_X where X is the name of the peripheral instance to be configured such as SYSCTL_ACCESS_ADCA.

The master parameter can have one the following enumerated values:

  • SYSCTL_ACCESS_CPU1 - CPU1 Master

  • SYSCTL_ACCESS_CLA1 - CLA1 Master

  • SYSCTL_ACCESS_DMA1 - DMA1 Master

Return

Returns one of the following enumerated permission values:

  • SYSCTL_ACCESS_FULL - Full Access for both read and write

  • SYSCTL_ACCESS_PROTECTED - Protected read access such that FIFOs, clear on read registers are not changed, and no write access

  • SYSCTL_ACCESS_NONE - No read or write access

void SysCtl_setSyncOutputConfig(SysCtl_SyncOutputSource syncSrc)

Configures the sync output source.

This function configures the sync output source from the ePWM modules. The

syncSrc parameter is a value SYSCTL_SYNC_OUT_SRC_XXXX, where XXXX is a sync signal coming from an ePWM such as SYSCTL_SYNC_OUT_SRC_EPWM1SYNCOUT
Parameters

  • syncSrc: is sync output source selection.

Return

None.

void SysCtl_enableExtADCSOCSource(uint32_t adcsocSrc)

Enables ePWM SOC signals to drive an external (off-chip) ADCSOC signal.

This function configures which ePWM SOC signals are enabled as a source for either ADCSOCAO or ADCSOCBO. The

adcsocSrc parameter takes a logical OR of SYSCTL_ADCSOC_SRC_PWMxSOCA/B values that correspond to different signals.
Parameters

  • adcsocSrc: is a bit field of the selected signals to be enabled

Return

None.

void SysCtl_disableExtADCSOCSource(uint32_t adcsocSrc)

Disables ePWM SOC signals from driving an external ADCSOC signal.

This function configures which ePWM SOC signals are disabled as a source for either ADCSOCAO or ADCSOCBO. The

adcsocSrc parameter takes a logical OR of SYSCTL_ADCSOC_SRC_PWMxSOCA/B values that correspond to different signals.
Parameters

  • adcsocSrc: is a bit field of the selected signals to be disabled

Return

None.

void SysCtl_lockExtADCSOCSelect(void)

Locks the SOC Select of the Trig X-BAR.

This function locks the external ADC SOC select of the Trig X-BAR.

Return

None.

void SysCtl_lockSyncSelect(void)

Locks the Sync Select of the Trig X-BAR.

This function locks Sync Input and Output Select of the Trig X-BAR.

Return

None.

uint32_t SysCtl_getDeviceRevision(void)

Get the Device Silicon Revision ID

This function returns the silicon revision ID for the device.

Note

This API is applicable only for the CPU1 subsystem.

Return

Returns the silicon revision ID value.

uint16_t SysCtl_getEfuseError(void)

Gets the error status of the Efuse

The function provides both the Efuse Autoload & the Efuse Self Test Error Status.

Note

This API is applicable only for the CPU1 subsystem.

Return

Fuse Error status.

void SysCtl_setXClk(SysCtl_XClkDivider divider)

Sets up XCLK divider.

This function sets up the XCLK divider. There is only one divider that scales INTOSC1 to XCLK.

Parameters

  • divider: is the value that configures the divider.

The divider parameter can have one enumerated value from SysCtl_XClkDivider

Return

None.

void SysCtl_setPLLSysClk(uint16_t divider)

Sets up PLLSYSCLK divider.

This function sets up the PLLSYSCLK divider. There is only one divider that scales PLLSYSCLK to generate the system clock.

Parameters

  • divider: is the value that configures the divider.

The divider parameter can have one value from the set below: 0x0 = /1 0x1 = /2 0x2 = /4 (default on reset) 0x3 = /6 0x4 = /8 …… 0x3F =/126

Return

None.

Note

Please make sure to check if the PLL is locked and valid using the SysCtl_isPLLValid() before setting the divider.

void SysCtl_setCputimer2Clk(SysCtl_Cputimer2ClkDivider divider, SysCtl_Cputimer2ClkSource source)

Sets up CPU Timer 2 CLK source & divider.

This function sets up the CPU Timer 2 CLK divider based on the source that is selected. There is only one divider that scales the “source” to CPU Timer 2 CLK.

Parameters

  • divider: is the value that configures the divider.

  • source: is the source for the clock divider

The divider parameter can have one enumerated value from SysCtl_Cputimer2ClkDivider The source parameter can have one enumerated value from SysCtl_Cputimer2ClkSource

Return

None.

uint32_t SysCtl_getPIEVErrAddr(void)

Gets the PIE Vector Fetch Error Handler Routine Address.

The function indicates the address of the PIE Vector Fetch Error handler routine.

Return

Error Handler Address.

Note

Its the responsibility of user to initialize this register. If this register is not initialized, a default error handler at address 0x3fffbe will get executed.

void SysCtl_simulateReset(uint32_t rstCauses)

Simulates a reset to the CPU1

The

rstCauses parameter can be one/ more of these values: SYSCTL_CAUSE_CPU1RSN or SYSCTL_CAUSE_XRS
Parameters

  • rstCauses: is the cause for the reset.

Return

None.

Note

This API exists only on CPU1

void SysCtl_setCLBClk(SysCtl_CLBClkDivider divider, SysCtl_CLBTClkDivider tdivider, SysCtl_CLBInst inst, SysCtl_CLBClkm config)

Sets up CLB CLK dividers & configurations for a particuler CLB.

This function sets up the CLB CLK configurations based on the instance that is selected. There are 2 dividers that scales the “source” to CLB CLK. The first one is the divider & the other the tile divider.

Parameters

  • divider: is the value that configures the clock divider.

  • tdivider: is the value that configures the tile clock divider.

  • inst: is the CLB instance that needs clock settings.

  • config: is the mode for the clock

The divider parameter can have one enumerated value from SysCtl_CLBClkDivider The tdivider parameter can have one enumerated value from SysCtl_CLBTClkDivider The inst parameter can have one enumerated value from SysCtl_CLBInst The config parameter can have one enumerated value from SysCtl_CLBClkm

Return

None.

uint16_t SysCtl_isErrorTriggered(void)

Check if One or more of the error sources triggered

Following are the events/triggers that can indicate an error:

  1. nmi interrupt on C28x

  2. Watchdog reset

  3. Error on a Pie vector fetch

  4. Efuse error

  5. nmi interrupt on CM

    Return

    true if the error is triggered false if the error is not triggered

uint16_t SysCtl_getErrorPinStatus(void)

Check if Error status pin is high or not

Return

true if the error status pin is high false if the error status pin is low

void SysCtl_forceError(void)

Forces an error flag to set to indicate an error being generated.

Return

None.

void SysCtl_clearError(void)

Clears any error flag set due to error generated.

Return

None.

void SysCtl_selectErrPinPolarity(uint16_t pol)

Selects the polarity of the error pin

The

pol parameter can take any of the below values: 0x0U: If an error is already triggered, Error pin will be driven with a value of 0, else 1. 0x1U: If an error is already triggered, Error pin will be driven with a value of 1, else 0.
Parameters

  • pol: is the ERROR pin polarity

Return

None.

void SysCtl_lockErrControl(void)

Locks the Error control registers

This function locks the Error configuration registers.

Return

None.

Note

The lock register is cleared only on a system reset.

void SysCtl_delay(uint32_t count)

Delays for a fixed number of cycles.

This function generates a constant length delay using assembly code. The loop takes 5 cycles per iteration plus 9 cycles of overhead.

Parameters

  • count: is the number of delay loop iterations to perform.

Note

If count is equal to zero, the loop will underflow and run for a very long time.

Return

None.

uint32_t SysCtl_getClock(uint32_t clockInHz)

Calculates the system clock frequency (SYSCLK).

This function determines the frequency of the system clock based on the frequency of the oscillator clock source (from

clockInHz) and the PLL and clock divider configuration registers.
Parameters

  • clockInHz: is the frequency of the oscillator clock source (OSCCLK).

Return

Returns the system clock frequency. If a missing clock is detected, the function will return the INTOSC1 frequency. This needs to be corrected and cleared (see SysCtl_resetMCD()) before trying to call this function again.

bool SysCtl_setClock(uint32_t config)

Configures the clocking of the device.

This function configures the clocking of the device. The input crystal frequency, oscillator to be used, use of the PLL, and the system clock divider are all configured with this function.

Parameters

  • config: is the required configuration of the device clocking.

The config parameter is the OR of several different values, many of which are grouped into sets where only one can be chosen.

  • The system clock divider is chosen with the macro SYSCTL_SYSDIV(x) where x is either 1 or an even value up to 126.

  • The use of the PLL is chosen with ONLY one of the below modes: SYSCTL_PLL_ENABLE - This is to Enable the PLL Clock to the System or SYSCTL_PLL_BYPASS -This is to Bypass the PLLCLK from the System, this will also power up the PLL if the user desires to power up the PLL but not use it for System. or SYSCTL_PLL_DISABLE-This is to Power Down the PLL and Bypass the PLLCLK to the System.

  • The integer multiplier is chosen SYSCTL_IMULT(x) where x is a value from 1 to 127.

  • The oscillator source chosen with SYSCTL_OSCSRC_OSC2, SYSCTL_OSCSRC_XTAL, SYSCTL_OSCSRC_XTAL_SE or SYSCTL_OSCSRC_OSC1.

This function uses the DCC to check that the PLLRAWCLK is running at the expected rate. If you are using the DCC, you must back up its configuration before calling this function and restore it afterward. Locking PLL sequence is only done if the multipliers are updated.

Note

See your device errata for more details about locking the PLL.

Return

Returns false if a missing clock error is detected. This needs to be cleared (see SysCtl_resetMCD()) before trying to call this function again. Also, returns false if the PLLRAWCLK is not running and its expected rate. Otherwise, returns true.

bool SysCtl_isPLLValid(uint32_t base, uint32_t oscSource, uint32_t pllMultDiv)

Validates PLL Raw Clock Frequency (PLLRAWCLK)

This function uses DCC module to validate the PLL clock frequency. It uses oscSource as a reference clock for DCC, and PLL is used as clock under test. As long as the Counter0 (running of oscSource) & Counter1 (running of PLL) expire at the same time, DCC will not generate an Error. This function gives 100 attempts for PLL to lock and make sure frequency is as expected.

Parameters

  • base: is the DCC module base address

  • oscSource: is the Clock Source for the PLL that is also used for DCC

  • pllMultDiv: has the PLL Multiplier Register configuration which include integer multiplier and divider values used to configure the DCC Counter1 clock

  • The oscSource parameter is the oscillator source chosen with SYSCTL_OSCSRC_OSC2, SYSCTL_OSCSRC_XTAL, SYSCTL_OSCSRC_XTAL_SE or SYSCTL_OSCSRC_OSC1.

  • The pllMultDiv parameter is a bitwise OR of SYSCTL_IMULT(x) where x is a value from 1 to 127 and both of the following divider values which is chosen with the macro SYSCTL_REFDIV(x) and SYSCTL_ODIV(x) where x is a value from 1 to 32 and can be different for both macros.

    Return

    Returns true if the DCCSTATUS error flag is not set. Otherwise, returns false.

Note

This function does not validate if PLL output frequency (PLLRAWCLK) is within the operating range as per the datasheet.

void SysCtl_selectXTAL(void)

Configures the external oscillator for the clocking of the device.

This function configures the external oscillator (XTAL) to be used for the clocking of the device in crystal mode. It follows the procedure to turn on the oscillator, wait for it to power up, and select it as the source of the system clock.

Please note that this function blocks while it waits for the XTAL to power up. If the XTAL does not manage to power up properly, the function will loop for a long time. It is recommended that you modify this function to add an appropriate timeout and error-handling procedure.

Return

None.

void SysCtl_selectXTALSingleEnded(void)

Configures the external oscillator for the clocking of the device in single-ended mode.

This function configures the external oscillator (XTAL) to be used for the clocking of the device in single-ended mode. It follows the procedure to turn on the oscillator, wait for it to power up, and select it as the source of the system clock.

Please note that this function blocks while it waits for the XTAL to power up. If the XTAL does not manage to power up properly, the function will loop for a long time. It is recommended that you modify this function to add an appropriate timeout and error-handling procedure.

Return

None.

void SysCtl_selectOscSource(uint32_t oscSource)

Selects the oscillator to be used for the clocking of the device.

This function configures the oscillator to be used in the clocking of the device. The

oscSource parameter may take a value of SYSCTL_OSCSRC_OSC2, SYSCTL_OSCSRC_XTAL, SYSCTL_OSCSRC_XTAL_SE, or SYSCTL_OSCSRC_OSC1.
Parameters

  • oscSource: is the oscillator source to be configured.

See

SysCtl_turnOnOsc()

Return

None.

uint32_t SysCtl_getLowSpeedClock(uint32_t clockInHz)

Calculates the low-speed peripheral clock frequency (LSPCLK).

This function determines the frequency of the low-speed peripheral clock based on the frequency of the oscillator clock source (from

clockInHz) and the PLL and clock divider configuration registers.
Parameters

  • clockInHz: is the frequency of the oscillator clock source (OSCCLK).

Return

Returns the low-speed peripheral clock frequency.

uint16_t SysCtl_getDeviceParametric(SysCtl_DeviceParametric parametric)

Get the device part parametric value

This function gets the device part parametric value.

Parameters

  • parametric: is the requested device parametric value

The parametric parameter can have one the following enumerated values:

  • SYSCTL_DEVICE_QUAL - Device Qualification Status

  • SYSCTL_DEVICE_PINCOUNT - Device Pin Count

  • SYSCTL_DEVICE_INSTASPIN - Device InstaSPIN Feature Set

  • SYSCTL_DEVICE_FLASH - Device Flash size (KB)

  • SYSCTL_DEVICE_FAMILY - Device Family

  • SYSCTL_DEVICE_PARTNO - Device Part Number

  • SYSCTL_DEVICE_CLASSID - Device Class ID

Note

This API is applicable only for the CPU1 subsystem.

Return

Returns the specified parametric value.

void SysCtl_configureType(SysCtl_SelType type, uint16_t config, uint16_t lock)

Configures & locks/unlocks the peripheral type

The

type parameter can be a value from the enumeration SysCtl_SelType The config parameter can be a value from the ones below: 0x0U : disables the feature for the type. 0x1U : enables the feature for the type.
Parameters

  • type: is the peripheral type that needs to be configured.

  • config: is the configuration done to the peripheral which is dependent on the peripheral type.

  • lock: is to decide if writes for any further configuration is to be allowed or not.

For ECAP: ECAP registers are EALLOW protected or not.

The lock parameter can be a value from the ones below: 0x1U : Write for any further configuration is not allowed. 0x0U : Write for any further configuration is allowed.

Note

This API is applicable only for the CPU1 subsystem.

Return

None.

bool SysCtl_isConfigTypeLocked(SysCtl_SelType type)

Check if writes for any further configuration of peripheral types is to be allowed or not.

Note

This API is applicable only for the CPU1 subsystem.

Return

true if Write for any further configuration is not allowed. false if Write for any further configuration is allowed.

Parameters

  • type: is the peripheral type for which permissions are being checked

void SysCtl_lockClkConfig(SysCtl_ClkRegSel registerName)

Locks the Clock configuration registers

The

registerName parameter can be a value from the enumeration SysCtl_ClkRegSel
Parameters

  • registerName: is clock configuration register which needs to be locked.

Return

None.

Note

The register is unlocked only on a system reset.

void SysCtl_lockSysConfig(SysCtl_CpuRegSel registerName)

Locks the CPU system configuration registers

The

registerName parameter can be a value from the enumeration SysCtl_CpuRegSel
Parameters

  • registerName: is CPU system configuration register which needs to be locked.

Return

None.

Note

The register is unlocked only on a system reset.

Many of the functions provided by the SysCtl API are related to device clocking. The most important of these functions is SysCtl_setClock() which will configure which oscillator is to be used, configure the PLL, and configure the system clock divider. SysCtl_getClock() is a complementary function to this one that will, given the frequency of the oscillator source used, read back the configuration of the PLL and clock divider and calculate the system clock frequency. A similar pair of functions is provided for the low-speed peripheral clock, SysCtl_setLowSpeedClock() and SysCtl_getLowSpeedClock().

The ability to enable (turn on the module clock), disable (gate off the module clock), and perform a software reset on most of the peripherals on a device is provided by SysCtl_enablePeripheral(), SysCtl_disablePeripheral(), and SysCtl_resetPeripheral() respectively.

The device’s windowed watchdog is enabled and disabled by SysCtl_enableWatchdog() and SysCtl_disableWatchdog() respectively. The watchdog can be serviced by SysCtl_serviceWatchdog(). Several functions are also provided to configure the watchdog’s clock and windowed functionality.

This section will give further details of these functions and each of the others used for the configuration of SysCtl.

The code for this module is contained in driverlib/sysctl.c, with driverlib/sysctl.h containing the API declarations for use by applications.