SPI Module¶

The serial peripheral interface (SPI) API provides a set of functions to configure the device’s SPI module. Functions are provided to initialize the module, to send and receive data, to obtain status information, and to manage interrupts. Both master and slave modes are supported.

group spi_api

This module is used for SPI configurations.

Defines

SPI_INT_RX_OVERRUN 0x0001U¶: Receive overrun interrupt.

SPI_INT_RX_DATA_TX_EMPTY 0x0002U¶: Data received, transmit empty.

SPI_INT_RXFF 0x0004U¶: RX FIFO level interrupt.

SPI_INT_TXFF 0x0008U¶: TX FIFO level interrupt.

SPI_INT_RXFF_OVERFLOW 0x0010U¶: RX FIFO overflow.

Enums

enum SPI_TransferProtocol¶

Values that can be passed to SPI_setConfig() as the protocol parameter.

Values:

enumerator SPI_PROT_POL0PHA0 = 0x0000U¶: Mode 0. Polarity 0, phase 0. Rising edge without delay.

enumerator SPI_PROT_POL0PHA1 = 0x0002U¶: Mode 1. Polarity 0, phase 1. Rising edge with delay.

enumerator SPI_PROT_POL1PHA0 = 0x0001U¶: Mode 2. Polarity 1, phase 0. Falling edge without delay.

enumerator SPI_PROT_POL1PHA1 = 0x0003U¶: Mode 3. Polarity 1, phase 1. Falling edge with delay.

enum SPI_Mode¶

Values that can be passed to SPI_setConfig() as the mode parameter.

Values:

enumerator SPI_MODE_SLAVE = 0x0002U¶: SPI slave.

enumerator SPI_MODE_MASTER = 0x0006U¶: SPI master.

enumerator SPI_MODE_SLAVE_OD = 0x0000U¶: SPI slave w/ output (TALK) disabled.

enumerator SPI_MODE_MASTER_OD = 0x0004U¶: SPI master w/ output (TALK) disabled.

enum SPI_TxFIFOLevel¶

Values that can be passed to SPI_setFIFOInterruptLevel() as the txLevel parameter, returned by SPI_getFIFOInterruptLevel() in the txLevel parameter, and returned by SPI_getTxFIFOStatus().

Values:

enumerator SPI_FIFO_TXEMPTY = 0x0000U¶: Transmit FIFO empty.

enumerator SPI_FIFO_TX0 = 0x0000U¶: Transmit FIFO empty.

enumerator SPI_FIFO_TX1 = 0x0001U¶: Transmit FIFO 1/16 full.

enumerator SPI_FIFO_TX2 = 0x0002U¶: Transmit FIFO 2/16 full.

enumerator SPI_FIFO_TX3 = 0x0003U¶: Transmit FIFO 3/16 full.

enumerator SPI_FIFO_TX4 = 0x0004U¶: Transmit FIFO 4/16 full.

enumerator SPI_FIFO_TX5 = 0x0005U¶: Transmit FIFO 5/16 full.

enumerator SPI_FIFO_TX6 = 0x0006U¶: Transmit FIFO 6/16 full.

enumerator SPI_FIFO_TX7 = 0x0007U¶: Transmit FIFO 7/16 full.

enumerator SPI_FIFO_TX8 = 0x0008U¶: Transmit FIFO 8/16 full.

enumerator SPI_FIFO_TX9 = 0x0009U¶: Transmit FIFO 9/16 full.

enumerator SPI_FIFO_TX10 = 0x000AU¶: Transmit FIFO 10/16 full.

enumerator SPI_FIFO_TX11 = 0x000BU¶: Transmit FIFO 11/16 full.

enumerator SPI_FIFO_TX12 = 0x000CU¶: Transmit FIFO 12/16 full.

enumerator SPI_FIFO_TX13 = 0x000DU¶: Transmit FIFO 13/16 full.

enumerator SPI_FIFO_TX14 = 0x000EU¶: Transmit FIFO 14/16 full.

enumerator SPI_FIFO_TX15 = 0x000FU¶: Transmit FIFO 15/16 full.

enumerator SPI_FIFO_TX16 = 0x0010U¶: Transmit FIFO full.

enumerator SPI_FIFO_TXFULL = 0x0010U¶: Transmit FIFO full.

enum SPI_RxFIFOLevel¶

Values that can be passed to SPI_setFIFOInterruptLevel() as the rxLevel parameter, returned by SPI_getFIFOInterruptLevel() in the rxLevel parameter, and returned by SPI_getRxFIFOStatus().

Values:

enumerator SPI_FIFO_RXEMPTY = 0x0000U¶: Receive FIFO empty.

enumerator SPI_FIFO_RX0 = 0x0000U¶: Receive FIFO empty.

enumerator SPI_FIFO_RX1 = 0x0001U¶: Receive FIFO 1/16 full.

enumerator SPI_FIFO_RX2 = 0x0002U¶: Receive FIFO 2/16 full.

enumerator SPI_FIFO_RX3 = 0x0003U¶: Receive FIFO 3/16 full.

enumerator SPI_FIFO_RX4 = 0x0004U¶: Receive FIFO 4/16 full.

enumerator SPI_FIFO_RX5 = 0x0005U¶: Receive FIFO 5/16 full.

enumerator SPI_FIFO_RX6 = 0x0006U¶: Receive FIFO 6/16 full.

enumerator SPI_FIFO_RX7 = 0x0007U¶: Receive FIFO 7/16 full.

enumerator SPI_FIFO_RX8 = 0x0008U¶: Receive FIFO 8/16 full.

enumerator SPI_FIFO_RX9 = 0x0009U¶: Receive FIFO 9/16 full.

enumerator SPI_FIFO_RX10 = 0x000AU¶: Receive FIFO 10/16 full.

enumerator SPI_FIFO_RX11 = 0x000BU¶: Receive FIFO 11/16 full.

enumerator SPI_FIFO_RX12 = 0x000CU¶: Receive FIFO 12/16 full.

enumerator SPI_FIFO_RX13 = 0x000DU¶: Receive FIFO 13/16 full.

enumerator SPI_FIFO_RX14 = 0x000EU¶: Receive FIFO 14/16 full.

enumerator SPI_FIFO_RX15 = 0x000FU¶: Receive FIFO 15/16 full.

enumerator SPI_FIFO_RX16 = 0x0010U¶: Receive FIFO full.

enumerator SPI_FIFO_RXFULL = 0x0010U¶: Receive FIFO full.

enumerator SPI_FIFO_RXDEFAULT = 0x001FU¶: To prevent interrupt at reset.

enum SPI_EmulationMode¶

Values that can be passed to SPI_setEmulationMode() as the mode parameter.

Values:

enumerator SPI_EMULATION_STOP_MIDWAY = 0x0000U¶: Transmission stops after midway in the bit stream.

enumerator SPI_EMULATION_FREE_RUN = 0x0010U¶: Continue SPI operation regardless.

enumerator SPI_EMULATION_STOP_AFTER_TRANSMIT = 0x0020U¶: Transmission will stop after a started transmission completes.

enum SPI_STEPolarity¶

Values that can be passed to SPI_setSTESignalPolarity() as the polarity parameter.

Values:

enumerator SPI_STE_ACTIVE_LOW = 0x0000U¶: SPISTE is active low (normal)

enumerator SPI_STE_ACTIVE_HIGH = 0x2U¶: SPISTE is active high (inverted)

Functions

void SPI_enableModule(uint32_t base)¶

Enables the serial peripheral interface.

This function enables operation of the serial peripheral interface. The serial peripheral interface must be configured before it is enabled.

Parameters

base: specifies the SPI module base address.

Return: None.

void SPI_disableModule(uint32_t base)¶

Disables the serial peripheral interface.

This function disables operation of the serial peripheral interface. Call this function before doing any configuration.

Parameters

base: specifies the SPI module base address.

Return: None.

void SPI_enableFIFO(uint32_t base)¶

Enables the transmit and receive FIFOs.

This functions enables the transmit and receive FIFOs in the SPI.

Parameters

base: is the base address of the SPI port.

Return: None.

void SPI_disableFIFO(uint32_t base)¶

Disables the transmit and receive FIFOs.

This functions disables the transmit and receive FIFOs in the SPI.

Parameters

base: is the base address of the SPI port.

Return: None.

void SPI_resetTxFIFO(uint32_t base)¶

Resets the transmit FIFO.

This function resets the transmit FIFO, setting the FIFO pointer back to zero.

Parameters

base: is the base address of the SPI port.

Return: None.

void SPI_resetRxFIFO(uint32_t base)¶

Resets the receive FIFO.

This function resets the receive FIFO, setting the FIFO pointer back to zero.

Parameters

base: is the base address of the SPI port.

Return: None.

void SPI_setFIFOInterruptLevel(uint32_t base, SPI_TxFIFOLevel txLevel, SPI_RxFIFOLevel rxLevel)¶

Sets the FIFO level at which interrupts are generated.

This function sets the FIFO level at which transmit and receive interrupts are generated.

Parameters

base: is the base address of the SPI port.
txLevel: is the transmit FIFO interrupt level, specified as SPI_FIFO_TX0, SPI_FIFO_TX1, SPI_FIFO_TX2, … or SPI_FIFO_TX16.
rxLevel: is the receive FIFO interrupt level, specified as SPI_FIFO_RX0, SPI_FIFO_RX1, SPI_FIFO_RX2, … or SPI_FIFO_RX16.

Return: None.

void SPI_getFIFOInterruptLevel(uint32_t base, SPI_TxFIFOLevel *txLevel, SPI_RxFIFOLevel *rxLevel)¶

Gets the FIFO level at which interrupts are generated.

This function gets the FIFO level at which transmit and receive interrupts are generated.

Parameters

base: is the base address of the SPI port.
txLevel: is a pointer to storage for the transmit FIFO level, returned as one of SPI_FIFO_TX0, SPI_FIFO_TX1, SPI_FIFO_TX2, … or SPI_FIFO_TX16.
rxLevel: is a pointer to storage for the receive FIFO level, returned as one of SPI_FIFO_RX0, SPI_FIFO_RX1, SPI_FIFO_RX2, … or SPI_FIFO_RX16.

Return: None.

SPI_TxFIFOLevel SPI_getTxFIFOStatus(uint32_t base)¶

Get the transmit FIFO status

This function gets the current number of words in the transmit FIFO.

Parameters

base: is the base address of the SPI port.

Return: Returns the current number of words in the transmit FIFO specified as one of the following: SPI_FIFO_TX0, SPI_FIFO_TX1, SPI_FIFO_TX2, SPI_FIFO_TX3, …, or SPI_FIFO_TX16

SPI_RxFIFOLevel SPI_getRxFIFOStatus(uint32_t base)¶

Get the receive FIFO status

This function gets the current number of words in the receive FIFO.

Parameters

base: is the base address of the SPI port.

Return: Returns the current number of words in the receive FIFO specified as one of the following: SPI_FIFO_RX0, SPI_FIFO_RX1, SPI_FIFO_RX2, SPI_FIFO_RX3, …, or SPI_FIFO_RX16

bool SPI_isBusy(uint32_t base)¶

Determines whether the SPI transmitter is busy or not.

This function allows the caller to determine whether all transmitted bytes have cleared the transmitter hardware. If

false is returned, then the transmit FIFO is empty and all bits of the last transmitted word have left the hardware shift register. This function is only valid when operating in FIFO mode.

Parameters

base: is the base address of the SPI port.

Return: Returns true if the SPI is transmitting or false if all transmissions are complete.

void SPI_writeDataNonBlocking(uint32_t base, uint16_t data)¶

Puts a data element into the SPI transmit buffer.

This function places the supplied data into the transmit buffer of the specified SPI module.

Parameters

base: specifies the SPI module base address.
data: is the left-justified data to be transmitted over SPI.

Note: The data being sent must be left-justified in data. The lower 16 - N bits will be discarded where N is the data width selected in SPI_setConfig(). For example, if configured for a 6-bit data width, the lower 10 bits of data will be discarded.
Return: None.

uint16_t SPI_readDataNonBlocking(uint32_t base)¶

Gets a data element from the SPI receive buffer.

This function gets received data from the receive buffer of the specified SPI module and returns it.

Parameters

base: specifies the SPI module base address.

Note: Only the lower N bits of the value written to data contain valid data, where N is the data width as configured by SPI_setConfig(). For example, if the interface is configured for 8-bit data width, only the lower 8 bits of the value written to data contain valid data.
Return: Returns the word of data read from the SPI receive buffer.

void SPI_writeDataBlockingFIFO(uint32_t base, uint16_t data)¶

Waits for space in the FIFO and then puts data into the transmit buffer.

This function places the supplied data into the transmit buffer of the specified SPI module once space is available in the transmit FIFO. This function should only be used when the FIFO is enabled.

Parameters

base: specifies the SPI module base address.
data: is the left-justified data to be transmitted over SPI.

Note: The data being sent must be left-justified in data. The lower 16 - N bits will be discarded where N is the data width selected in SPI_setConfig(). For example, if configured for a 6-bit data width, the lower 10 bits of data will be discarded.
Return: None.

uint16_t SPI_readDataBlockingFIFO(uint32_t base)¶

Waits for data in the FIFO and then reads it from the receive buffer.

This function waits until there is data in the receive FIFO and then reads received data from the receive buffer. This function should only be used when FIFO mode is enabled.

Parameters

base: specifies the SPI module base address.

Note: Only the lower N bits of the value written to data contain valid data, where N is the data width as configured by SPI_setConfig(). For example, if the interface is configured for 8-bit data width, only the lower 8 bits of the value written to data contain valid data.
Return: Returns the word of data read from the SPI receive buffer.

void SPI_writeDataBlockingNonFIFO(uint32_t base, uint16_t data)¶

Waits for the transmit buffer to empty and then writes data to it.

This function places the supplied data into the transmit buffer of the specified SPI module once it is empty. This function should not be used when FIFO mode is enabled.

Parameters

base: specifies the SPI module base address.
data: is the left-justified data to be transmitted over SPI.

Note: The data being sent must be left-justified in data. The lower 16 - N bits will be discarded where N is the data width selected in SPI_setConfig(). For example, if configured for a 6-bit data width, the lower 10 bits of data will be discarded.
Return: None.

uint16_t SPI_readDataBlockingNonFIFO(uint32_t base)¶

Waits for data to be received and then reads it from the buffer.

This function waits for data to be received and then reads it from the receive buffer of the specified SPI module. This function should not be used when FIFO mode is enabled.

Parameters

base: specifies the SPI module base address.

Note: Only the lower N bits of the value written to data contain valid data, where N is the data width as configured by SPI_setConfig(). For example, if the interface is configured for 8-bit data width, only the lower 8 bits of the value written to data contain valid data.
Return: Returns the word of data read from the SPI receive buffer.

void SPI_enableTriWire(uint32_t base)¶

Enables SPI 3-wire mode.

This function enables 3-wire mode. When in master mode, this allows SPISIMO to become SPIMOMI and SPISOMI to become free for non-SPI use. When in slave mode, SPISOMI because the SPISISO pin and SPISIMO is free for non-SPI use.

Parameters

base: is the base address of the SPI port.

Return: None.

void SPI_disableTriWire(uint32_t base)¶

Disables SPI 3-wire mode.

This function disables 3-wire mode. SPI will operate in normal 4-wire mode.

Parameters

base: is the base address of the SPI port.

Return: None.

void SPI_enableLoopback(uint32_t base)¶

Enables SPI loopback mode.

This function enables loopback mode. This mode is only valid during master mode and is helpful during device testing as it internally connects SIMO and SOMI.

Parameters

base: is the base address of the SPI port.

Return: None.

void SPI_disableLoopback(uint32_t base)¶

Disables SPI loopback mode.

This function disables loopback mode. Loopback mode is disabled by default after reset.

Parameters

base: is the base address of the SPI port.

Return: None.

void SPI_setSTESignalPolarity(uint32_t base, SPI_STEPolarity polarity)¶

Set the slave select (SPISTE) signal polarity.

This function sets the polarity of the slave select (SPISTE) signal. The two modes to choose from for the

polarity parameter are SPI_STE_ACTIVE_LOW for active-low polarity (typical) and SPI_STE_ACTIVE_HIGH for active-high polarity (considered inverted).

Parameters

base: is the base address of the SPI port.
polarity: is the SPISTE signal polarity.

Note: This has no effect on the STE signal when in master mode. It is only applicable to slave mode.
Return: None.

void SPI_enableHighSpeedMode(uint32_t base)¶

Enables SPI high speed mode.

This function enables high speed mode.

Parameters

base: is the base address of the SPI port.

Return: None.

void SPI_disableHighSpeedMode(uint32_t base)¶

Disables SPI high speed mode.

This function disables high speed mode. High speed mode is disabled by default after reset.

Parameters

base: is the base address of the SPI port.

Return: None.

void SPI_setEmulationMode(uint32_t base, SPI_EmulationMode mode)¶

Sets SPI emulation mode.

This function sets the behavior of the SPI operation when an emulation suspend occurs. The

mode parameter can be one of the following:

Parameters

base: is the base address of the SPI port.
mode: is the emulation mode.

SPI_EMULATION_STOP_MIDWAY - Transmission stops midway through the bit stream. The rest of the bits will be transmitting after the suspend is deasserted.
SPI_EMULATION_STOP_AFTER_TRANSMIT - If the suspend occurs before the first SPICLK pulse, the transmission will not start. If it occurs later, the transmission will be completed.
SPI_EMULATION_FREE_RUN - SPI operation continues regardless of a the suspend.

Return: None.

void SPI_setTxFifoTransmitDelay(uint32_t base, uint16_t delay)¶

Configures the FIFO Transmit Delay

This function sets the delay between every transfer from FIFO transmit buffer to transmit shift register. The delay is defined in number SPI serial clock cycles.

Parameters

base: is the base address of the SPI port.
delay: Tx FIFO delay to be configured in cycles (0..0xFF)

Return: None

uint16_t SPI_readRxEmulationBuffer(uint32_t base)¶

Returns the Emulation Buffer Received Data

This function returns the Emulation Buffer Received Data

Parameters

base: is the base address of the SPI port.

Return: Rx emulation buffer data

void SPI_enableTalk(uint32_t base)¶

Enable Trasnmit

This function sets the TALK bit enabling the data trasnmission. This bit is enabled by SPI_setConfig if the parameter \r mode is selected as SPI_MODE_SLAVE or SPI_MODE_MASTER.

Parameters

base: is the base address of the SPI port.

Return: None

void SPI_disableTalk(uint32_t base)¶

Disable Trasnmit

This function clears the TALK bit disabling the data trasnmission. The output pin will be put in high-impedance state. This bit is enabled by SPI_setConfig if the parameter \r mode is selected as SPI_MODE_SLAVE or SPI_MODE_MASTER.

Parameters

base: is the base address of the SPI port.

Return: None

void SPI_setConfig(uint32_t base, uint32_t lspclkHz, SPI_TransferProtocol protocol, SPI_Mode mode, uint32_t bitRate, uint16_t dataWidth)¶

Configures the serial peripheral interface.

This function configures the serial peripheral interface. It sets the SPI protocol, mode of operation, bit rate, and data width.

Parameters

base: specifies the SPI module base address.
lspclkHz: is the rate of the clock supplied to the SPI module (LSPCLK) in Hz.
protocol: specifies the data transfer protocol.
mode: specifies the mode of operation.
bitRate: specifies the clock rate in Hz.
dataWidth: specifies number of bits transferred per frame.

The protocol parameter defines the data frame format. The protocol parameter can be one of the following values: SPI_PROT_POL0PHA0, SPI_PROT_POL0PHA1, SPI_PROT_POL1PHA0, or SPI_PROT_POL1PHA1. These frame formats encode the following polarity and phase configurations:

The mode parameter defines the operating mode of the SPI module. The SPI module can operate as a master or slave; the SPI can also be be configured to disable output on its serial output line. The mode parameter can be one of the following values: SPI_MODE_MASTER, SPI_MODE_SLAVE, SPI_MODE_MASTER_OD or SPI_MODE_SLAVE_OD (“OD” indicates “output disabled”).

The bitRate parameter defines the bit rate for the SPI. This bit rate must satisfy the following clock ratio criteria:

bitRate can be no greater than lspclkHz divided by 4.
lspclkHz / bitRate cannot be greater than 128.

The dataWidth parameter defines the width of the data transfers and can be a value between 1 and 16, inclusive.

The peripheral clock is the low speed peripheral clock. This value is returned by SysCtl_getLowSpeedClock(), or it can be explicitly hard coded if it is constant and known (to save the code/execution overhead of a call to SysCtl_getLowSpeedClock()).

Note: SPI operation should be disabled via SPI_disableModule() before any changes to its configuration.
Return: None.

void SPI_setBaudRate(uint32_t base, uint32_t lspclkHz, uint32_t bitRate)¶

Configures the baud rate of the serial peripheral interface.

This function configures the SPI baud rate. The

bitRate parameter defines the bit rate for the SPI. This bit rate must satisfy the following clock ratio criteria:

Parameters

base: specifies the SPI module base address.
lspclkHz: is the rate of the clock supplied to the SPI module (LSPCLK) in Hz.
bitRate: specifies the clock rate in Hz.

bitRate can be no greater than lspclkHz divided by 4.
lspclkHz / bitRate cannot be greater than 128.

The peripheral clock is the low speed peripheral clock. This value is returned by SysCtl_getLowSpeedClock(), or it can be explicitly hard coded if it is constant and known (to save the code/execution overhead of a call to SysCtl_getLowSpeedClock()).

Note: SPI_setConfig() also sets the baud rate. Use SPI_setBaudRate() if you wish to configure it separately from protocol and mode.
Return: None.

void SPI_enableInterrupt(uint32_t base, uint32_t intFlags)¶

Enables individual SPI interrupt sources.

This function enables the indicated SPI interrupt sources. Only the sources that are enabled can be reflected to the processor interrupt; disabled sources have no effect on the processor. The

intFlags parameter can be any of the following values:

SPI_INT_RX_OVERRUN - Receive overrun interrupt
SPI_INT_RX_DATA_TX_EMPTY - Data received, transmit empty
SPI_INT_RXFF (also enables SPI_INT_RXFF_OVERFLOW) - RX FIFO level interrupt (and RX FIFO overflow)
SPI_INT_TXFF - TX FIFO level interrupt

Parameters

base: specifies the SPI module base address.
intFlags: is a bit mask of the interrupt sources to be enabled.

Note: SPI_INT_RX_OVERRUN, SPI_INT_RX_DATA_TX_EMPTY, SPI_INT_RXFF_OVERFLOW, and SPI_INT_RXFF are associated with SPIRXINT; SPI_INT_TXFF is associated with SPITXINT.
Return: None.

void SPI_disableInterrupt(uint32_t base, uint32_t intFlags)¶

Disables individual SPI interrupt sources.

This function disables the indicated SPI interrupt sources. The

intFlags parameter can be any of the following values:

SPI_INT_RX_OVERRUN
SPI_INT_RX_DATA_TX_EMPTY
SPI_INT_RXFF (also disables SPI_INT_RXFF_OVERFLOW)
SPI_INT_TXFF

Parameters

base: specifies the SPI module base address.
intFlags: is a bit mask of the interrupt sources to be disabled.

Note: SPI_INT_RX_OVERRUN, SPI_INT_RX_DATA_TX_EMPTY, SPI_INT_RXFF_OVERFLOW, and SPI_INT_RXFF are associated with SPIRXINT; SPI_INT_TXFF is associated with SPITXINT.
Return: None.

uint32_t SPI_getInterruptStatus(uint32_t base)¶

Gets the current interrupt status.

This function returns the interrupt status for the SPI module.

Parameters

base: specifies the SPI module base address.

Return

The current interrupt status, enumerated as a bit field of the following values:

SPI_INT_RX_OVERRUN - Receive overrun interrupt
SPI_INT_RX_DATA_TX_EMPTY - Data received, transmit empty
SPI_INT_RXFF - RX FIFO level interrupt
SPI_INT_RXFF_OVERFLOW - RX FIFO overflow
SPI_INT_TXFF - TX FIFO level interrupt

void SPI_clearInterruptStatus(uint32_t base, uint32_t intFlags)¶

Clears SPI interrupt sources.

This function clears the specified SPI interrupt sources so that they no longer assert. This function must be called in the interrupt handler to keep the interrupts from being triggered again immediately upon exit. The

intFlags parameter can consist of a bit field of the following values:

SPI_INT_RX_OVERRUN
SPI_INT_RX_DATA_TX_EMPTY
SPI_INT_RXFF
SPI_INT_RXFF_OVERFLOW
SPI_INT_TXFF

Parameters

base: specifies the SPI module base address.
intFlags: is a bit mask of the interrupt sources to be cleared.

Note: SPI_INT_RX_DATA_TX_EMPTY is cleared by a read of the receive receive buffer, so it usually doesn’t need to be cleared using this function.
Note: Also note that SPI_INT_RX_OVERRUN, SPI_INT_RX_DATA_TX_EMPTY, SPI_INT_RXFF_OVERFLOW, and SPI_INT_RXFF are associated with SPIRXINT; SPI_INT_TXFF is associated with SPITXINT.
Return: None.

Before initializing the SPI module, the user first must put the module into the reset state by calling SPI_disableModule(). The next call should be to SPI_setConfig() to set properties like master or slave mode, bit rate of the SPI clock signal, data width, and the number of bits per frame.

The next step is to do any any FIFO or interrupt configuration. FIFOs are configured using SPI_enableFIFO() and SPI_disableFIFO() and SPI_setFIFOInterruptLevel() if interrupts are desired. The functions SPI_enableInterrupt(), SPI_disableInterrupt(), SPI_clearInterruptStatus(), and SPI_getInterruptStatus() are for management of interrupts. Note that the SPI module uses separate interrupt lines for its receive and transmit interrupts when in FIFO mode, but only the “receive” interrupt line when not in FIFO mode.

When configuration is complete, SPI_enableModule() should be called to enable the operation of the module.

To transmit data, there are a few options. SPI_writeDataNonBlocking() will simply write the specified data to the transmit buffer and return. It is left up to the user to check beforehand that the module is ready for a new piece of data to be written to the buffer. This means checking the buffer-full flag is not set or, if in FIFO mode, checking how full the FIFO is using SPI_getTxFIFOStatus() when in FIFO mode. The other option is to use one of the two functions SPI_writeDataBlockingNonFIFO() and SPI_writeDataBlockingFIFO() that will wait in a while-loop for the module to be ready.

When receiving data, again, there are a few options. SPI_readDataNonBlocking() will immediately return the contents of the receive buffer. The user should check that there is in fact data ready by checking the buffer-full flag or, if in FIFO mode, checking how full the FIFO is using SPI_getRxFIFOStatus(). SPI_readDataBlockingNonFIFO() and SPI_readDataBlockingFIFO(), however, will wait in a while-loop for data to become available.

The code for this module is contained in driverlib/spi.c, with driverlib/spi.h containing the API declarations for use by applications.