UARTMSP432.h

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/*
 * Copyright (c) 2015-2016, Texas Instruments Incorporated
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * *  Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *
 * *  Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * *  Neither the name of Texas Instruments Incorporated nor the names of
 *    its contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
#ifndef ti_drivers_uart_UARTMSP432__include
#define ti_drivers_uart_UARTMSP432__include

#ifdef __cplusplus
extern "C" {
#endif

#include <stdint.h>
#include <stdbool.h>

#include <ti/devices/msp432p4xx/inc/msp.h>

#include <ti/drivers/dpl/ClockP.h>
#include <ti/drivers/dpl/HwiP.h>
#include <ti/drivers/dpl/SemaphoreP.h>
#include <ti/drivers/Power.h>
#include <ti/drivers/UART.h>
#include <ti/drivers/utils/RingBuf.h>


#define UARTMSP432_P1_2_UCA0RXD  0x00000112  /* Primary, port 1, pin 2 */
#define UARTMSP432_P1_3_UCA0TXD  0x00000113  /* Primary, port 1, pin 3 */

/* Port 2, pin 0 */
#define UARTMSP432_P2_0_UCA0RXD ((PMAP_UCA0RXD << 10) | 0x20)
#define UARTMSP432_P2_0_UCA0TXD ((PMAP_UCA0TXD << 10) | 0x20)
#define UARTMSP432_P2_0_UCA1RXD ((PMAP_UCA1RXD << 10) | 0x20)
#define UARTMSP432_P2_0_UCA1TXD ((PMAP_UCA1TXD << 10) | 0x20)
#define UARTMSP432_P2_0_UCA2RXD ((PMAP_UCA2RXD << 10) | 0x20)
#define UARTMSP432_P2_0_UCA2TXD ((PMAP_UCA2TXD << 10) | 0x20)

/* Port 2, pin 1 */
#define UARTMSP432_P2_1_UCA0RXD  ((PMAP_UCA0RXD << 10) | 0x21)
#define UARTMSP432_P2_1_UCA0TXD  ((PMAP_UCA0TXD << 10) | 0x21)
#define UARTMSP432_P2_1_UCA1RXD  ((PMAP_UCA1RXD << 10) | 0x21)
#define UARTMSP432_P2_1_UCA1TXD  ((PMAP_UCA1TXD << 10) | 0x21)
#define UARTMSP432_P2_1_UCA2RXD  ((PMAP_UCA2RXD << 10) | 0x21)
#define UARTMSP432_P2_1_UCA2TXD  ((PMAP_UCA2TXD << 10) | 0x21)

/* Port 2, pin 2 */
#define UARTMSP432_P2_2_UCA0RXD  ((PMAP_UCA0RXD << 10) | 0x22)
#define UARTMSP432_P2_2_UCA0TXD  ((PMAP_UCA0TXD << 10) | 0x22)
#define UARTMSP432_P2_2_UCA1RXD  ((PMAP_UCA1RXD << 10) | 0x22)
#define UARTMSP432_P2_2_UCA1TXD  ((PMAP_UCA1TXD << 10) | 0x22)
#define UARTMSP432_P2_2_UCA2RXD  ((PMAP_UCA2RXD << 10) | 0x22)
#define UARTMSP432_P2_2_UCA2TXD  ((PMAP_UCA2TXD << 10) | 0x22)

/* Port 2, pin 3 */
#define UARTMSP432_P2_3_UCA0RXD  ((PMAP_UCA0RXD << 10) | 0x23)
#define UARTMSP432_P2_3_UCA0TXD  ((PMAP_UCA0TXD << 10) | 0x23)
#define UARTMSP432_P2_3_UCA1RXD  ((PMAP_UCA1RXD << 10) | 0x23)
#define UARTMSP432_P2_3_UCA1TXD  ((PMAP_UCA1TXD << 10) | 0x23)
#define UARTMSP432_P2_3_UCA2RXD  ((PMAP_UCA2RXD << 10) | 0x23)
#define UARTMSP432_P2_3_UCA2TXD  ((PMAP_UCA2TXD << 10) | 0x23)

/* Port 2, pin 4 */
#define UARTMSP432_P2_4_UCA0RXD  ((PMAP_UCA0RXD << 10) | 0x24)
#define UARTMSP432_P2_4_UCA0TXD  ((PMAP_UCA0TXD << 10) | 0x24)
#define UARTMSP432_P2_4_UCA1RXD  ((PMAP_UCA1RXD << 10) | 0x24)
#define UARTMSP432_P2_4_UCA1TXD  ((PMAP_UCA1TXD << 10) | 0x24)
#define UARTMSP432_P2_4_UCA2RXD  ((PMAP_UCA2RXD << 10) | 0x24)
#define UARTMSP432_P2_4_UCA2TXD  ((PMAP_UCA2TXD << 10) | 0x24)

/* Port 2, pin 5 */
#define UARTMSP432_P2_5_UCA0RXD  ((PMAP_UCA0RXD << 10) | 0x25)
#define UARTMSP432_P2_5_UCA0TXD  ((PMAP_UCA0TXD << 10) | 0x25)
#define UARTMSP432_P2_5_UCA1RXD  ((PMAP_UCA1RXD << 10) | 0x25)
#define UARTMSP432_P2_5_UCA1TXD  ((PMAP_UCA1TXD << 10) | 0x25)
#define UARTMSP432_P2_5_UCA2RXD  ((PMAP_UCA2RXD << 10) | 0x25)
#define UARTMSP432_P2_5_UCA2TXD  ((PMAP_UCA2TXD << 10) | 0x25)

/* Port 2, pin 6 */
#define UARTMSP432_P2_6_UCA0RXD  ((PMAP_UCA0RXD << 10) | 0x26)
#define UARTMSP432_P2_6_UCA0TXD  ((PMAP_UCA0TXD << 10) | 0x26)
#define UARTMSP432_P2_6_UCA1RXD  ((PMAP_UCA1RXD << 10) | 0x26)
#define UARTMSP432_P2_6_UCA1TXD  ((PMAP_UCA1TXD << 10) | 0x26)
#define UARTMSP432_P2_6_UCA2RXD  ((PMAP_UCA2RXD << 10) | 0x26)
#define UARTMSP432_P2_6_UCA2TXD  ((PMAP_UCA2TXD << 10) | 0x26)

/* Port 2, pin 7 */
#define UARTMSP432_P2_7_UCA0RXD  ((PMAP_UCA0RXD << 10) | 0x27)
#define UARTMSP432_P2_7_UCA0TXD  ((PMAP_UCA0TXD << 10) | 0x27)
#define UARTMSP432_P2_7_UCA1RXD  ((PMAP_UCA1RXD << 10) | 0x27)
#define UARTMSP432_P2_7_UCA1TXD  ((PMAP_UCA1TXD << 10) | 0x27)
#define UARTMSP432_P2_7_UCA2RXD  ((PMAP_UCA2RXD << 10) | 0x27)
#define UARTMSP432_P2_7_UCA2TXD  ((PMAP_UCA2TXD << 10) | 0x27)

/* Port 3, pin 0 */
#define UARTMSP432_P3_0_UCA0RXD  ((PMAP_UCA0RXD << 10) | 0x30)
#define UARTMSP432_P3_0_UCA0TXD  ((PMAP_UCA0TXD << 10) | 0x30)
#define UARTMSP432_P3_0_UCA1RXD  ((PMAP_UCA1RXD << 10) | 0x30)
#define UARTMSP432_P3_0_UCA1TXD  ((PMAP_UCA1TXD << 10) | 0x30)
#define UARTMSP432_P3_0_UCA2RXD  ((PMAP_UCA2RXD << 10) | 0x30)
#define UARTMSP432_P3_0_UCA2TXD  ((PMAP_UCA2TXD << 10) | 0x30)

/* Port 3, pin 1 */
#define UARTMSP432_P3_1_UCA0RXD  ((PMAP_UCA0RXD << 10) | 0x31)
#define UARTMSP432_P3_1_UCA0TXD  ((PMAP_UCA0TXD << 10) | 0x31)
#define UARTMSP432_P3_1_UCA1RXD  ((PMAP_UCA1RXD << 10) | 0x31)
#define UARTMSP432_P3_1_UCA1TXD  ((PMAP_UCA1TXD << 10) | 0x31)
#define UARTMSP432_P3_1_UCA2RXD  ((PMAP_UCA2RXD << 10) | 0x31)
#define UARTMSP432_P3_1_UCA2TXD  ((PMAP_UCA2TXD << 10) | 0x31)

/* Port 3, pin 2 */
#define UARTMSP432_P3_2_UCA0RXD  ((PMAP_UCA0RXD << 10) | 0x32)
#define UARTMSP432_P3_2_UCA0TXD  ((PMAP_UCA0TXD << 10) | 0x32)
#define UARTMSP432_P3_2_UCA1RXD  ((PMAP_UCA1RXD << 10) | 0x32)
#define UARTMSP432_P3_2_UCA1TXD  ((PMAP_UCA1TXD << 10) | 0x32)
#define UARTMSP432_P3_2_UCA2RXD  ((PMAP_UCA2RXD << 10) | 0x32)
#define UARTMSP432_P3_2_UCA2TXD  ((PMAP_UCA2TXD << 10) | 0x32)

/* Port 3, pin 3 */
#define UARTMSP432_P3_3_UCA0RXD  ((PMAP_UCA0RXD << 10) | 0x33)
#define UARTMSP432_P3_3_UCA0TXD  ((PMAP_UCA0TXD << 10) | 0x33)
#define UARTMSP432_P3_3_UCA1RXD  ((PMAP_UCA1RXD << 10) | 0x33)
#define UARTMSP432_P3_3_UCA1TXD  ((PMAP_UCA1TXD << 10) | 0x33)
#define UARTMSP432_P3_3_UCA2RXD  ((PMAP_UCA2RXD << 10) | 0x33)
#define UARTMSP432_P3_3_UCA2TXD  ((PMAP_UCA2TXD << 10) | 0x33)

/* Port 3, pin 4 */
#define UARTMSP432_P3_4_UCA0RXD  ((PMAP_UCA0RXD << 10) | 0x34)
#define UARTMSP432_P3_4_UCA0TXD  ((PMAP_UCA0TXD << 10) | 0x34)
#define UARTMSP432_P3_4_UCA1RXD  ((PMAP_UCA1RXD << 10) | 0x34)
#define UARTMSP432_P3_4_UCA1TXD  ((PMAP_UCA1TXD << 10) | 0x34)
#define UARTMSP432_P3_4_UCA2RXD  ((PMAP_UCA2RXD << 10) | 0x34)
#define UARTMSP432_P3_4_UCA2TXD  ((PMAP_UCA2TXD << 10) | 0x34)

/* Port 3, pin 5 */
#define UARTMSP432_P3_5_UCA0RXD  ((PMAP_UCA0RXD << 10) | 0x35)
#define UARTMSP432_P3_5_UCA0TXD  ((PMAP_UCA0TXD << 10) | 0x35)
#define UARTMSP432_P3_5_UCA1RXD  ((PMAP_UCA1RXD << 10) | 0x35)
#define UARTMSP432_P3_5_UCA1TXD  ((PMAP_UCA1TXD << 10) | 0x35)
#define UARTMSP432_P3_5_UCA2RXD  ((PMAP_UCA2RXD << 10) | 0x35)
#define UARTMSP432_P3_5_UCA2TXD  ((PMAP_UCA2TXD << 10) | 0x35)

/* Port 3, pin 6 */
#define UARTMSP432_P3_6_UCA0RXD  ((PMAP_UCA0RXD << 10) | 0x36)
#define UARTMSP432_P3_6_UCA0TXD  ((PMAP_UCA0TXD << 10) | 0x36)
#define UARTMSP432_P3_6_UCA1RXD  ((PMAP_UCA1RXD << 10) | 0x36)
#define UARTMSP432_P3_6_UCA1TXD  ((PMAP_UCA1TXD << 10) | 0x36)
#define UARTMSP432_P3_6_UCA2RXD  ((PMAP_UCA2RXD << 10) | 0x36)
#define UARTMSP432_P3_6_UCA2TXD  ((PMAP_UCA2TXD << 10) | 0x36)

/* Port 3, pin 7 */
#define UARTMSP432_P3_7_UCA0RXD  ((PMAP_UCA0RXD << 10) | 0x37)
#define UARTMSP432_P3_7_UCA0TXD  ((PMAP_UCA0TXD << 10) | 0x37)
#define UARTMSP432_P3_7_UCA1RXD  ((PMAP_UCA1RXD << 10) | 0x37)
#define UARTMSP432_P3_7_UCA1TXD  ((PMAP_UCA1TXD << 10) | 0x37)
#define UARTMSP432_P3_7_UCA2RXD  ((PMAP_UCA2RXD << 10) | 0x37)
#define UARTMSP432_P3_7_UCA2TXD  ((PMAP_UCA2TXD << 10) | 0x37)

/* Port 7, pin 0 */
#define UARTMSP432_P7_0_UCA0RXD  ((PMAP_UCA0RXD << 10) | 0x70)
#define UARTMSP432_P7_0_UCA0TXD  ((PMAP_UCA0TXD << 10) | 0x70)
#define UARTMSP432_P7_0_UCA1RXD  ((PMAP_UCA1RXD << 10) | 0x70)
#define UARTMSP432_P7_0_UCA1TXD  ((PMAP_UCA1TXD << 10) | 0x70)
#define UARTMSP432_P7_0_UCA2RXD  ((PMAP_UCA2RXD << 10) | 0x70)
#define UARTMSP432_P7_0_UCA2TXD  ((PMAP_UCA2TXD << 10) | 0x70)

/* Port 7, pin 1 */
#define UARTMSP432_P7_1_UCA0RXD  ((PMAP_UCA0RXD << 10) | 0x71)
#define UARTMSP432_P7_1_UCA0TXD  ((PMAP_UCA0TXD << 10) | 0x71)
#define UARTMSP432_P7_1_UCA1RXD  ((PMAP_UCA1RXD << 10) | 0x71)
#define UARTMSP432_P7_1_UCA1TXD  ((PMAP_UCA1TXD << 10) | 0x71)
#define UARTMSP432_P7_1_UCA2RXD  ((PMAP_UCA2RXD << 10) | 0x71)
#define UARTMSP432_P7_1_UCA2TXD  ((PMAP_UCA2TXD << 10) | 0x71)

/* Port 7, pin 2 */
#define UARTMSP432_P7_2_UCA0RXD  ((PMAP_UCA0RXD << 10) | 0x72)
#define UARTMSP432_P7_2_UCA0TXD  ((PMAP_UCA0TXD << 10) | 0x72)
#define UARTMSP432_P7_2_UCA1RXD  ((PMAP_UCA1RXD << 10) | 0x72)
#define UARTMSP432_P7_2_UCA1TXD  ((PMAP_UCA1TXD << 10) | 0x72)
#define UARTMSP432_P7_2_UCA2RXD  ((PMAP_UCA2RXD << 10) | 0x72)
#define UARTMSP432_P7_2_UCA2TXD  ((PMAP_UCA2TXD << 10) | 0x72)

/* Port 7, pin 3 */
#define UARTMSP432_P7_3_UCA0RXD  ((PMAP_UCA0RXD << 10) | 0x73)
#define UARTMSP432_P7_3_UCA0TXD  ((PMAP_UCA0TXD << 10) | 0x73)
#define UARTMSP432_P7_3_UCA1RXD  ((PMAP_UCA1RXD << 10) | 0x73)
#define UARTMSP432_P7_3_UCA1TXD  ((PMAP_UCA1TXD << 10) | 0x73)
#define UARTMSP432_P7_3_UCA2RXD  ((PMAP_UCA2RXD << 10) | 0x73)
#define UARTMSP432_P7_3_UCA2TXD  ((PMAP_UCA2TXD << 10) | 0x73)

/* Port 7, pin 4 */
#define UARTMSP432_P7_4_UCA0RXD  ((PMAP_UCA0RXD << 10) | 0x74)
#define UARTMSP432_P7_4_UCA0TXD  ((PMAP_UCA0TXD << 10) | 0x74)
#define UARTMSP432_P7_4_UCA1RXD  ((PMAP_UCA1RXD << 10) | 0x74)
#define UARTMSP432_P7_4_UCA1TXD  ((PMAP_UCA1TXD << 10) | 0x74)
#define UARTMSP432_P7_4_UCA2RXD  ((PMAP_UCA2RXD << 10) | 0x74)
#define UARTMSP432_P7_4_UCA2TXD  ((PMAP_UCA2TXD << 10) | 0x74)

/* Port 7, pin 5 */
#define UARTMSP432_P7_5_UCA0RXD  ((PMAP_UCA0RXD << 10) | 0x75)
#define UARTMSP432_P7_5_UCA0TXD  ((PMAP_UCA0TXD << 10) | 0x75)
#define UARTMSP432_P7_5_UCA1RXD  ((PMAP_UCA1RXD << 10) | 0x75)
#define UARTMSP432_P7_5_UCA1TXD  ((PMAP_UCA1TXD << 10) | 0x75)
#define UARTMSP432_P7_5_UCA2RXD  ((PMAP_UCA2RXD << 10) | 0x75)
#define UARTMSP432_P7_5_UCA2TXD  ((PMAP_UCA2TXD << 10) | 0x75)

/* Port 7, pin 6 */
#define UARTMSP432_P7_6_UCA0RXD  ((PMAP_UCA0RXD << 10) | 0x76)
#define UARTMSP432_P7_6_UCA0TXD  ((PMAP_UCA0TXD << 10) | 0x76)
#define UARTMSP432_P7_6_UCA1RXD  ((PMAP_UCA1RXD << 10) | 0x76)
#define UARTMSP432_P7_6_UCA1TXD  ((PMAP_UCA1TXD << 10) | 0x76)
#define UARTMSP432_P7_6_UCA2RXD  ((PMAP_UCA2RXD << 10) | 0x76)
#define UARTMSP432_P7_6_UCA2TXD  ((PMAP_UCA2TXD << 10) | 0x76)

/* Port 7, pin 7 */
#define UARTMSP432_P7_7_UCA0RXD  ((PMAP_UCA0RXD << 10) | 0x77)
#define UARTMSP432_P7_7_UCA0TXD  ((PMAP_UCA0TXD << 10) | 0x77)
#define UARTMSP432_P7_7_UCA1RXD  ((PMAP_UCA1RXD << 10) | 0x77)
#define UARTMSP432_P7_7_UCA1TXD  ((PMAP_UCA1TXD << 10) | 0x77)
#define UARTMSP432_P7_7_UCA2RXD  ((PMAP_UCA2RXD << 10) | 0x77)
#define UARTMSP432_P7_7_UCA2TXD  ((PMAP_UCA2TXD << 10) | 0x77)

#define UARTMSP432_P9_6_UCA3RXD  0x00000196  /* Primary, port 9, pin 6 */
#define UARTMSP432_P9_7_UCA3TXD  0x00000197  /* Primeary, port 9, pin 7 */

/* Add UARTMSP432_STATUS_* macros here */

/* Add UARTMSP432_CMD_* macros here */

/* UART function table pointer */
extern const UART_FxnTable UARTMSP432_fxnTable;

typedef struct UARTMSP432_FxnSet {
    bool (*readIsrFxn)  (UART_Handle handle);
    int  (*readTaskFxn) (UART_Handle handle);
} UARTMSP432_FxnSet;

typedef struct UARTMSP432_BaudrateConfig {
    uint32_t  outputBaudrate; 
    uint32_t  inputClockFreq; 
    uint16_t  prescalar;      
    uint8_t   hwRegUCBRFx;    
    uint8_t   hwRegUCBRSx;    
    uint8_t   oversampling;   
} UARTMSP432_BaudrateConfig;

typedef struct UARTMSP432_HWAttrsV1 {
    unsigned int    baseAddr;
    unsigned int    intNum;
    unsigned int    intPriority;
    uint8_t         clockSource;
    uint32_t        bitOrder;
    uint8_t         numBaudrateEntries;
    UARTMSP432_BaudrateConfig const *baudrateLUT;
    unsigned char  *ringBufPtr;
    size_t          ringBufSize;

    uint16_t        rxPin;
    uint16_t        txPin;
} UARTMSP432_HWAttrsV1;

typedef struct UARTMSP432_Object {
    /* UART state variable */
    struct {
        bool             opened:1;         /* Has the obj been opened */
        UART_Mode        readMode:1;       /* Mode for all read calls */
        UART_Mode        writeMode:1;      /* Mode for all write calls */
        UART_DataMode    readDataMode:1;   /* Type of data being read */
        UART_DataMode    writeDataMode:1;  /* Type of data being written */
        UART_ReturnMode  readReturnMode:1; /* Receive return mode */
        UART_Echo        readEcho:1;       /* Echo received data back */
        bool             writeCR:1;        /* Write a return character */
        /*
         * Flag to determine if a timeout has occurred when the user called
         * UART_read(). This flag is set by the timeoutClk clock object.
         */
        bool             bufTimeout:1;
        /*
         * Flag to determine when an ISR needs to perform a callback; in both
         * UART_MODE_BLOCKING or UART_MODE_CALLBACK
         */
        bool             callCallback:1;
        /*
         * Flag to determine if the ISR is in control draining the ring buffer
         * when in UART_MODE_CALLBACK
         */
        bool             drainByISR:1;
        /* Flag to keep the state of the read Power constraints */
        bool             rxEnabled:1;
        /* Flag to keep the state of the write Power constraints */
        bool             txEnabled:1;
    } state;

    HwiP_Handle          hwiHandle;        /* Hwi handle for interrupts */
    ClockP_Handle        timeoutClk;       /* Clock object to for timeouts */
    uint32_t             baudRate;         /* Baud rate for UART */
    UART_STOP            stopBits;         /* Stop bits for UART */
    UART_PAR             parityType;       /* Parity bit type for UART */

    /* UART read variables */
    RingBuf_Object       ringBuffer;       /* local circular buffer object */
    /* A complement pair of read functions for both the ISR and UART_read() */
    UARTMSP432_FxnSet    readFxns;
    unsigned char       *readBuf;          /* Buffer data pointer */
    size_t               readSize;         /* Desired number of bytes to read */
    size_t               readCount;        /* Number of bytes left to read */
    SemaphoreP_Handle    readSem;          /* UART read semaphore */
    unsigned int         readTimeout;      /* Timeout for read semaphore */
    UART_Callback        readCallback;     /* Pointer to read callback */

    /* UART write variables */
    const unsigned char *writeBuf;         /* Buffer data pointer */
    size_t               writeSize;        /* Desired number of bytes to write*/
    size_t               writeCount;       /* Number of bytes left to write */
    SemaphoreP_Handle    writeSem;         /* UART write semaphore*/
    unsigned int         writeTimeout;     /* Timeout for write semaphore */
    UART_Callback        writeCallback;    /* Pointer to write callback */
    unsigned int         writeEmptyClkTimeout; /* TX FIFO timeout tick count */

    Power_NotifyObj      perfChangeNotify;
    uint32_t             perfConstraintMask;
} UARTMSP432_Object, *UARTMSP432_Handle;

#ifdef __cplusplus
}
#endif

#endif /* ti_drivers_uart_UARTMSP432__include */