J784S4 Processor Descriptions

Introduction

This chapter provides information of Processor and Host IDs that are permitted in the J784S4 SoC. These Processor IDs represent an actual physical processor on the SoC.

NOTE: This should not be confused with HOST_ID.

Enumeration of Processor IDs

Processor ID Processor Name Location in SoC
0x01 MCU_R5FSS0_CORE0 J7VCL_MCU_SEC_MMR_MCU_0: (Cluster 0 Processor 0)
0x02 MCU_R5FSS0_CORE1 J7VCL_MCU_SEC_MMR_MCU_0: (Cluster 0 Processor 1)
0x06 R5FSS0_CORE0 J7AM_MAIN_SEC_MMR_MAIN_0: (Cluster 0 Processor 0)
0x07 R5FSS0_CORE1 J7AM_MAIN_SEC_MMR_MAIN_0: (Cluster 0 Processor 1)
0x08 R5FSS1_CORE0 J7AM_MAIN_SEC_MMR_MAIN_0: (Cluster 1 Processor 0)
0x09 R5FSS1_CORE1 J7AM_MAIN_SEC_MMR_MAIN_0: (Cluster 1 Processor 1)
0x0A R5FSS2_CORE0 J7AM_MAIN_SEC_MMR_MAIN_0: (Cluster 2 Processor 0)
0x0B R5FSS2_CORE1 J7AM_MAIN_SEC_MMR_MAIN_0: (Cluster 2 Processor 1)
0x20 A72SS0_CORE0 COMPUTE_CLUSTER_J7AHP_MAIN_0_DMSC_WRAP_0: (Cluster 0 Processor 0)
0x21 A72SS0_CORE1 COMPUTE_CLUSTER_J7AHP_MAIN_0_DMSC_WRAP_0: (Cluster 0 Processor 1)
0x22 A72SS0_CORE2 COMPUTE_CLUSTER_J7AHP_MAIN_0_DMSC_WRAP_0: (Cluster 0 Processor 2)
0x23 A72SS0_CORE3 COMPUTE_CLUSTER_J7AHP_MAIN_0_DMSC_WRAP_0: (Cluster 0 Processor 3)
0x24 A72SS1_CORE0 COMPUTE_CLUSTER_J7AHP_MAIN_0_DMSC_WRAP_0: (Cluster 1 Processor 0)
0x25 A72SS1_CORE1 COMPUTE_CLUSTER_J7AHP_MAIN_0_DMSC_WRAP_0: (Cluster 1 Processor 1)
0x26 A72SS1_CORE2 COMPUTE_CLUSTER_J7AHP_MAIN_0_DMSC_WRAP_0: (Cluster 1 Processor 2)
0x27 A72SS1_CORE3 COMPUTE_CLUSTER_J7AHP_MAIN_0_DMSC_WRAP_0: (Cluster 1 Processor 3)
0x30 COMPUTE_CLUSTER0_C71SS0_CORE0 COMPUTE_CLUSTER_J7AHP_MAIN_0_DMSC_WRAP_0: (Cluster 4 Processor 0)
0x31 COMPUTE_CLUSTER0_C71SS1_CORE0 COMPUTE_CLUSTER_J7AHP_MAIN_0_DMSC_WRAP_0: (Cluster 5 Processor 0)
0x32 COMPUTE_CLUSTER0_C71SS2_CORE0 COMPUTE_CLUSTER_J7AHP_MAIN_0_DMSC_WRAP_0: (Cluster 6 Processor 0)
0x33 COMPUTE_CLUSTER0_C71SS3_CORE0 COMPUTE_CLUSTER_J7AHP_MAIN_0_DMSC_WRAP_0: (Cluster 7 Processor 0)
0x80 WKUP_HSM0 SMS_WKUP_0_SECCTRL_0: (Cluster 0 Processor 1)