J7200 PSI-L Device Descriptions


This chapter provides information on the PSI-L devices in the J7200 SoC. Some System Firmware TISCI messages take device specific inputs. This chapter provides information on the valid values for PSI-L TISCI message parameters.

PSI-L Proxy Device IDs

Some System Firmware TISCI message APIs require the PSI-L Proxy device ID be provided as part of the request. Based on J7200 Device IDs these are the valid PSI-L Proxy device IDs.

PSI-L Proxy Device Name PSI-L Proxy Device ID
J7200_DEV_NAVSS0 199
J7200_DEV_MCU_NAVSS0 232

PSI-L Source and Destination Thread IDs

This section describes valid PSI-L source and destination thread IDs for each thread type. The thread IDs are used in the PSI-L based TISCI messages.


PSI-L threads marked as reserved for use by DMSC cannot be linked to another thread.

Thread Type Thread Range
udmap0_trstrm_tx 0x8 to 0x8
udmap0_cfgstrm_tx 0x20 to 0x20
navss_main_udmap0_tx 0x1000 to 0x103b
navss_main_pdma_main_debug_ccmcu_rx 0x4300 to 0x4301
navss_main_pdma_main_debug_mainc66_rx 0x4304 to 0x4305
navss_main_pdma_main_mcasp_g0_rx 0x4400 to 0x4402
navss_main_pdma_main_aasrc_rx 0x4404 to 0x440b
navss_main_pdma_main_spi_g0_rx 0x4600 to 0x460f
navss_main_pdma_main_misc_g1_rx 0x460c to 0x4616
navss_main_pdma_main_spi_g1_rx 0x4610 to 0x461f
navss_main_pdma_main_misc_g2_rx 0x4618 to 0x4622
navss_main_pdma_main_misc_g3_rx 0x4624 to 0x462e
navss_main_pdma_main_usart_g0_rx 0x4700 to 0x4701
navss_main_pdma_main_usart_g1_rx 0x4702 to 0x4703
navss_main_pdma_main_usart_g2_rx 0x4704 to 0x4709
navss_main_pdma_main_mcan_rx (J7200_DEV_NAVSS0) 0x470a to 0x473f
navss_main_pdma_main_mcan_rx (J7200_DEV_MCU_NAVSS0) 0x470c to 0x4729
navss_main_cpsw5_rx 0x4a00 to 0x4a00
navss_mcu_udmap0_tx 0x6000 to 0x602d
navss_mcu_udmap0_tx (Reserved by System Firmware) 0x602e to 0x602f
navss_mcu_pdma_cpsw0_rx 0x7000 to 0x7000
navss_mcu_pdma_mcu0_rx 0x7100 to 0x7106
navss_mcu_pdma_mcu1_rx 0x7200 to 0x7207
navss_mcu_pdma_mcu2_rx 0x7300 to 0x7303
navss_mcu_pdma_adc_rx 0x7400 to 0x7403
navss_mcu_saul0_rx (Reserved by System Firmware) 0x7500 to 0x7501
navss_mcu_saul0_rx 0x7502 to 0x7503
navss_main_udmap0_rx 0x9000 to 0x903b
navss_main_pdma_main_mcasp_g0_tx 0xc400 to 0xc402
navss_main_pdma_main_aasrc_tx 0xc404 to 0xc40b
navss_main_pdma_main_spi_g0_tx 0xc600 to 0xc60f
navss_main_pdma_main_misc_g1_tx 0xc60c to 0xc616
navss_main_pdma_main_spi_g1_tx 0xc610 to 0xc61f
navss_main_pdma_main_misc_g2_tx 0xc618 to 0xc622
navss_main_pdma_main_misc_g3_tx 0xc624 to 0xc62e
navss_main_pdma_main_usart_g0_tx 0xc700 to 0xc701
navss_main_pdma_main_usart_g1_tx 0xc702 to 0xc703
navss_main_pdma_main_usart_g2_tx 0xc704 to 0xc709
navss_main_pdma_main_mcan_tx (J7200_DEV_NAVSS0) 0xc70a to 0xc73f
navss_main_pdma_main_mcan_tx (J7200_DEV_MCU_NAVSS0) 0xc70c to 0xc729
navss_main_cpsw5_tx 0xca00 to 0xca07
navss_mcu_udmap0_rx 0xe000 to 0xe02c
navss_mcu_udmap0_rx (Reserved by System Firmware) 0xe02d to 0xe02f
navss_mcu_pdma_cpsw0_tx 0xf000 to 0xf007
navss_mcu_pdma_mcu0_tx 0xf100 to 0xf106
navss_mcu_pdma_mcu1_tx 0xf200 to 0xf207
navss_mcu_pdma_mcu2_tx 0xf300 to 0xf303
navss_mcu_pdma_adc_tx 0xf400 to 0xf3ff
navss_mcu_saul0_tx (Reserved by System Firmware) 0xf500 to 0xf500
navss_mcu_saul0_tx 0xf501 to 0xf501