AM62AX Devices Descriptions

Introduction

This chapter provides information on Device IDs that are permitted in the am62ax SoC. The device IDs represent SoC subsystems that can be modified via DMSC TISCI message APIs. Some Secure, Power, and Resource Management DMSC subsystem TISCI message APIs define a device ID as a parameter allowing a user to specify management of a particular SoC subsystem.

Enumeration of Device IDs

Device ID Device Name
1 AM62AX_DEV_CMP_EVENT_INTROUTER0
2 AM62AX_DEV_DBGSUSPENDROUTER0
3 AM62AX_DEV_MAIN_GPIOMUX_INTROUTER0
5 AM62AX_DEV_WKUP_MCU_GPIOMUX_INTROUTER0
6 AM62AX_DEV_TIMESYNC_EVENT_ROUTER0
7 AM62AX_DEV_MCU_R5FSS0
9 AM62AX_DEV_MCU_R5FSS0_CORE0
13 AM62AX_DEV_CPSW0
15 AM62AX_DEV_STM0
16 AM62AX_DEV_DCC0
17 AM62AX_DEV_DCC1
18 AM62AX_DEV_DCC2
19 AM62AX_DEV_DCC3
20 AM62AX_DEV_DCC4
21 AM62AX_DEV_DCC5
22 AM62AX_DEV_SMS0
23 AM62AX_DEV_MCU_DCC0
24 AM62AX_DEV_DEBUGSS_WRAP0
25 AM62AX_DEV_DMASS0
26 AM62AX_DEV_DMASS0_BCDMA_0
27 AM62AX_DEV_DMASS0_CBASS_0
28 AM62AX_DEV_DMASS0_INTAGGR_0
29 AM62AX_DEV_DMASS0_IPCSS_0
30 AM62AX_DEV_DMASS0_PKTDMA_0
33 AM62AX_DEV_DMASS0_RINGACC_0
35 AM62AX_DEV_MCU_TIMER0
36 AM62AX_DEV_TIMER0
37 AM62AX_DEV_TIMER1
38 AM62AX_DEV_TIMER2
39 AM62AX_DEV_TIMER3
40 AM62AX_DEV_TIMER4
41 AM62AX_DEV_TIMER5
42 AM62AX_DEV_TIMER6
43 AM62AX_DEV_TIMER7
48 AM62AX_DEV_MCU_TIMER1
49 AM62AX_DEV_MCU_TIMER2
50 AM62AX_DEV_MCU_TIMER3
51 AM62AX_DEV_ECAP0
52 AM62AX_DEV_ECAP1
53 AM62AX_DEV_ECAP2
54 AM62AX_DEV_ELM0
55 AM62AX_DEV_EMIF_DATA_ISO_VD
57 AM62AX_DEV_MMCSD0
58 AM62AX_DEV_MMCSD1
59 AM62AX_DEV_EQEP0
60 AM62AX_DEV_EQEP1
61 AM62AX_DEV_WKUP_GTC0
62 AM62AX_DEV_EQEP2
63 AM62AX_DEV_ESM0
64 AM62AX_DEV_WKUP_ESM0
73 AM62AX_DEV_FSS0
74 AM62AX_DEV_FSS0_FSAS_0
75 AM62AX_DEV_FSS0_OSPI_0
76 AM62AX_DEV_GICSS0
77 AM62AX_DEV_GPIO0
78 AM62AX_DEV_GPIO1
79 AM62AX_DEV_MCU_GPIO0
80 AM62AX_DEV_GPMC0
83 AM62AX_DEV_LED0
85 AM62AX_DEV_DDPA0
86 AM62AX_DEV_EPWM0
87 AM62AX_DEV_EPWM1
88 AM62AX_DEV_EPWM2
95 AM62AX_DEV_WKUP_VTM0
96 AM62AX_DEV_MAILBOX0
97 AM62AX_DEV_MAIN2MCU_VD
98 AM62AX_DEV_MCAN0
100 AM62AX_DEV_MCU_MCRC64_0
102 AM62AX_DEV_I2C0
103 AM62AX_DEV_I2C1
104 AM62AX_DEV_I2C2
105 AM62AX_DEV_I2C3
106 AM62AX_DEV_MCU_I2C0
107 AM62AX_DEV_WKUP_I2C0
110 AM62AX_DEV_WKUP_TIMER0
111 AM62AX_DEV_WKUP_TIMER1
114 AM62AX_DEV_WKUP_UART0
116 AM62AX_DEV_MCRC64_0
117 AM62AX_DEV_WKUP_RTCSS0
118 AM62AX_DEV_WKUP_R5FSS0_SS0
119 AM62AX_DEV_WKUP_R5FSS0
121 AM62AX_DEV_WKUP_R5FSS0_CORE0
125 AM62AX_DEV_RTI0
126 AM62AX_DEV_RTI1
127 AM62AX_DEV_RTI2
128 AM62AX_DEV_RTI3
131 AM62AX_DEV_MCU_RTI0
132 AM62AX_DEV_WKUP_RTI0
134 AM62AX_DEV_COMPUTE_CLUSTER0
135 AM62AX_DEV_A53SS0_CORE_0
136 AM62AX_DEV_A53SS0_CORE_1
137 AM62AX_DEV_A53SS0_CORE_2
138 AM62AX_DEV_A53SS0_CORE_3
139 AM62AX_DEV_PSCSS0
140 AM62AX_DEV_WKUP_PSC0
141 AM62AX_DEV_MCSPI0
142 AM62AX_DEV_MCSPI1
143 AM62AX_DEV_MCSPI2
146 AM62AX_DEV_UART0
147 AM62AX_DEV_MCU_MCSPI0
148 AM62AX_DEV_MCU_MCSPI1
149 AM62AX_DEV_MCU_UART0
150 AM62AX_DEV_SPINLOCK0
152 AM62AX_DEV_UART1
153 AM62AX_DEV_UART2
154 AM62AX_DEV_UART3
155 AM62AX_DEV_UART4
156 AM62AX_DEV_UART5
157 AM62AX_DEV_BOARD0
158 AM62AX_DEV_UART6
161 AM62AX_DEV_USB0
162 AM62AX_DEV_USB1
163 AM62AX_DEV_PBIST0
165 AM62AX_DEV_WKUP_PBIST0
166 AM62AX_DEV_A53SS0
167 AM62AX_DEV_COMPUTE_CLUSTER0_PBIST_0
168 AM62AX_DEV_PSC0_FW_0
169 AM62AX_DEV_PSC0
170 AM62AX_DEV_DDR32SS0
171 AM62AX_DEV_DEBUGSS0
172 AM62AX_DEV_A53_RS_BW_LIMITER0
173 AM62AX_DEV_A53_WS_BW_LIMITER1
176 AM62AX_DEV_WKUP_DEEPSLEEP_SOURCES0
177 AM62AX_DEV_EMIF_CFG_ISO_VD
178 AM62AX_DEV_MAIN_USB0_ISO_VD
179 AM62AX_DEV_MAIN_USB1_ISO_VD
180 AM62AX_DEV_MCU_MCU_16FF0
182 AM62AX_DEV_CSI_RX_IF0
183 AM62AX_DEV_DCC6
184 AM62AX_DEV_MMCSD2
185 AM62AX_DEV_DPHY_RX0
186 AM62AX_DEV_DSS0
188 AM62AX_DEV_MCU_MCAN0
189 AM62AX_DEV_MCU_MCAN1
190 AM62AX_DEV_MCASP0
191 AM62AX_DEV_MCASP1
192 AM62AX_DEV_MCASP2
193 AM62AX_DEV_CLK_32K_RC_SEL_DEV_VD
194 AM62AX_DEV_CPT2_AGGR1
195 AM62AX_DEV_CPT2_AGGR0
196 AM62AX_DEV_MCU_CPT2_AGGR0
197 AM62AX_DEV_MCU_DCC1
198 AM62AX_DEV_DMASS1
199 AM62AX_DEV_DMASS1_BCDMA_0
200 AM62AX_DEV_DMASS1_INTAGGR_0
201 AM62AX_DEV_JPGENC0
202 AM62AX_DEV_WKUP_PBIST1
203 AM62AX_DEV_MCU_PBIST0
204 AM62AX_DEV_CODEC0
205 AM62AX_DEV_RTI4
206 AM62AX_DEV_C7XV_RSWS_BS_LIMITER6
207 AM62AX_DEV_C7X256V0
208 AM62AX_DEV_C7X256V0_C7XV_CORE_0
209 AM62AX_DEV_C7X256V0_CORE0
210 AM62AX_DEV_C7X256V0_CLEC
211 AM62AX_DEV_C7X256V0_CLK
212 AM62AX_DEV_C7X256V0_DEBUG
213 AM62AX_DEV_C7X256V0_GICSS
214 AM62AX_DEV_C7X256V0_PBIST
215 AM62AX_DEV_JPGENC_RS_BW_LIMITER4
216 AM62AX_DEV_JPGENC_WS_BW_LIMITER5
217 AM62AX_DEV_VPAC_RSWS_BW_LIMITER8
218 AM62AX_DEV_VPAC_RSWS_BW_LIMITER7
219 AM62AX_DEV_VPAC0
220 AM62AX_DEV_PBIST3
221 AM62AX_DEV_CODEC_RS_BW_LIMITER2
222 AM62AX_DEV_CODEC_WS_BW_LIMITER3
225 AM62AX_DEV_HSM0
226 AM62AX_DEV_WKUP_CLKOUT_SEL_DEV_VD
227 AM62AX_DEV_MCU_OBSCLK_MUX_SEL_DEV_VD
228 AM62AX_DEV_OBSCLK0_MUX_SEL_DEV_VD