AM275X Devices Descriptions

Introduction

This chapter provides information on Device IDs that are permitted in the am275x SoC. The device IDs represent SoC subsystems that can be modified via DMSC TISCI message APIs. Some Secure, Power, and Resource Management DMSC subsystem TISCI message APIs define a device ID as a parameter allowing a user to specify management of a particular SoC subsystem.

Enumeration of Device IDs

Device ID Device Name
0 AM275X_DEV_ADC0
2 AM275X_DEV_DBG_INTROUTER0
3 AM275X_DEV_MAIN_GPIOMUX_INTROUTER0
5 AM275X_DEV_MCU_MCU_GPIOMUX_INTROUTER0
6 AM275X_DEV_TIMESYNC_EVENT_INTROUTER0
13 AM275X_DEV_CPSW0
15 AM275X_DEV_STM0
16 AM275X_DEV_DCC0
17 AM275X_DEV_DCC1
18 AM275X_DEV_DCC2
19 AM275X_DEV_DCC3
20 AM275X_DEV_DCC4
21 AM275X_DEV_DCC5
22 AM275X_DEV_SMS0
23 AM275X_DEV_MCU_DCC0
24 AM275X_DEV_DEBUGSS_WRAP0
25 AM275X_DEV_DMASS0
26 AM275X_DEV_DMASS0_BCDMA_0
27 AM275X_DEV_DMASS0_CBASS_0
28 AM275X_DEV_DMASS0_INTAGGR_0
29 AM275X_DEV_DMASS0_IPCSS_0
30 AM275X_DEV_DMASS0_PKTDMA_0
33 AM275X_DEV_DMASS0_RINGACC_0
36 AM275X_DEV_TIMER0
37 AM275X_DEV_TIMER1
38 AM275X_DEV_TIMER2
39 AM275X_DEV_TIMER3
40 AM275X_DEV_TIMER4
41 AM275X_DEV_TIMER5
42 AM275X_DEV_TIMER6
43 AM275X_DEV_TIMER7
44 AM275X_DEV_TIMER8
45 AM275X_DEV_TIMER9
46 AM275X_DEV_TIMER10
47 AM275X_DEV_TIMER11
51 AM275X_DEV_ECAP0
52 AM275X_DEV_ECAP1
53 AM275X_DEV_ECAP2
58 AM275X_DEV_MMCSD0
61 AM275X_DEV_WKUP_GTC0
63 AM275X_DEV_ESM0
64 AM275X_DEV_WKUP_ESM0
73 AM275X_DEV_FSS1
74 AM275X_DEV_FSS1_FSAS_0
75 AM275X_DEV_FSS1_OSPI_0
77 AM275X_DEV_GPIO0
78 AM275X_DEV_GPIO1
79 AM275X_DEV_MCU_GPIO0
83 AM275X_DEV_LED0
85 AM275X_DEV_DDPA0
86 AM275X_DEV_EPWM0
87 AM275X_DEV_EPWM1
88 AM275X_DEV_EPWM2
95 AM275X_DEV_WKUP_VTM0
96 AM275X_DEV_MAILBOX0
98 AM275X_DEV_MCAN0
99 AM275X_DEV_MCAN1
102 AM275X_DEV_I2C0
103 AM275X_DEV_I2C1
104 AM275X_DEV_I2C2
105 AM275X_DEV_I2C3
107 AM275X_DEV_WKUP_I2C0
110 AM275X_DEV_WKUP_TIMER0
111 AM275X_DEV_WKUP_TIMER1
114 AM275X_DEV_WKUP_UART0
116 AM275X_DEV_MCRC64_0
117 AM275X_DEV_WKUP_RTCSS0
118 AM275X_DEV_WKUP_R5FSS0_SS0
119 AM275X_DEV_WKUP_R5FSS0
121 AM275X_DEV_WKUP_R5FSS0_CORE0
127 AM275X_DEV_RTI0
128 AM275X_DEV_RTI1
130 AM275X_DEV_RTI2
131 AM275X_DEV_RTI3
132 AM275X_DEV_WKUP_RTI0
139 AM275X_DEV_PSCSS0
140 AM275X_DEV_WKUP_PSC0
141 AM275X_DEV_MCSPI0
142 AM275X_DEV_MCSPI1
143 AM275X_DEV_MCSPI2
144 AM275X_DEV_MCSPI3
145 AM275X_DEV_MCSPI4
146 AM275X_DEV_UART0
150 AM275X_DEV_SPINLOCK0
152 AM275X_DEV_UART1
153 AM275X_DEV_UART2
154 AM275X_DEV_UART3
155 AM275X_DEV_UART4
156 AM275X_DEV_UART5
157 AM275X_DEV_BOARD0
158 AM275X_DEV_UART6
161 AM275X_DEV_USB0
165 AM275X_DEV_WKUP_PBIST0
171 AM275X_DEV_DEBUGSS0
176 AM275X_DEV_WKUP_DEEPSLEEP_SOURCES0
178 AM275X_DEV_MAIN_USB0_ISO_VD
180 AM275X_DEV_MCU_MCU_16FF0
183 AM275X_DEV_DCC6
190 AM275X_DEV_MCASP0
191 AM275X_DEV_MCASP1
192 AM275X_DEV_MCASP2
193 AM275X_DEV_CLK_32K_RC_SEL_DEV_VD
194 AM275X_DEV_CPT2_AGGR1
195 AM275X_DEV_CPT2_AGGR0
196 AM275X_DEV_CPT2_AGGR2
197 AM275X_DEV_MCU_DCC1
205 AM275X_DEV_RTI4
207 AM275X_DEV_C7X256V0
208 AM275X_DEV_C7X256V0_C7XV_CORE_0
209 AM275X_DEV_C7X256V0_CORE0
210 AM275X_DEV_C7X256V0_CLEC
211 AM275X_DEV_C7X256V0_CLK
212 AM275X_DEV_C7X256V0_DEBUG
213 AM275X_DEV_C7X256V0_GICSS
214 AM275X_DEV_C7X256V0_PBIST
226 AM275X_DEV_WKUP_CLKOUT_SEL_DEV_VD
227 AM275X_DEV_MCU_OBSCLK_MUX_SEL_DEV_VD
228 AM275X_DEV_OBSCLK0_MUX_SEL_DEV_VD
229 AM275X_DEV_DCC7
230 AM275X_DEV_DCC8
246 AM275X_DEV_ATL0
254 AM275X_DEV_PBIST1
255 AM275X_DEV_MCASP3
256 AM275X_DEV_MCASP4
257 AM275X_DEV_I2C4
263 AM275X_DEV_RTI5
267 AM275X_DEV_C7X256V1
268 AM275X_DEV_C7X256V1_C7XV_CORE_0
269 AM275X_DEV_C7X256V1_CORE0
270 AM275X_DEV_C7X256V1_CLEC
271 AM275X_DEV_C7X256V1_CLK
272 AM275X_DEV_C7X256V1_DEBUG
273 AM275X_DEV_C7X256V1_GICSS
274 AM275X_DEV_C7X256V1_PBIST
288 AM275X_DEV_TIMER12
289 AM275X_DEV_TIMER13
290 AM275X_DEV_TIMER14
291 AM275X_DEV_TIMER15
292 AM275X_DEV_ECAP3
293 AM275X_DEV_ECAP4
294 AM275X_DEV_ECAP5
295 AM275X_DEV_FSS1_HYPERBUS1P0_0
296 AM275X_DEV_FSS1_MISC_0
297 AM275X_DEV_FSS1_OSPI_1
298 AM275X_DEV_FSS0
299 AM275X_DEV_AASRC0
300 AM275X_DEV_AASRC1
301 AM275X_DEV_PBIST0
302 AM275X_DEV_PBIST2
303 AM275X_DEV_PBIST3
304 AM275X_DEV_PBIST4
305 AM275X_DEV_PBIST5
306 AM275X_DEV_PBIST6
307 AM275X_DEV_PBIST7
308 AM275X_DEV_PBIST8
309 AM275X_DEV_WKUP_PBIST1
310 AM275X_DEV_MCAN2
311 AM275X_DEV_MCAN3
312 AM275X_DEV_MCAN4
313 AM275X_DEV_MLB0
314 AM275X_DEV_I2C5
315 AM275X_DEV_I2C6
316 AM275X_DEV_R5FSS0
317 AM275X_DEV_R5FSS1
318 AM275X_DEV_R5FSS0_CORE0
319 AM275X_DEV_R5FSS0_CORE1
320 AM275X_DEV_R5FSS1_CORE0
321 AM275X_DEV_R5FSS1_CORE1
322 AM275X_DEV_RL2_OF_CBA4_0
323 AM275X_DEV_RL2_OF_CBA4_1
324 AM275X_DEV_RL2_OF_CBA4_2
325 AM275X_DEV_RL2_OF_CBA4_3
326 AM275X_DEV_RL2_CORE0_CFG0
327 AM275X_DEV_RL2_CORE0_CFG1
328 AM275X_DEV_RL2_CORE1_CFG0
329 AM275X_DEV_RL2_CORE1_CFG1
330 AM275X_DEV_MCASP0_AUXCLK_SEL_DEV_VD
331 AM275X_DEV_MCASP1_AUXCLK_SEL_DEV_VD
332 AM275X_DEV_MCASP2_AUXCLK_SEL_DEV_VD
333 AM275X_DEV_MCASP3_AUXCLK_SEL_DEV_VD
334 AM275X_DEV_MCASP4_AUXCLK_SEL_DEV_VD
335 AM275X_DEV_MCASP0_LOCAL_AUXCLK_SEL_DEV_VD
336 AM275X_DEV_MCASP1_LOCAL_AUXCLK_SEL_DEV_VD
337 AM275X_DEV_MCASP2_LOCAL_AUXCLK_SEL_DEV_VD
338 AM275X_DEV_MCASP3_LOCAL_AUXCLK_SEL_DEV_VD
339 AM275X_DEV_MCASP4_LOCAL_AUXCLK_SEL_DEV_VD