SPIMSP432E4DMA Hardware attributes. More...

#include <SPIMSP432E4DMA.h>

Data Fields
uint32_t	baseAddr

uint32_t	intNum

uint32_t	intPriority

uint16_t *	scratchBufPtr

uint16_t	defaultTxBufValue

uint32_t	rxDmaChannel

uint32_t	txDmaChannel

uint16_t	minDmaTransferSize

uint32_t	clkPinMask

uint32_t	fssPinMask

uint32_t	xdat0PinMask

uint32_t	xdat1PinMask

Detailed Description

SPIMSP432E4DMA Hardware attributes.

These fields, with the exception of intPriority, are used by driverlib APIs and therefore must be populated by driverlib macro definitions. For MSP432E4 driverlib these definitions are found in:

ti/devices/msp432e4/inc/msp432e4xx.h
ti/devices/msp432e4/driverlib/interrupt.h
ti/devices/msp432e4/driverlib/udma.h

intPriority is the SPI peripheral's interrupt priority, as defined by the underlying OS. It is passed unmodified to the underlying OS's interrupt handler creation code, so you need to refer to the OS documentation for usage. For example, for SYS/BIOS applications, refer to the ti.sysbios.family.arm.m3.Hwi documentation for SYS/BIOS usage of interrupt priorities. If the driver uses the ti.dpl interface instead of making OS calls directly, then the HwiP port handles the interrupt priority in an OS specific way. In the case of the SYS/BIOS port, intPriority is passed unmodified to Hwi_create().

A sample structure is shown below:

uint32_t spiMSP432E4DMAscratchBuf;
const SPIMSP432E4DMA_HWAttrs spiMSP432E4DMAobjects[] = {
    {
        .baseAddr = SSI2_BASE,
        .intNum = INT_SSI2,
        .intPriority = (~0),
        .defaultTxBufValue = (~0),
        .rxDmaChannel = UDMA_CH12_SSI2RX,
        .txDmaChannel = UDMA_CH13_SSI2TX,
        .minDmaTransferSize = 10,
        .clkPinMask = SPIMSP432E4_PD3_SSI2CLK,
        .fssPinMask = SPIMSP432E4_PD2_SSI2FSS,
        .xdat0PinMask = SPIMSP432E4_PD1_SSI2XDAT0,
        .xdat1PinMask = SPIMSP432E4_PD0_SSI2XDAT1
    }
};

Field Documentation

§ baseAddr

uint32_t SPIMSP432E4DMA_HWAttrs::baseAddr

SSI Peripheral's base address

§ intNum

uint32_t SPIMSP432E4DMA_HWAttrs::intNum

SSI MSP432E4DMA Peripheral's interrupt vector

§ intPriority

uint32_t SPIMSP432E4DMA_HWAttrs::intPriority

SPIMSP432E4DMA Peripheral's interrupt priority

§ scratchBufPtr

uint16_t* SPIMSP432E4DMA_HWAttrs::scratchBufPtr

Address of a scratch buffer of size uint32_t

§ defaultTxBufValue

uint16_t SPIMSP432E4DMA_HWAttrs::defaultTxBufValue

Default TX value if txBuf == NULL

§ rxDmaChannel

uint32_t SPIMSP432E4DMA_HWAttrs::rxDmaChannel

uDMA channel for RX data

§ txDmaChannel

uint32_t SPIMSP432E4DMA_HWAttrs::txDmaChannel

uDMA channel for TX data

§ minDmaTransferSize

uint16_t SPIMSP432E4DMA_HWAttrs::minDmaTransferSize

Minimum amount of data frames for DMA transfer

§ clkPinMask

uint32_t SPIMSP432E4DMA_HWAttrs::clkPinMask

Pin mask for SSI CLK

§ fssPinMask

uint32_t SPIMSP432E4DMA_HWAttrs::fssPinMask

Pin mask for SSI FSS

§ xdat0PinMask

uint32_t SPIMSP432E4DMA_HWAttrs::xdat0PinMask

Pin mask for SSI XDAT0

§ xdat1PinMask

uint32_t SPIMSP432E4DMA_HWAttrs::xdat1PinMask

Pin mask for SSI XDAT1

The documentation for this struct was generated from the following file:

SPIMSP432E4DMA.h

Data Fields