CaptureMSP432.h

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/*!****************************************************************************
 *  @file       CaptureMSP432.h
 *  @brief      Capture driver interface for MSP432 devices
 *
 *  Refer to @ref Capture.h for a complete description of APIs & example
 *  of use.
 *
 * # Operation #
 * This driver leverages the Timer_A peripheral of the MSP432 device. Each
 * instance of a capture driver will occupy exactly one Timer_A peripheral on
 * the device. This is done to reduce contingencies and conflicts that may
 * arise from using more than one capture/compare registers on a Timer_A
 * peripheral.
 *
 * The specific capture/compare register and pin used by the
 * capture module is determined by the capturePort definition. If a mappable
 * pin is contained in the capturePort parameter of the CaptureMSP432_HWAttrs
 * structure, the driver will automatically configure the Port Mapping
 * Controller (PMAP) module with the correct/corresponding pin assignments.
 *
 * # Accuracy #
 * Each Timer_A peripheral has 16-bits of resolution. An appropriate
 * clockSource and clockDivider must be specified in the CaptureMSP432_HWAttrs
 * for each specific capture application. A higher clock rate may provide a
 * better capture resolution at the cost of a smaller capturable period. The
 * maximum capture period for a given clockSource and clockDivider is
 * calculated as:
 *
 * MAX_CAPTURE_PERIOD = 2 * ((clockDivider * MATCH_VALUE) / CYCLES_PER_US) - 1
 *
 * Given that:
 * MATCH_VALUE = 0xFFFF (65535)
 * CYCLES_PER_US = clockSource / 1000000
 *
 *  ### MPS432 Capture Driver Configuration #
 *
 *  In order to use the Capture APIs, the application is required
 *  to define 4 configuration items in the application ti_drivers_config.c file:
 *
 *  1.  An array of CaptureMSP432_Object elements, which will be used by
 *  by the driver to maintain instance state.
 *  Below is an example CaptureMSP432_Object array appropriate for the MSP432
 *  LaunchPad board:
 *  @code
 *    #include <ti/drivers/Capture.h>
 *    #include <ti/drivers/capture/CaptureMSP432.h>
 *
 *    CaptureMSP432_Object captureMSP432Objects[2];
 *  @endcode
 *
 *  2.  An array of CaptureMSP432_HWAttrs elements that defines which
 *  pin will be used by the corresponding capture instance
 *  (see @ref capturePortIdentifiersMSP432).
 *  Below is an example CaptureMSP432_HWAttrs array appropriate for the MSP432
 *  LaunchPad board:
 *  @code
 *  const CaptureMSP432_HWAttrs captureMSP432HWAttrs[2] = {
 *      {
 *          .timerBaseAddress = TIMER_A1_BASE,
 *          .clockSource = TIMER_A_CLOCKSOURCE_SMCLK,
 *          .clockDivider = TIMER_A_CLOCKSOURCE_DIVIDER_64,
 *          .capturePort = CaptureMSP432_P2_3_TA1,
 *          .intPriority = ~0
 *      },
 *      {
 *          .timerBaseAddress = TIMER_A2_BASE,
 *          .clockSource = TIMER_A_CLOCKSOURCE_ACLK,
 *          .clockDivider = TIMER_A_CLOCKSOURCE_DIVIDER_1,
 *          .capturePort = CaptureMSP432_P6_6_TA2,
 *          .intPriority = ~0
 *      },
 *  };
 *  @endcode
 *
 *  3.  An array of @ref Capture_Config elements, one for each Capture instance.
 *  Each element of this array identifies the device-specific API function
 *  table, the device specific capture object instance, and the device specific
 *  Hardware Attributes to be used for each capture channel.
 *  Below is an example @ref Capture_Config array appropriate for the MSP432
 *  LaunchPad board:
 *  @code
 *    const Capture_Config Capture_config[2] = {
 *      {
 *          .fxnTablePtr = &CaptureMSP432_captureFxnTable,
 *          .object = &captureMSP432Objects[0],
 *          .hwAttrs = &captureMSP432HWAttrs[0]
 *      },
 *      {
 *          .fxnTablePtr = &CaptureMSP432_captureFxnTable,
 *          .object = &captureMSP432Objects[1],
 *          .hwAttrs = &captureMSP432HWAttrs[1]
 *      }
 *    };
 *  @endcode
 *
 *  4.  A global variable, Capture_count, that informs the driver how many
 *  capture instances are defined:
 *  @code
 *    const uint_least8_t Capture_count = 2;
 *  @endcode
 *
 * # Resource Allocation #
 * The TimerMSP432_allocateTimerResource API will allocate a timer for exclusive
 * use. Any attempt to re-allocate this resource by the TimerMSP432, PWMMSP432,
 * or CaptureMSP432 drivers will result in a false value being returned from
 * the allocation API. To free a timer resource, the
 * TimerMSP432_freeTimerResource is used. The application is not responsible
 * for calling these allocation APIs directly.
 *
 * ### Power Management #
 * The TI-RTOS power management framework will try to put the device into the
 * most power efficient mode whenever possible. Please see the technical
 * reference manual for further details on each power mode.
 *
 *  The following statements are valid:
 *    - After Capture_open(): Clocks are enabled to the timer resource and the
 *      configured capture pin. Dynamic performance level changes are allowed.
 *    - After Capture_start(): DEEPSLEEP is disabled for MSP432P401x devices.
 *      Performance level changes are not allowed.
 *    - After Capture_stop(): Conditions are equal as for after Capture_open.
 *    - After Capture_close(): The underlying GPTimer is turned off, and the
 *      clocks to the timer and pin are disabled.
 *
 *  # Capture Modes #
 *  This device implementation only works with the following  modes for
 *  #Capture_Mode :
 *    - #Capture_RISING_EDGE
 *    - #Capture_FALLING_EDGE
 *    - #Capture_ANY_EDGE
 *  All other modes will fail.
 ******************************************************************************
 */
#ifndef ti_drivers_capture_CaptureMSP432__include
#define ti_drivers_capture_CaptureMSP432__include

#include <stdbool.h>
#include <stdint.h>

#include <ti/drivers/dpl/HwiP.h>
#include <ti/drivers/timer/TimerMSP432.h>
#include <ti/drivers/Capture.h>

#include <ti/devices/DeviceFamily.h>
#include <ti/devices/msp432p4xx/driverlib/interrupt.h>

#ifdef __cplusplus
extern "C"
{
#endif

/*
 *  Capture port definitions for MSP432 Timer_A pins.
 *
 *  The interrupt number is stored in bits 31 - 24
 *  The capture compare register is stored in bits 23 - 16
 *  The port mapping is stored in bits 15 - 8
 *  The port number is stored in bits 7 - 4
 *  The pin number is stored in bits 3 - 0
 *
 *    31 - 24          23 - 16             15 - 8       7 - 4     3 - 0
 *  ----------------------------------------------------------------------
 *  | Int Num | Capture Compare Register | Port Map | Port Num | Pin Num |
 *  ----------------------------------------------------------------------
 *
 * For ports 2, 3, and 7; the PMAP is used to map TA0/TA1 capture and
 * compare to any pin. Other ports have limited pin assignments.
 */
#define CAPTUREMSP432_INT_OFS     24
#define CAPTUREMSP432_CCR_OFS     16
#define CAPTUREMSP432_PMAP_OFS    8

#define CaptureMSP432_P2_0_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | 0x20 | \
       (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \
       (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P2_0_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \
            0x20 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) | \
            (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P2_1_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | \
            0x21 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \
            (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P2_1_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \
            0x21 | (INT_TA2_N << CAPTUREMSP432_INT_OFS) | \
            (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P2_2_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | \
            0x22 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \
            (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P2_2_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \
            0x22 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) | \
            (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P2_3_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | \
            0x23 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \
            (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P2_3_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \
            0x23 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) | \
            (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P2_4_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | \
            0x24 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \
            (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P2_4_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \
            0x24 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) | \
            (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P2_5_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | \
            0x25 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \
            (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P2_5_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \
            0x25 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) | \
            (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P2_6_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | \
            0x26 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \
            (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P2_6_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \
            0x26 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) | \
            (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P2_7_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | \
            0x27 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \
            (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P2_7_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \
            0x27 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) | \
            (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P3_0_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | \
            0x30 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \
            (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P3_0_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \
            0x30 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) | \
            (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P3_1_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | \
            0x31 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \
            (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P3_1_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \
            0x31 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) | \
            (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P3_2_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | \
            0x32 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \
            (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P3_2_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \
            0x32 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) | \
            (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P3_3_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | \
            0x33 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \
            (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P3_3_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \
            0x33 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) | \
            (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P3_4_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | \
            0x34 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \
            (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P3_4_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \
            0x34 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) | \
            (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P3_5_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | \
            0x35 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \
            (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P3_5_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \
            0x35 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) | \
            (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P3_6_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | \
            0x36 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \
            (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P3_6_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \
            0x36 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) | \
            (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P3_7_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | \
            0x37 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \
            (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P3_7_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \
            0x37 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) | \
            (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P5_6_TA2 (0x56 | (INT_TA2_N << CAPTUREMSP432_INT_OFS) |  \
        (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P5_7_TA2 (0x57 | (INT_TA2_N << CAPTUREMSP432_INT_OFS) |  \
        (TIMER_A_CAPTURECOMPARE_REGISTER_2 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P6_6_TA2 (0x66 | (INT_TA2_N << CAPTUREMSP432_INT_OFS) |  \
        (TIMER_A_CAPTURECOMPARE_REGISTER_3 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P6_7_TA2 (0x67 | (INT_TA2_N << CAPTUREMSP432_INT_OFS) |  \
        (TIMER_A_CAPTURECOMPARE_REGISTER_4 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P7_0_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | \
            0x70 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \
            (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P7_0_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \
            0x70 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) | \
            (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P7_1_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | \
            0x71 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \
            (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P7_1_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \
            0x71 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) | \
            (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P7_2_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | \
            0x72 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \
            (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P7_2_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \
            0x72 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) | \
            (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P7_3_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | \
            0x73 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \
            (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P7_3_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \
            0x73 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) | \
            (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P7_4_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | \
            0x74 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \
            (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P7_4_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \
            0x74 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) | \
            (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P7_5_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | \
            0x75 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \
            (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P7_5_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \
            0x75 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) | \
            (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P7_6_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | \
            0x76 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \
            (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P7_6_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \
            0x76 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) | \
            (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P7_7_TA0 ((PMAP_TA0CCR1A << CAPTUREMSP432_PMAP_OFS) | \
            0x77 | (INT_TA0_N << CAPTUREMSP432_INT_OFS) | \
            (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P7_7_TA1 ((PMAP_TA1CCR1A << CAPTUREMSP432_PMAP_OFS) | \
            0x77 | (INT_TA1_N << CAPTUREMSP432_INT_OFS) | \
            (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P8_0_TA1 (0x80 | (INT_TA1_0 << CAPTUREMSP432_INT_OFS) |  \
            (TIMER_A_CAPTURECOMPARE_REGISTER_0 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P8_1_TA2 (0x81 | (INT_TA2_0 << CAPTUREMSP432_INT_OFS) |  \
            (TIMER_A_CAPTURECOMPARE_REGISTER_0 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P8_2_TA3 (0x82 | (INT_TA3_N << CAPTUREMSP432_INT_OFS) |  \
            (TIMER_A_CAPTURECOMPARE_REGISTER_2 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P9_2_TA3 (0x92 | (INT_TA3_N << CAPTUREMSP432_INT_OFS) |  \
            (TIMER_A_CAPTURECOMPARE_REGISTER_3 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P9_3_TA3 (0x93 | (INT_TA3_N << CAPTUREMSP432_INT_OFS) |  \
            (TIMER_A_CAPTURECOMPARE_REGISTER_4 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P10_4_TA3 (0xA4 | (INT_TA3_0 << CAPTUREMSP432_INT_OFS) | \
            (TIMER_A_CAPTURECOMPARE_REGISTER_0 << CAPTUREMSP432_CCR_OFS))

#define CaptureMSP432_P10_5_TA3 (0xA5 | (INT_TA3_1 << CAPTUREMSP432_INT_OFS) | \
            (TIMER_A_CAPTURECOMPARE_REGISTER_1 << CAPTUREMSP432_CCR_OFS))

extern const Capture_FxnTable CaptureMSP432_captureFxnTable;

typedef struct {
    uint32_t timerBaseAddress;

    uint32_t clockSource;

    uint32_t clockDivider;

    uint32_t capturePort;

    uint32_t intPriority;
} CaptureMSP432_HWAttrs;

typedef struct {
    HwiP_Handle           hwiHandle;
    Capture_CallBackFxn   callBack;
    Capture_PeriodUnits   periodUnits;
    uint32_t              previousCount;
    uint32_t              ccrRegister;
    bool                  isRunning;
} CaptureMSP432_Object;

#endif /* ti_drivers_capture_CaptureMSP432__include */