eUSCI Serial Peripheral Interface (SPI) serial communication module. More...

Data Structures
struct	_eUSCI_SPI_MasterConfig
	Type definition for _eUSCI_SPI_MasterConfig structure. More...

struct	_eUSCI_SPI_SlaveConfig
	Type definition for _eUSCI_SPI_SlaveConfig structure. More...

Macros
#define	EUSCI_SPI_CLOCKSOURCE_ACLK EUSCI_B_CTLW0_SSEL__ACLK

#define	EUSCI_SPI_CLOCKSOURCE_SMCLK EUSCI_B_CTLW0_SSEL__SMCLK

#define	EUSCI_SPI_MSB_FIRST EUSCI_B_CTLW0_MSB

#define	EUSCI_SPI_LSB_FIRST 0x00

#define	EUSCI_SPI_BUSY EUSCI_A_STATW_BUSY

#define	EUSCI_SPI_NOT_BUSY 0x00

#define	EUSCI_SPI_PHASE_DATA_CHANGED_ONFIRST_CAPTURED_ON_NEXT 0x00

#define	EUSCI_SPI_PHASE_DATA_CAPTURED_ONFIRST_CHANGED_ON_NEXT EUSCI_B_CTLW0_CKPH

#define	EUSCI_SPI_3PIN EUSCI_B_CTLW0_MODE_0

#define	EUSCI_SPI_4PIN_UCxSTE_ACTIVE_HIGH EUSCI_B_CTLW0_MODE_1

#define	EUSCI_SPI_4PIN_UCxSTE_ACTIVE_LOW EUSCI_B_CTLW0_MODE_2

#define	EUSCI_SPI_CLOCKPOLARITY_INACTIVITY_HIGH EUSCI_B_CTLW0_CKPL

#define	EUSCI_SPI_CLOCKPOLARITY_INACTIVITY_LOW 0x00

#define	EUSCI_SPI_TRANSMIT_INTERRUPT EUSCI_B_IE_TXIE_OFS

#define	EUSCI_SPI_RECEIVE_INTERRUPT EUSCI_B_IE_RXIE_OFS

#define	EUSCI_SPI_ENABLE_SIGNAL_FOR_4WIRE_SLAVE EUSCI_B_CTLW0_STEM

#define	EUSCI_SPI_PREVENT_CONFLICTS_WITH_OTHER_MASTERS 0x00

#define	EUSCI_B_SPI_PHASE_DATA_CHANGED_ONFIRST_CAPTURED_ON_NEXT 0x00

#define	EUSCI_B_SPI_PHASE_DATA_CAPTURED_ONFIRST_CHANGED_ON_NEXT EUSCI_B_CTLW0_CKPH

#define	EUSCI_B_SPI_MSB_FIRST EUSCI_B_CTLW0_MSB

#define	EUSCI_B_SPI_LSB_FIRST 0x00

#define	EUSCI_B_SPI_CLOCKPOLARITY_INACTIVITY_HIGH EUSCI_B_CTLW0_CKPL

#define	EUSCI_B_SPI_CLOCKPOLARITY_INACTIVITY_LOW 0x00

#define	EUSCI_B_SPI_CLOCKSOURCE_ACLK EUSCI_B_CTLW0_SSEL__ACLK

#define	EUSCI_B_SPI_CLOCKSOURCE_SMCLK EUSCI_B_CTLW0_SSEL__SMCLK

#define	EUSCI_B_SPI_3PIN EUSCI_B_CTLW0_MODE_0

#define	EUSCI_B_SPI_4PIN_UCxSTE_ACTIVE_HIGH EUSCI_B_CTLW0_MODE_1

#define	EUSCI_B_SPI_4PIN_UCxSTE_ACTIVE_LOW EUSCI_B_CTLW0_MODE_2

#define	EUSCI_B_SPI_PREVENT_CONFLICTS_WITH_OTHER_MASTERS 0x00

#define	EUSCI_B_SPI_ENABLE_SIGNAL_FOR_4WIRE_SLAVE EUSCI_B_CTLW0_STEM

#define	EUSCI_B_SPI_TRANSMIT_INTERRUPT EUSCI_B_IE_TXIE0

#define	EUSCI_B_SPI_RECEIVE_INTERRUPT EUSCI_B_IE_RXIE0

#define	EUSCI_B_SPI_BUSY EUSCI_B_STATW_BBUSY

#define	EUSCI_B_SPI_NOT_BUSY 0x00

#define	EUSCI_A_SPI_PHASE_DATA_CHANGED_ONFIRST_CAPTURED_ON_NEXT 0x00

#define	EUSCI_A_SPI_PHASE_DATA_CAPTURED_ONFIRST_CHANGED_ON_NEXT EUSCI_A_CTLW0_CKPH

#define	EUSCI_A_SPI_MSB_FIRST EUSCI_A_CTLW0_MSB

#define	EUSCI_A_SPI_LSB_FIRST 0x00

#define	EUSCI_A_SPI_CLOCKPOLARITY_INACTIVITY_HIGH EUSCI_A_CTLW0_CKPL

#define	EUSCI_A_SPI_CLOCKPOLARITY_INACTIVITY_LOW 0x00

#define	EUSCI_A_SPI_CLOCKSOURCE_ACLK EUSCI_A_CTLW0_SSEL__ACLK

#define	EUSCI_A_SPI_CLOCKSOURCE_SMCLK EUSCI_A_CTLW0_SSEL__SMCLK

#define	EUSCI_A_SPI_3PIN EUSCI_A_CTLW0_MODE_0

#define	EUSCI_A_SPI_4PIN_UCxSTE_ACTIVE_HIGH EUSCI_A_CTLW0_MODE_1

#define	EUSCI_A_SPI_4PIN_UCxSTE_ACTIVE_LOW EUSCI_A_CTLW0_MODE_2

#define	EUSCI_A_SPI_PREVENT_CONFLICTS_WITH_OTHER_MASTERS 0x00

#define	EUSCI_A_SPI_ENABLE_SIGNAL_FOR_4WIRE_SLAVE EUSCI_A_CTLW0_STEM

#define	EUSCI_A_SPI_TRANSMIT_INTERRUPT EUSCI_A_IE_TXIE

#define	EUSCI_A_SPI_RECEIVE_INTERRUPT EUSCI_A_IE_RXIE

#define	EUSCI_A_SPI_BUSY EUSCI_B_STATW_BBUSY

#define	EUSCI_A_SPI_NOT_BUSY 0x00

Typedefs
typedef struct _eUSCI_SPI_MasterConfig	eUSCI_SPI_MasterConfig

typedef struct _eUSCI_SPI_SlaveConfig	eUSCI_SPI_SlaveConfig

Functions
bool	SPI_initMaster (uint32_t moduleInstance, const eUSCI_SPI_MasterConfig *config)

void	SPI_selectFourPinFunctionality (uint32_t moduleInstance, uint_fast8_t select4PinFunctionality)

void	SPI_changeMasterClock (uint32_t moduleInstance, uint32_t clockSourceFrequency, uint32_t desiredSpiClock)

bool	SPI_initSlave (uint32_t moduleInstance, const eUSCI_SPI_SlaveConfig *config)

void	SPI_changeClockPhasePolarity (uint32_t moduleInstance, uint_fast16_t clockPhase, uint_fast16_t clockPolarity)

void	SPI_transmitData (uint32_t moduleInstance, uint_fast8_t transmitData)

uint8_t	SPI_receiveData (uint32_t moduleInstance)

void	SPI_enableModule (uint32_t moduleInstance)

void	SPI_disableModule (uint32_t moduleInstance)

uint32_t	SPI_getReceiveBufferAddressForDMA (uint32_t moduleInstance)

uint32_t	SPI_getTransmitBufferAddressForDMA (uint32_t moduleInstance)

uint_fast8_t	SPI_isBusy (uint32_t moduleInstance)

void	SPI_enableInterrupt (uint32_t moduleInstance, uint_fast8_t mask)

void	SPI_disableInterrupt (uint32_t moduleInstance, uint_fast8_t mask)

uint_fast8_t	SPI_getInterruptStatus (uint32_t moduleInstance, uint16_t mask)

uint_fast8_t	SPI_getEnabledInterruptStatus (uint32_t moduleInstance)

void	SPI_clearInterruptFlag (uint32_t moduleInstance, uint_fast8_t mask)

void	SPI_registerInterrupt (uint32_t moduleInstance, void(*intHandler)(void))

void	SPI_unregisterInterrupt (uint32_t moduleInstance)

void	EUSCI_A_SPI_select4PinFunctionality (uint32_t baseAddress, uint8_t select4PinFunctionality)
	Selects 4Pin Functionality. More...

void	EUSCI_A_SPI_masterChangeClock (uint32_t baseAddress, uint32_t clockSourceFrequency, uint32_t desiredSpiClock)
	Initializes the SPI Master clock. At the end of this function call, SPI module is left enabled. More...

bool	EUSCI_A_SPI_slaveInit (uint32_t baseAddress, uint16_t msbFirst, uint16_t clockPhase, uint16_t clockPolarity, uint16_t spiMode)
	Initializes the SPI Slave block. More...

void	EUSCI_A_SPI_changeClockPhasePolarity (uint32_t baseAddress, uint16_t clockPhase, uint16_t clockPolarity)
	Changes the SPI colock phase and polarity. At the end of this function call, SPI module is left enabled. More...

void	EUSCI_A_SPI_transmitData (uint32_t baseAddress, uint8_t transmitData)
	Transmits a byte from the SPI Module. More...

uint8_t	EUSCI_A_SPI_receiveData (uint32_t baseAddress)
	Receives a byte that has been sent to the SPI Module. More...

void	EUSCI_A_SPI_enableInterrupt (uint32_t baseAddress, uint8_t mask)
	Enables individual SPI interrupt sources. More...

void	EUSCI_A_SPI_disableInterrupt (uint32_t baseAddress, uint8_t mask)
	Disables individual SPI interrupt sources. More...

uint8_t	EUSCI_A_SPI_getInterruptStatus (uint32_t baseAddress, uint8_t mask)
	Gets the current SPI interrupt status. More...

void	EUSCI_A_SPI_clearInterruptFlag (uint32_t baseAddress, uint8_t mask)
	Clears the selected SPI interrupt status flag. More...

void	EUSCI_A_SPI_enable (uint32_t baseAddress)
	Enables the SPI block. More...

void	EUSCI_A_SPI_disable (uint32_t baseAddress)
	Disables the SPI block. More...

uint32_t	EUSCI_A_SPI_getReceiveBufferAddressForDMA (uint32_t baseAddress)
	Returns the address of the RX Buffer of the SPI for the DMA module. More...

uint32_t	EUSCI_A_SPI_getTransmitBufferAddressForDMA (uint32_t baseAddress)
	Returns the address of the TX Buffer of the SPI for the DMA module. More...

bool	EUSCI_A_SPI_isBusy (uint32_t baseAddress)
	Indicates whether or not the SPI bus is busy. More...

void	EUSCI_B_SPI_select4PinFunctionality (uint32_t baseAddress, uint8_t select4PinFunctionality)
	Selects 4Pin Functionality. More...

void	EUSCI_B_SPI_masterChangeClock (uint32_t baseAddress, uint32_t clockSourceFrequency, uint32_t desiredSpiClock)
	Initializes the SPI Master clock. At the end of this function call, SPI module is left enabled. More...

bool	EUSCI_B_SPI_slaveInit (uint32_t baseAddress, uint16_t msbFirst, uint16_t clockPhase, uint16_t clockPolarity, uint16_t spiMode)
	Initializes the SPI Slave block. More...

void	EUSCI_B_SPI_changeClockPhasePolarity (uint32_t baseAddress, uint16_t clockPhase, uint16_t clockPolarity)
	Changes the SPI colock phase and polarity. At the end of this function call, SPI module is left enabled. More...

void	EUSCI_B_SPI_transmitData (uint32_t baseAddress, uint8_t transmitData)
	Transmits a byte from the SPI Module. More...

uint8_t	EUSCI_B_SPI_receiveData (uint32_t baseAddress)
	Receives a byte that has been sent to the SPI Module. More...

void	EUSCI_B_SPI_enableInterrupt (uint32_t baseAddress, uint8_t mask)
	Enables individual SPI interrupt sources. More...

void	EUSCI_B_SPI_disableInterrupt (uint32_t baseAddress, uint8_t mask)
	Disables individual SPI interrupt sources. More...

uint8_t	EUSCI_B_SPI_getInterruptStatus (uint32_t baseAddress, uint8_t mask)
	Gets the current SPI interrupt status. More...

void	EUSCI_B_SPI_clearInterruptFlag (uint32_t baseAddress, uint8_t mask)
	Clears the selected SPI interrupt status flag. More...

void	EUSCI_B_SPI_enable (uint32_t baseAddress)
	Enables the SPI block. More...

void	EUSCI_B_SPI_disable (uint32_t baseAddress)
	Disables the SPI block. More...

uint32_t	EUSCI_B_SPI_getReceiveBufferAddressForDMA (uint32_t baseAddress)
	Returns the address of the RX Buffer of the SPI for the DMA module. More...

uint32_t	EUSCI_B_SPI_getTransmitBufferAddressForDMA (uint32_t baseAddress)
	Returns the address of the TX Buffer of the SPI for the DMA module. More...

bool	EUSCI_B_SPI_isBusy (uint32_t baseAddress)
	Indicates whether or not the SPI bus is busy. More...

Detailed Description

eUSCI Serial Peripheral Interface (SPI) serial communication module.

Module Operation

The Serial Peripheral Interface Bus or SPI bus is a synchronous serial data link standard named by Motorola that operates in full duplex mode. Devices communicate in master/slave mode where the master device initiates the data frame. Note for simplicity, the module name EUSCI_A and EUSCI_B have been omitted from the API names.

This library provides the API for handling a 3-wire SPI communication

The SPI module can be configured as either a master or a slave device.

The SPI module also includes a programmable bit rate clock divider and prescaler to generate the output serial clock derived from the SSI module's input clock.

Basic Operation Modes

To use the module as a master, the user must call SPI_masterInit() to configure the SPI Master. This is followed by enabling the SPI module using SPI_enable(). The interrupts are then enabled (if needed). It is recommended to enable the SPI module before enabling the interrupts. A data transmit is then initiated using SPI_transmitData and then when the receive flag is set, the received data is read using SPI_receiveData and this indicates that an RX/TX operation is complete.

To use the module as a slave, initialization is done using SPI_initSlave and this is followed by enabling the module using SPI_enableModule . Following this, the interrupts may be enabled as needed. When the receive flag is set, data is first transmitted using SPI_transmitData and this is followed by a data reception by SPI_receiveData .

Programming Example

The DriverLib package contains a variety of different code examples that demonstrate the usage of the SPI module. These code examples are accessible under the examples/ folder of the SDK release as well as through TI Resource Explorer if using Code Composer Studio. These code examples provide a comprehensive list of use cases as well as practical applications involving each module.

Below is a very brief code example showing how to configure the SPI module in 3wire master mode.

In the code snippet below, the configuration settings for SPI in 3wire master mode can be seen:

In this code snippet, the SPI module is configured and enabled for 3wire SPI operation using the DriverLib APIs:

Macro Definition Documentation

#define EUSCI_SPI_CLOCKSOURCE_ACLK EUSCI_B_CTLW0_SSEL__ACLK

#define EUSCI_SPI_CLOCKSOURCE_SMCLK EUSCI_B_CTLW0_SSEL__SMCLK

#define EUSCI_SPI_MSB_FIRST EUSCI_B_CTLW0_MSB

#define EUSCI_SPI_LSB_FIRST 0x00

#define EUSCI_SPI_BUSY EUSCI_A_STATW_BUSY

#define EUSCI_SPI_NOT_BUSY 0x00

#define EUSCI_SPI_PHASE_DATA_CHANGED_ONFIRST_CAPTURED_ON_NEXT 0x00

#define EUSCI_SPI_PHASE_DATA_CAPTURED_ONFIRST_CHANGED_ON_NEXT EUSCI_B_CTLW0_CKPH

#define EUSCI_SPI_3PIN EUSCI_B_CTLW0_MODE_0

#define EUSCI_SPI_4PIN_UCxSTE_ACTIVE_HIGH EUSCI_B_CTLW0_MODE_1

#define EUSCI_SPI_4PIN_UCxSTE_ACTIVE_LOW EUSCI_B_CTLW0_MODE_2

#define EUSCI_SPI_CLOCKPOLARITY_INACTIVITY_HIGH EUSCI_B_CTLW0_CKPL

#define EUSCI_SPI_CLOCKPOLARITY_INACTIVITY_LOW 0x00

#define EUSCI_SPI_TRANSMIT_INTERRUPT EUSCI_B_IE_TXIE_OFS

Referenced by SPI_getEnabledInterruptStatus().

#define EUSCI_SPI_RECEIVE_INTERRUPT EUSCI_B_IE_RXIE_OFS

Referenced by SPI_getEnabledInterruptStatus().

#define EUSCI_SPI_ENABLE_SIGNAL_FOR_4WIRE_SLAVE EUSCI_B_CTLW0_STEM

#define EUSCI_SPI_PREVENT_CONFLICTS_WITH_OTHER_MASTERS 0x00

#define EUSCI_B_SPI_PHASE_DATA_CHANGED_ONFIRST_CAPTURED_ON_NEXT 0x00

Referenced by EUSCI_B_SPI_changeClockPhasePolarity(), EUSCI_B_SPI_slaveInit(), SPI_initMaster(), and SPI_initSlave().

#define EUSCI_B_SPI_PHASE_DATA_CAPTURED_ONFIRST_CHANGED_ON_NEXT EUSCI_B_CTLW0_CKPH

Referenced by EUSCI_B_SPI_changeClockPhasePolarity(), EUSCI_B_SPI_slaveInit(), SPI_initMaster(), and SPI_initSlave().

#define EUSCI_B_SPI_MSB_FIRST EUSCI_B_CTLW0_MSB

Referenced by EUSCI_B_SPI_slaveInit(), SPI_initMaster(), and SPI_initSlave().

#define EUSCI_B_SPI_LSB_FIRST 0x00

Referenced by EUSCI_B_SPI_slaveInit(), SPI_initMaster(), and SPI_initSlave().

#define EUSCI_B_SPI_CLOCKPOLARITY_INACTIVITY_HIGH EUSCI_B_CTLW0_CKPL

Referenced by EUSCI_B_SPI_changeClockPhasePolarity(), EUSCI_B_SPI_slaveInit(), SPI_initMaster(), and SPI_initSlave().

#define EUSCI_B_SPI_CLOCKPOLARITY_INACTIVITY_LOW 0x00

Referenced by EUSCI_B_SPI_changeClockPhasePolarity(), EUSCI_B_SPI_slaveInit(), SPI_initMaster(), and SPI_initSlave().

#define EUSCI_B_SPI_CLOCKSOURCE_ACLK EUSCI_B_CTLW0_SSEL__ACLK

Referenced by SPI_initMaster().

#define EUSCI_B_SPI_CLOCKSOURCE_SMCLK EUSCI_B_CTLW0_SSEL__SMCLK

Referenced by SPI_initMaster().

#define EUSCI_B_SPI_3PIN EUSCI_B_CTLW0_MODE_0

Referenced by EUSCI_B_SPI_slaveInit(), SPI_initMaster(), and SPI_initSlave().

#define EUSCI_B_SPI_4PIN_UCxSTE_ACTIVE_HIGH EUSCI_B_CTLW0_MODE_1

Referenced by EUSCI_B_SPI_slaveInit(), SPI_initMaster(), and SPI_initSlave().

#define EUSCI_B_SPI_4PIN_UCxSTE_ACTIVE_LOW EUSCI_B_CTLW0_MODE_2

Referenced by EUSCI_B_SPI_slaveInit(), SPI_initMaster(), and SPI_initSlave().

#define EUSCI_B_SPI_PREVENT_CONFLICTS_WITH_OTHER_MASTERS 0x00

Referenced by EUSCI_B_SPI_select4PinFunctionality().

#define EUSCI_B_SPI_ENABLE_SIGNAL_FOR_4WIRE_SLAVE EUSCI_B_CTLW0_STEM

Referenced by EUSCI_B_SPI_select4PinFunctionality().

#define EUSCI_B_SPI_TRANSMIT_INTERRUPT EUSCI_B_IE_TXIE0

Referenced by EUSCI_B_SPI_clearInterruptFlag(), EUSCI_B_SPI_disableInterrupt(), EUSCI_B_SPI_enableInterrupt(), and EUSCI_B_SPI_getInterruptStatus().

#define EUSCI_B_SPI_RECEIVE_INTERRUPT EUSCI_B_IE_RXIE0

Referenced by EUSCI_B_SPI_clearInterruptFlag(), EUSCI_B_SPI_disableInterrupt(), EUSCI_B_SPI_enableInterrupt(), and EUSCI_B_SPI_getInterruptStatus().

#define EUSCI_B_SPI_BUSY EUSCI_B_STATW_BBUSY

#define EUSCI_B_SPI_NOT_BUSY 0x00

#define EUSCI_A_SPI_PHASE_DATA_CHANGED_ONFIRST_CAPTURED_ON_NEXT 0x00

Referenced by EUSCI_A_SPI_changeClockPhasePolarity(), EUSCI_A_SPI_slaveInit(), SPI_initMaster(), and SPI_initSlave().

#define EUSCI_A_SPI_PHASE_DATA_CAPTURED_ONFIRST_CHANGED_ON_NEXT EUSCI_A_CTLW0_CKPH

Referenced by EUSCI_A_SPI_changeClockPhasePolarity(), EUSCI_A_SPI_slaveInit(), SPI_initMaster(), and SPI_initSlave().

#define EUSCI_A_SPI_MSB_FIRST EUSCI_A_CTLW0_MSB

Referenced by EUSCI_A_SPI_slaveInit(), SPI_initMaster(), and SPI_initSlave().

#define EUSCI_A_SPI_LSB_FIRST 0x00

Referenced by EUSCI_A_SPI_slaveInit(), SPI_initMaster(), and SPI_initSlave().

#define EUSCI_A_SPI_CLOCKPOLARITY_INACTIVITY_HIGH EUSCI_A_CTLW0_CKPL

Referenced by EUSCI_A_SPI_changeClockPhasePolarity(), EUSCI_A_SPI_slaveInit(), SPI_initMaster(), and SPI_initSlave().

#define EUSCI_A_SPI_CLOCKPOLARITY_INACTIVITY_LOW 0x00

Referenced by EUSCI_A_SPI_changeClockPhasePolarity(), EUSCI_A_SPI_slaveInit(), SPI_initMaster(), and SPI_initSlave().

#define EUSCI_A_SPI_CLOCKSOURCE_ACLK EUSCI_A_CTLW0_SSEL__ACLK

Referenced by SPI_initMaster().

#define EUSCI_A_SPI_CLOCKSOURCE_SMCLK EUSCI_A_CTLW0_SSEL__SMCLK

Referenced by SPI_initMaster().

#define EUSCI_A_SPI_3PIN EUSCI_A_CTLW0_MODE_0

Referenced by EUSCI_A_SPI_slaveInit(), SPI_initMaster(), and SPI_initSlave().

#define EUSCI_A_SPI_4PIN_UCxSTE_ACTIVE_HIGH EUSCI_A_CTLW0_MODE_1

Referenced by EUSCI_A_SPI_slaveInit(), SPI_initMaster(), and SPI_initSlave().

#define EUSCI_A_SPI_4PIN_UCxSTE_ACTIVE_LOW EUSCI_A_CTLW0_MODE_2

Referenced by EUSCI_A_SPI_slaveInit(), SPI_initMaster(), and SPI_initSlave().

#define EUSCI_A_SPI_PREVENT_CONFLICTS_WITH_OTHER_MASTERS 0x00

Referenced by EUSCI_A_SPI_select4PinFunctionality().

#define EUSCI_A_SPI_ENABLE_SIGNAL_FOR_4WIRE_SLAVE EUSCI_A_CTLW0_STEM

Referenced by EUSCI_A_SPI_select4PinFunctionality().

#define EUSCI_A_SPI_TRANSMIT_INTERRUPT EUSCI_A_IE_TXIE

Referenced by EUSCI_A_SPI_clearInterruptFlag(), EUSCI_A_SPI_disableInterrupt(), EUSCI_A_SPI_enableInterrupt(), and EUSCI_A_SPI_getInterruptStatus().

#define EUSCI_A_SPI_RECEIVE_INTERRUPT EUSCI_A_IE_RXIE

Referenced by EUSCI_A_SPI_clearInterruptFlag(), EUSCI_A_SPI_disableInterrupt(), EUSCI_A_SPI_enableInterrupt(), and EUSCI_A_SPI_getInterruptStatus().

#define EUSCI_A_SPI_BUSY EUSCI_B_STATW_BBUSY

#define EUSCI_A_SPI_NOT_BUSY 0x00

Typedef Documentation

typedef struct _eUSCI_SPI_MasterConfig eUSCI_SPI_MasterConfig

typedef struct _eUSCI_SPI_SlaveConfig eUSCI_SPI_SlaveConfig

Function Documentation

bool SPI_initMaster	(	uint32_t	moduleInstance,
		const eUSCI_SPI_MasterConfig *	config
	)

Initializes the SPI Master block.

Parameters

moduleInstance	is the instance of the eUSCI A/B module. Valid parameters vary from part to part, but can include: EUSCI_A0_BASE EUSCI_A1_BASE EUSCI_A2_BASE EUSCI_A3_BASE EUSCI_B0_BASE EUSCI_B1_BASE EUSCI_B2_BASE EUSCI_B3_BASE
config	Configuration structure for SPI master mode

Configuration options for eUSCI_SPI_MasterConfig structure.

Parameters

selectClockSource	selects clock source. Valid values are EUSCI_SPI_CLOCKSOURCE_ACLK EUSCI_SPI_CLOCKSOURCE_SMCLK
clockSourceFrequency	is the frequency of the selected clock source
desiredSpiClock	is the desired clock rate for SPI communication
msbFirst	controls the direction of the receive and transmit shift register. Valid values are EUSCI_SPI_MSB_FIRST EUSCI_SPI_LSB_FIRST [Default Value]
clockPhase	is clock phase select. Valid values are EUSCI_SPI_PHASE_DATA_CHANGED_ONFIRST_CAPTURED_ON_NEXT [Default Value] EUSCI_SPI_PHASE_DATA_CAPTURED_ONFIRST_CHANGED_ON_NEXT
clockPolarity	is clock polarity select. Valid values are EUSCI_SPI_CLOCKPOLARITY_INACTIVITY_HIGH EUSCI_SPI_CLOCKPOLARITY_INACTIVITY_LOW [Default Value]
spiMode	is SPI mode select. Valid values are EUSCI_SPI_3PIN [Default Value] EUSCI_SPI_4PIN_UCxSTE_ACTIVE_HIGH EUSCI_SPI_4PIN_UCxSTE_ACTIVE_LOW Upon successful initialization of the SPI master block, this function will have set the bus speed for the master, but the SPI Master block still remains disabled and must be enabled with SPI_enableModule()

Modified bits are UCCKPH, UCCKPL, UC7BIT, UCMSB,UCSSELx, UCSWRST bits of UCAxCTLW0 register

Returns: true

References ASSERT, _eUSCI_SPI_MasterConfig::clockPhase, _eUSCI_SPI_MasterConfig::clockPolarity, _eUSCI_SPI_MasterConfig::clockSourceFrequency, _eUSCI_SPI_MasterConfig::desiredSpiClock, EUSCI_A_CMSIS, EUSCI_A_SPI_3PIN, EUSCI_A_SPI_4PIN_UCxSTE_ACTIVE_HIGH, EUSCI_A_SPI_4PIN_UCxSTE_ACTIVE_LOW, EUSCI_A_SPI_CLOCKPOLARITY_INACTIVITY_HIGH, EUSCI_A_SPI_CLOCKPOLARITY_INACTIVITY_LOW, EUSCI_A_SPI_CLOCKSOURCE_ACLK, EUSCI_A_SPI_CLOCKSOURCE_SMCLK, EUSCI_A_SPI_LSB_FIRST, EUSCI_A_SPI_MSB_FIRST, EUSCI_A_SPI_PHASE_DATA_CAPTURED_ONFIRST_CHANGED_ON_NEXT, EUSCI_A_SPI_PHASE_DATA_CHANGED_ONFIRST_CAPTURED_ON_NEXT, EUSCI_B_CMSIS, EUSCI_B_SPI_3PIN, EUSCI_B_SPI_4PIN_UCxSTE_ACTIVE_HIGH, EUSCI_B_SPI_4PIN_UCxSTE_ACTIVE_LOW, EUSCI_B_SPI_CLOCKPOLARITY_INACTIVITY_HIGH, EUSCI_B_SPI_CLOCKPOLARITY_INACTIVITY_LOW, EUSCI_B_SPI_CLOCKSOURCE_ACLK, EUSCI_B_SPI_CLOCKSOURCE_SMCLK, EUSCI_B_SPI_LSB_FIRST, EUSCI_B_SPI_MSB_FIRST, EUSCI_B_SPI_PHASE_DATA_CAPTURED_ONFIRST_CHANGED_ON_NEXT, EUSCI_B_SPI_PHASE_DATA_CHANGED_ONFIRST_CAPTURED_ON_NEXT, _eUSCI_SPI_MasterConfig::msbFirst, _eUSCI_SPI_MasterConfig::selectClockSource, and _eUSCI_SPI_MasterConfig::spiMode.

void SPI_selectFourPinFunctionality	(	uint32_t	moduleInstance,
		uint_fast8_t	select4PinFunctionality
	)

Selects 4Pin Functionality

Parameters

moduleInstance	is the instance of the eUSCI A/B module. Valid parameters vary from part to part, but can include: EUSCI_A0_BASE EUSCI_A1_BASE EUSCI_A2_BASE EUSCI_A3_BASE EUSCI_B0_BASE EUSCI_B1_BASE EUSCI_B2_BASE EUSCI_B3_BASE
select4PinFunctionality	selects Clock source. Valid values are EUSCI_SPI_PREVENT_CONFLICTS_WITH_OTHER_MASTERS EUSCI_SPI_ENABLE_SIGNAL_FOR_4WIRE_SLAVE This function should be invoked only in 4-wire mode. Invoking this function has no effect in 3-wire mode.

Modified bits are UCSTEM bit of UCAxCTLW0 register

Returns: true

References EUSCI_A_SPI_select4PinFunctionality(), and EUSCI_B_SPI_select4PinFunctionality().

void SPI_changeMasterClock	(	uint32_t	moduleInstance,
		uint32_t	clockSourceFrequency,
		uint32_t	desiredSpiClock
	)

Initializes the SPI Master clock.At the end of this function call, SPI module is left enabled.

Parameters

moduleInstance	is the instance of the eUSCI A/B module. Valid parameters vary from part to part, but can include: EUSCI_A0_BASE EUSCI_A1_BASE EUSCI_A2_BASE EUSCI_A3_BASE EUSCI_B0_BASE EUSCI_B1_BASE EUSCI_B2_BASE EUSCI_B3_BASE
clockSourceFrequency	is the frequency of the selected clock source
desiredSpiClock	is the desired clock rate for SPI communication.

Modified bits are UCSWRST bit of UCAxCTLW0 register and UCAxBRW register

Returns: None

References EUSCI_A_SPI_masterChangeClock(), and EUSCI_B_SPI_masterChangeClock().

bool SPI_initSlave	(	uint32_t	moduleInstance,
		const eUSCI_SPI_SlaveConfig *	config
	)

Initializes the SPI Slave block.

Parameters

moduleInstance	is the instance of the eUSCI A/B module. Valid parameters vary from part to part, but can include: EUSCI_A0_BASE EUSCI_A1_BASE EUSCI_A2_BASE EUSCI_A3_BASE EUSCI_B0_BASE EUSCI_B1_BASE EUSCI_B2_BASE EUSCI_B3_BASE
config	Configuration structure for SPI slave mode

Configuration options for eUSCI_SPI_SlaveConfig structure.

Parameters

msbFirst	controls the direction of the receive and transmit shift register. Valid values are EUSCI_SPI_MSB_FIRST EUSCI_SPI_LSB_FIRST [Default Value]
clockPhase	is clock phase select. Valid values are EUSCI_SPI_PHASE_DATA_CHANGED_ONFIRST_CAPTURED_ON_NEXT [Default Value] EUSCI_SPI_PHASE_DATA_CAPTURED_ONFIRST_CHANGED_ON_NEXT
clockPolarity	is clock polarity select. Valid values are EUSCI_SPI_CLOCKPOLARITY_INACTIVITY_HIGH EUSCI_SPI_CLOCKPOLARITY_INACTIVITY_LOW [Default Value]
spiMode	is SPI mode select. Valid values are EUSCI_SPI_3PIN [Default Value] EUSCI_SPI_4PIN_UCxSTE_ACTIVE_HIGH EUSCI_SPI_4PIN_UCxSTE_ACTIVE_LOW Upon successful initialization of the SPI slave block, this function will have initialized the slave block, but the SPI Slave block still remains disabled and must be enabled with SPI_enableModule()

Modified bits are UCMSB, UC7BIT, UCMST, UCCKPL, UCCKPH, UCMODE, UCSWRST bits of UCAxCTLW0

Returns: true

References ASSERT, _eUSCI_SPI_SlaveConfig::clockPhase, _eUSCI_SPI_SlaveConfig::clockPolarity, EUSCI_A_CMSIS, EUSCI_A_SPI_3PIN, EUSCI_A_SPI_4PIN_UCxSTE_ACTIVE_HIGH, EUSCI_A_SPI_4PIN_UCxSTE_ACTIVE_LOW, EUSCI_A_SPI_CLOCKPOLARITY_INACTIVITY_HIGH, EUSCI_A_SPI_CLOCKPOLARITY_INACTIVITY_LOW, EUSCI_A_SPI_LSB_FIRST, EUSCI_A_SPI_MSB_FIRST, EUSCI_A_SPI_PHASE_DATA_CAPTURED_ONFIRST_CHANGED_ON_NEXT, EUSCI_A_SPI_PHASE_DATA_CHANGED_ONFIRST_CAPTURED_ON_NEXT, EUSCI_B_CMSIS, EUSCI_B_SPI_3PIN, EUSCI_B_SPI_4PIN_UCxSTE_ACTIVE_HIGH, EUSCI_B_SPI_4PIN_UCxSTE_ACTIVE_LOW, EUSCI_B_SPI_CLOCKPOLARITY_INACTIVITY_HIGH, EUSCI_B_SPI_CLOCKPOLARITY_INACTIVITY_LOW, EUSCI_B_SPI_LSB_FIRST, EUSCI_B_SPI_MSB_FIRST, EUSCI_B_SPI_PHASE_DATA_CAPTURED_ONFIRST_CHANGED_ON_NEXT, EUSCI_B_SPI_PHASE_DATA_CHANGED_ONFIRST_CAPTURED_ON_NEXT, _eUSCI_SPI_SlaveConfig::msbFirst, and _eUSCI_SPI_SlaveConfig::spiMode.

void SPI_changeClockPhasePolarity	(	uint32_t	moduleInstance,
		uint_fast16_t	clockPhase,
		uint_fast16_t	clockPolarity
	)

Changes the SPI clock phase and polarity.At the end of this function call, SPI module is left enabled.

Parameters

moduleInstance	is the instance of the eUSCI A/B module. Valid parameters vary from part to part, but can include: EUSCI_A0_BASE EUSCI_A1_BASE EUSCI_A2_BASE EUSCI_A3_BASE EUSCI_B0_BASE EUSCI_B1_BASE EUSCI_B2_BASE EUSCI_B3_BASE
clockPhase	is clock phase select. Valid values are: EUSCI_SPI_PHASE_DATA_CHANGED_ONFIRST_CAPTURED_ON_NEXT [Default Value] EUSCI_SPI_PHASE_DATA_CAPTURED_ONFIRST_CHANGED_ON_NEXT
clockPolarity	is clock polarity select. Valid values are: EUSCI_SPI_CLOCKPOLARITY_INACTIVITY_HIGH EUSCI_SPI_CLOCKPOLARITY_INACTIVITY_LOW [Default Value]

Modified bits are UCSWRST, UCCKPH, UCCKPL, UCSWRST bits of UCAxCTLW0

Returns: None

References EUSCI_A_SPI_changeClockPhasePolarity(), and EUSCI_B_SPI_changeClockPhasePolarity().

void SPI_transmitData	(	uint32_t	moduleInstance,
		uint_fast8_t	transmitData
	)

Transmits a byte from the SPI Module.

Parameters

moduleInstance	is the instance of the eUSCI A/B module. Valid parameters vary from part to part, but can include: EUSCI_A0_BASE EUSCI_A1_BASE EUSCI_A2_BASE EUSCI_A3_BASE EUSCI_B0_BASE EUSCI_B1_BASE EUSCI_B2_BASE EUSCI_B3_BASE
transmitData	data to be transmitted from the SPI module

This function will place the supplied data into SPI transmit data register to start transmission

Modified register is UCAxTXBUF

Returns: None.

References EUSCI_A_SPI_transmitData(), and EUSCI_B_SPI_transmitData().

uint8_t SPI_receiveData ( uint32_t moduleInstance )

Receives a byte that has been sent to the SPI Module.

Parameters

moduleInstance

is the instance of the eUSCI A/B module. Valid parameters vary from part to part, but can include:

EUSCI_A0_BASE
EUSCI_A1_BASE
EUSCI_A2_BASE
EUSCI_A3_BASE
EUSCI_B0_BASE
EUSCI_B1_BASE
EUSCI_B2_BASE
EUSCI_B3_BASE

This function reads a byte of data from the SPI receive data Register.

Returns: Returns the byte received from by the SPI module, cast as an uint8_t.

References EUSCI_A_SPI_receiveData(), and EUSCI_B_SPI_receiveData().

void SPI_enableModule ( uint32_t moduleInstance )

Enables the SPI block.

Parameters

moduleInstance

is the instance of the eUSCI A/B module. Valid parameters vary from part to part, but can include:

EUSCI_A0_BASE
EUSCI_A1_BASE
EUSCI_A2_BASE
EUSCI_A3_BASE
EUSCI_B0_BASE
EUSCI_B1_BASE
EUSCI_B2_BASE
EUSCI_B3_BASE

This will enable operation of the SPI block. Modified bits are UCSWRST bit of UCAxCTLW0 register.

Returns: None.

References EUSCI_A_SPI_enable(), and EUSCI_B_SPI_enable().

void SPI_disableModule ( uint32_t moduleInstance )

Disables the SPI block.

Parameters

moduleInstance

is the instance of the eUSCI A/B module. Valid parameters vary from part to part, but can include:

EUSCI_A0_BASE
EUSCI_A1_BASE
EUSCI_A2_BASE
EUSCI_A3_BASE
EUSCI_B0_BASE
EUSCI_B1_BASE
EUSCI_B2_BASE
EUSCI_B3_BASE

This will disable operation of the SPI block.

Modified bits are UCSWRST bit of UCAxCTLW0 register.

Returns: None.

References EUSCI_A_SPI_disable(), and EUSCI_B_SPI_disable().

uint32_t SPI_getReceiveBufferAddressForDMA ( uint32_t moduleInstance )

Returns the address of the RX Buffer of the SPI for the DMA module.

Parameters

moduleInstance

is the instance of the eUSCI A/B module. Valid parameters vary from part to part, but can include:

EUSCI_A0_BASE
EUSCI_A1_BASE
EUSCI_A2_BASE
EUSCI_A3_BASE
EUSCI_B0_BASE
EUSCI_B1_BASE
EUSCI_B2_BASE
EUSCI_B3_BASE

Returns the address of the SPI RX Buffer. This can be used in conjunction with the DMA to store the received data directly to memory.

Returns: NONE

References EUSCI_A_SPI_getReceiveBufferAddressForDMA(), and EUSCI_B_SPI_getReceiveBufferAddressForDMA().

uint32_t SPI_getTransmitBufferAddressForDMA ( uint32_t moduleInstance )

Returns the address of the TX Buffer of the SPI for the DMA module.

Parameters

moduleInstance

is the instance of the eUSCI A/B module. Valid parameters vary from part to part, but can include:

EUSCI_A0_BASE
EUSCI_A1_BASE
EUSCI_A2_BASE
EUSCI_A3_BASE
EUSCI_B0_BASE
EUSCI_B1_BASE
EUSCI_B2_BASE
EUSCI_B3_BASE

Returns the address of the SPI TX Buffer. This can be used in conjunction with the DMA to obtain transmitted data directly from memory.

Returns: NONE

References EUSCI_A_SPI_getTransmitBufferAddressForDMA(), and EUSCI_B_SPI_getTransmitBufferAddressForDMA().

uint_fast8_t SPI_isBusy ( uint32_t moduleInstance )

Indicates whether or not the SPI bus is busy.

Parameters

moduleInstance

is the instance of the eUSCI A/B module. Valid parameters vary from part to part, but can include:

EUSCI_A0_BASE
EUSCI_A1_BASE
EUSCI_A2_BASE
EUSCI_A3_BASE
EUSCI_B0_BASE
EUSCI_B1_BASE
EUSCI_B2_BASE
EUSCI_B3_BASE

This function returns an indication of whether or not the SPI bus is busy.This function checks the status of the bus via UCBBUSY bit

Returns: EUSCI_SPI_BUSY if the SPI module transmitting or receiving is busy; otherwise, returns EUSCI_SPI_NOT_BUSY.

References EUSCI_A_SPI_isBusy(), and EUSCI_B_SPI_isBusy().

void SPI_enableInterrupt	(	uint32_t	moduleInstance,
		uint_fast8_t	mask
	)

Enables individual SPI interrupt sources.

Parameters

moduleInstance	is the instance of the eUSCI A/B module. Valid parameters vary from part to part, but can include: EUSCI_A0_BASE EUSCI_A1_BASE EUSCI_A2_BASE EUSCI_A3_BASE EUSCI_B0_BASE EUSCI_B1_BASE EUSCI_B2_BASE EUSCI_B3_BASE
mask	is the bit mask of the interrupt sources to be enabled.

Enables the indicated SPI interrupt sources. Only the sources that are enabled can be reflected to the processor interrupt; disabled sources have no effect on the processor.

The mask parameter is the logical OR of any of the following:

EUSCI_SPI_RECEIVE_INTERRUPT Receive interrupt
EUSCI_SPI_TRANSMIT_INTERRUPT Transmit interrupt

Modified registers are UCAxIFG and UCAxIE

Returns: None.

References EUSCI_A_SPI_enableInterrupt(), and EUSCI_B_SPI_enableInterrupt().

void SPI_disableInterrupt	(	uint32_t	moduleInstance,
		uint_fast8_t	mask
	)

Disables individual SPI interrupt sources.

Parameters

moduleInstance	is the instance of the eUSCI A/B module. Valid parameters vary from part to part, but can include: EUSCI_A0_BASE EUSCI_A1_BASE EUSCI_A2_BASE EUSCI_A3_BASE EUSCI_B0_BASE EUSCI_B1_BASE EUSCI_B2_BASE EUSCI_B3_BASE
mask	is the bit mask of the interrupt sources to be disabled.

Disables the indicated SPI interrupt sources. Only the sources that are enabled can be reflected to the processor interrupt; disabled sources have no effect on the processor.

The mask parameter is the logical OR of any of the following:

EUSCI_SPI_RECEIVE_INTERRUPT Receive interrupt
EUSCI_SPI_TRANSMIT_INTERRUPT Transmit interrupt

Modified register is UCAxIE

Returns: None.

References EUSCI_A_SPI_disableInterrupt(), and EUSCI_B_SPI_disableInterrupt().

uint_fast8_t SPI_getInterruptStatus	(	uint32_t	moduleInstance,
		uint16_t	mask
	)

Gets the current SPI interrupt status.

Parameters

moduleInstance	is the instance of the eUSCI A/B module. Valid parameters vary from part to part, but can include: EUSCI_A0_BASE EUSCI_A1_BASE EUSCI_A2_BASE EUSCI_A3_BASE EUSCI_B0_BASE EUSCI_B1_BASE EUSCI_B2_BASE EUSCI_B3_BASE
mask	Mask of interrupt to filter. This can include: EUSCI_SPI_RECEIVE_INTERRUPT -Receive interrupt EUSCI_SPI_TRANSMIT_INTERRUPT - Transmit interrupt

Modified registers are UCAxIFG.

Returns

The current interrupt status as the mask of the set flags Mask parameter can be either any of the following selection:

EUSCI_SPI_RECEIVE_INTERRUPT -Receive interrupt
EUSCI_SPI_TRANSMIT_INTERRUPT - Transmit interrupt

References EUSCI_A_SPI_getInterruptStatus(), and EUSCI_B_SPI_getInterruptStatus().

Referenced by SPI_getEnabledInterruptStatus().

uint_fast8_t SPI_getEnabledInterruptStatus ( uint32_t moduleInstance )

Gets the current SPI interrupt status masked with the enabled interrupts. This function is useful to call in ISRs to get a list of pending interrupts that are actually enabled and could have caused the ISR.

Parameters

moduleInstance

is the instance of the eUSCI A/B module. Valid parameters vary from part to part, but can include:

EUSCI_A0_BASE
EUSCI_A1_BASE
EUSCI_A2_BASE
EUSCI_A3_BASE
EUSCI_B0_BASE
EUSCI_B1_BASE
EUSCI_B2_BASE
EUSCI_B3_BASE

Modified registers are UCAxIFG.

Returns

The current interrupt status as the mask of the set flags Mask parameter can be either any of the following selection:

EUSCI_SPI_RECEIVE_INTERRUPT -Receive interrupt
EUSCI_SPI_TRANSMIT_INTERRUPT - Transmit interrupt

References EUSCI_A_CMSIS, EUSCI_B_CMSIS, EUSCI_SPI_RECEIVE_INTERRUPT, EUSCI_SPI_TRANSMIT_INTERRUPT, and SPI_getInterruptStatus().

void SPI_clearInterruptFlag	(	uint32_t	moduleInstance,
		uint_fast8_t	mask
	)

Clears the selected SPI interrupt status flag.

Parameters

moduleInstance	is the instance of the eUSCI A/B module. Valid parameters vary from part to part, but can include: EUSCI_A0_BASE EUSCI_A1_BASE EUSCI_A2_BASE EUSCI_A3_BASE EUSCI_B0_BASE EUSCI_B1_BASE EUSCI_B2_BASE EUSCI_B3_BASE
mask	is the masked interrupt flag to be cleared.

The mask parameter is the logical OR of any of the following:

EUSCI_SPI_RECEIVE_INTERRUPT -Receive interrupt
EUSCI_SPI_TRANSMIT_INTERRUPT - Transmit interrupt Modified registers are UCAxIFG.

Returns: None

References EUSCI_A_SPI_clearInterruptFlag(), and EUSCI_B_SPI_clearInterruptFlag().

void SPI_registerInterrupt	(	uint32_t	moduleInstance,
		void(*)(void)	intHandler
	)

Registers an interrupt handler for the timer capture compare interrupt.

Parameters

moduleInstance

is the instance of the eUSCI (SPI) module. Valid parameters vary from part to part, but can include:

EUSCI_A0_BASE
EUSCI_A1_BASE
EUSCI_A2_BASE
EUSCI_A3_BASE
EUSCI_B0_BASE
EUSCI_B1_BASE
EUSCI_B2_BASE
EUSCI_B3_BASE It is important to note that for eUSCI modules, only "B" modules such as EUSCI_B0 can be used. "A" modules such as EUSCI_A0 do not support the I2C mode.

intHandler is a pointer to the function to be called when the timer capture compare interrupt occurs.

This function registers the handler to be called when a timer interrupt occurs. This function enables the global interrupt in the interrupt controller; specific SPI interrupts must be enabled via SPI_enableInterrupt(). It is the interrupt handler's responsibility to clear the interrupt source via SPI_clearInterruptFlag().

Returns: None.

References ASSERT, INT_EUSCIA0, INT_EUSCIA1, INT_EUSCIA2, INT_EUSCIA3, INT_EUSCIB0, INT_EUSCIB1, INT_EUSCIB2, INT_EUSCIB3, Interrupt_enableInterrupt(), and Interrupt_registerInterrupt().

void SPI_unregisterInterrupt ( uint32_t moduleInstance )

Unregisters the interrupt handler for the timer

Parameters

moduleInstance

is the instance of the eUSCI A/B module. Valid parameters vary from part to part, but can include:

EUSCI_A0_BASE
EUSCI_A1_BASE
EUSCI_A2_BASE
EUSCI_A3_BASE
EUSCI_B0_BASE
EUSCI_B1_BASE
EUSCI_B2_BASE
EUSCI_B3_BASE

This function unregisters the handler to be called when timer interrupt occurs. This function also masks off the interrupt in the interrupt controller so that the interrupt handler no longer is called.

See Also: Interrupt_registerInterrupt() for important information about registering interrupt handlers.

Returns: None.

References ASSERT, INT_EUSCIA0, INT_EUSCIA1, INT_EUSCIA2, INT_EUSCIA3, INT_EUSCIB0, INT_EUSCIB1, INT_EUSCIB2, INT_EUSCIB3, Interrupt_disableInterrupt(), and Interrupt_unregisterInterrupt().

void EUSCI_A_SPI_select4PinFunctionality	(	uint32_t	baseAddress,
		uint8_t	select4PinFunctionality
	)

Selects 4Pin Functionality.

This function should be invoked only in 4-wire mode. Invoking this function has no effect in 3-wire mode.

Parameters

baseAddress	is the base address of the EUSCI_A_SPI module.
select4PinFunctionality	selects 4 pin functionality Valid values are: EUSCI_A_SPI_PREVENT_CONFLICTS_WITH_OTHER_MASTERS EUSCI_A_SPI_ENABLE_SIGNAL_FOR_4WIRE_SLAVE

Modified bits are UCSTEM of UCAxCTLW0 register.

Returns: None

References ASSERT, EUSCI_A_CMSIS, EUSCI_A_SPI_ENABLE_SIGNAL_FOR_4WIRE_SLAVE, and EUSCI_A_SPI_PREVENT_CONFLICTS_WITH_OTHER_MASTERS.

Referenced by SPI_selectFourPinFunctionality().

void EUSCI_A_SPI_masterChangeClock	(	uint32_t	baseAddress,
		uint32_t	clockSourceFrequency,
		uint32_t	desiredSpiClock
	)

Initializes the SPI Master clock. At the end of this function call, SPI module is left enabled.

Parameters

baseAddress	is the base address of the EUSCI_A_SPI module.
clockSourceFrequency	is the frequency of the slected clock source
desiredSpiClock	is the desired clock rate for SPI communication

Modified bits are UCSWRST of UCAxCTLW0 register.

Returns: None

References EUSCI_A_CMSIS.

Referenced by SPI_changeMasterClock().

bool EUSCI_A_SPI_slaveInit	(	uint32_t	baseAddress,
		uint16_t	msbFirst,
		uint16_t	clockPhase,
		uint16_t	clockPolarity,
		uint16_t	spiMode
	)

Initializes the SPI Slave block.

Upon successful initialization of the SPI slave block, this function will have initailized the slave block, but the SPI Slave block still remains disabled and must be enabled with EUSCI_A_SPI_enable()

Parameters

baseAddress	is the base address of the EUSCI_A_SPI Slave module.
msbFirst	controls the direction of the receive and transmit shift register. Valid values are: EUSCI_A_SPI_MSB_FIRST EUSCI_A_SPI_LSB_FIRST [Default]
clockPhase	is clock phase select. Valid values are: EUSCI_A_SPI_PHASE_DATA_CHANGED_ONFIRST_CAPTURED_ON_NEXT [Default] EUSCI_A_SPI_PHASE_DATA_CAPTURED_ONFIRST_CHANGED_ON_NEXT
clockPolarity	is clock polarity select Valid values are: EUSCI_A_SPI_CLOCKPOLARITY_INACTIVITY_HIGH EUSCI_A_SPI_CLOCKPOLARITY_INACTIVITY_LOW [Default]
spiMode	is SPI mode select Valid values are: EUSCI_A_SPI_3PIN EUSCI_A_SPI_4PIN_UCxSTE_ACTIVE_HIGH EUSCI_A_SPI_4PIN_UCxSTE_ACTIVE_LOW

Modified bits are EUSCI_A_CTLW0_MSB, EUSCI_A_CTLW0_MST, EUSCI_A_CTLW0_SEVENBIT, EUSCI_A_CTLW0_CKPL, EUSCI_A_CTLW0_CKPH, UCMODE and UCSWRST of UCAxCTLW0 register.

Returns: true

References ASSERT, EUSCI_A_CMSIS, EUSCI_A_SPI_3PIN, EUSCI_A_SPI_4PIN_UCxSTE_ACTIVE_HIGH, EUSCI_A_SPI_4PIN_UCxSTE_ACTIVE_LOW, EUSCI_A_SPI_CLOCKPOLARITY_INACTIVITY_HIGH, EUSCI_A_SPI_CLOCKPOLARITY_INACTIVITY_LOW, EUSCI_A_SPI_LSB_FIRST, EUSCI_A_SPI_MSB_FIRST, EUSCI_A_SPI_PHASE_DATA_CAPTURED_ONFIRST_CHANGED_ON_NEXT, and EUSCI_A_SPI_PHASE_DATA_CHANGED_ONFIRST_CAPTURED_ON_NEXT.

void EUSCI_A_SPI_changeClockPhasePolarity	(	uint32_t	baseAddress,
		uint16_t	clockPhase,
		uint16_t	clockPolarity
	)

Changes the SPI colock phase and polarity. At the end of this function call, SPI module is left enabled.

Parameters

baseAddress	is the base address of the EUSCI_A_SPI module.
clockPhase	is clock phase select. Valid values are: EUSCI_A_SPI_PHASE_DATA_CHANGED_ONFIRST_CAPTURED_ON_NEXT [Default] EUSCI_A_SPI_PHASE_DATA_CAPTURED_ONFIRST_CHANGED_ON_NEXT
clockPolarity	is clock polarity select Valid values are: EUSCI_A_SPI_CLOCKPOLARITY_INACTIVITY_HIGH EUSCI_A_SPI_CLOCKPOLARITY_INACTIVITY_LOW [Default]

Modified bits are EUSCI_A_CTLW0_CKPL, EUSCI_A_CTLW0_CKPH and UCSWRST of UCAxCTLW0 register.

Returns: None

References ASSERT, EUSCI_A_CMSIS, EUSCI_A_SPI_CLOCKPOLARITY_INACTIVITY_HIGH, EUSCI_A_SPI_CLOCKPOLARITY_INACTIVITY_LOW, EUSCI_A_SPI_PHASE_DATA_CAPTURED_ONFIRST_CHANGED_ON_NEXT, and EUSCI_A_SPI_PHASE_DATA_CHANGED_ONFIRST_CAPTURED_ON_NEXT.

Referenced by SPI_changeClockPhasePolarity().

void EUSCI_A_SPI_transmitData	(	uint32_t	baseAddress,
		uint8_t	transmitData
	)

Transmits a byte from the SPI Module.

This function will place the supplied data into SPI trasmit data register to start transmission.

Parameters

baseAddress	is the base address of the EUSCI_A_SPI module.
transmitData	data to be transmitted from the SPI module

Returns: None

References EUSCI_A_CMSIS.

Referenced by SPI_transmitData().

uint8_t EUSCI_A_SPI_receiveData ( uint32_t baseAddress )

Receives a byte that has been sent to the SPI Module.

This function reads a byte of data from the SPI receive data Register.

Parameters

baseAddress is the base address of the EUSCI_A_SPI module.

Returns: Returns the byte received from by the SPI module, cast as an uint8_t.

References EUSCI_A_CMSIS.

Referenced by SPI_receiveData().

void EUSCI_A_SPI_enableInterrupt	(	uint32_t	baseAddress,
		uint8_t	mask
	)

Enables individual SPI interrupt sources.

Enables the indicated SPI interrupt sources. Only the sources that are enabled can be reflected to the processor interrupt; disabled sources have no effect on the processor. Does not clear interrupt flags.

Parameters

baseAddress	is the base address of the EUSCI_A_SPI module.
mask	is the bit mask of the interrupt sources to be enabled. Mask value is the logical OR of any of the following: EUSCI_A_SPI_TRANSMIT_INTERRUPT EUSCI_A_SPI_RECEIVE_INTERRUPT

Modified bits of UCAxIFG register and bits of UCAxIE register.

Returns: None

References ASSERT, EUSCI_A_CMSIS, EUSCI_A_SPI_RECEIVE_INTERRUPT, and EUSCI_A_SPI_TRANSMIT_INTERRUPT.

Referenced by SPI_enableInterrupt().

void EUSCI_A_SPI_disableInterrupt	(	uint32_t	baseAddress,
		uint8_t	mask
	)

Disables individual SPI interrupt sources.

Disables the indicated SPI interrupt sources. Only the sources that are enabled can be reflected to the processor interrupt; disabled sources have no effect on the processor.

Parameters

baseAddress	is the base address of the EUSCI_A_SPI module.
mask	is the bit mask of the interrupt sources to be disabled. Mask value is the logical OR of any of the following: EUSCI_A_SPI_TRANSMIT_INTERRUPT EUSCI_A_SPI_RECEIVE_INTERRUPT

Modified bits of UCAxIE register.

Returns: None

References ASSERT, EUSCI_A_CMSIS, EUSCI_A_SPI_RECEIVE_INTERRUPT, and EUSCI_A_SPI_TRANSMIT_INTERRUPT.

Referenced by SPI_disableInterrupt().

uint8_t EUSCI_A_SPI_getInterruptStatus	(	uint32_t	baseAddress,
		uint8_t	mask
	)

Gets the current SPI interrupt status.

This returns the interrupt status for the SPI module based on which flag is passed.

Parameters

baseAddress	is the base address of the EUSCI_A_SPI module.
mask	is the masked interrupt flag status to be returned. Mask value is the logical OR of any of the following: EUSCI_A_SPI_TRANSMIT_INTERRUPT EUSCI_A_SPI_RECEIVE_INTERRUPT

Returns

Logical OR of any of the following:

EUSCI_A_SPI_TRANSMIT_INTERRUPT
EUSCI_A_SPI_RECEIVE_INTERRUPT
indicating the status of the masked interrupts

References ASSERT, EUSCI_A_CMSIS, EUSCI_A_SPI_RECEIVE_INTERRUPT, and EUSCI_A_SPI_TRANSMIT_INTERRUPT.

Referenced by SPI_getInterruptStatus().

void EUSCI_A_SPI_clearInterruptFlag	(	uint32_t	baseAddress,
		uint8_t	mask
	)

Clears the selected SPI interrupt status flag.

Parameters

baseAddress	is the base address of the EUSCI_A_SPI module.
mask	is the masked interrupt flag to be cleared. Mask value is the logical OR of any of the following: EUSCI_A_SPI_TRANSMIT_INTERRUPT EUSCI_A_SPI_RECEIVE_INTERRUPT

Modified bits of UCAxIFG register.

Returns: None

References ASSERT, EUSCI_A_CMSIS, EUSCI_A_SPI_RECEIVE_INTERRUPT, and EUSCI_A_SPI_TRANSMIT_INTERRUPT.

Referenced by SPI_clearInterruptFlag().

void EUSCI_A_SPI_enable ( uint32_t baseAddress )

Enables the SPI block.

This will enable operation of the SPI block.

Parameters

baseAddress is the base address of the EUSCI_A_SPI module.

Modified bits are UCSWRST of UCAxCTLW0 register.

Returns: None

References EUSCI_A_CMSIS.

Referenced by SPI_enableModule().

void EUSCI_A_SPI_disable ( uint32_t baseAddress )

Disables the SPI block.

This will disable operation of the SPI block.

Parameters

baseAddress is the base address of the EUSCI_A_SPI module.

Modified bits are UCSWRST of UCAxCTLW0 register.

Returns: None

References EUSCI_A_CMSIS.

Referenced by SPI_disableModule().

uint32_t EUSCI_A_SPI_getReceiveBufferAddressForDMA ( uint32_t baseAddress )

Returns the address of the RX Buffer of the SPI for the DMA module.

Returns the address of the SPI RX Buffer. This can be used in conjunction with the DMA to store the received data directly to memory.

Parameters

baseAddress is the base address of the EUSCI_A_SPI module.

Returns: the address of the RX Buffer

References EUSCI_A_CMSIS.

Referenced by SPI_getReceiveBufferAddressForDMA().

uint32_t EUSCI_A_SPI_getTransmitBufferAddressForDMA ( uint32_t baseAddress )

Returns the address of the TX Buffer of the SPI for the DMA module.

Returns the address of the SPI TX Buffer. This can be used in conjunction with the DMA to obtain transmitted data directly from memory.

Parameters

baseAddress is the base address of the EUSCI_A_SPI module.

Returns: the address of the TX Buffer

References EUSCI_A_CMSIS.

Referenced by SPI_getTransmitBufferAddressForDMA().

bool EUSCI_A_SPI_isBusy ( uint32_t baseAddress )

Indicates whether or not the SPI bus is busy.

This function returns an indication of whether or not the SPI bus is busy.This function checks the status of the bus via UCBBUSY bit

Parameters

baseAddress is the base address of the EUSCI_A_SPI module.

Returns: true if busy, false otherwise

References EUSCI_A_CMSIS.

Referenced by SPI_isBusy().

void EUSCI_B_SPI_select4PinFunctionality	(	uint32_t	baseAddress,
		uint8_t	select4PinFunctionality
	)

Selects 4Pin Functionality.

This function should be invoked only in 4-wire mode. Invoking this function has no effect in 3-wire mode.

Parameters

baseAddress	is the base address of the EUSCI_B_SPI module.
select4PinFunctionality	selects 4 pin functionality Valid values are: EUSCI_B_SPI_PREVENT_CONFLICTS_WITH_OTHER_MASTERS EUSCI_B_SPI_ENABLE_SIGNAL_FOR_4WIRE_SLAVE

Modified bits are UCSTEM of UCAxCTLW0 register.

Returns: None

References ASSERT, EUSCI_B_CMSIS, EUSCI_B_SPI_ENABLE_SIGNAL_FOR_4WIRE_SLAVE, and EUSCI_B_SPI_PREVENT_CONFLICTS_WITH_OTHER_MASTERS.

Referenced by SPI_selectFourPinFunctionality().

void EUSCI_B_SPI_masterChangeClock	(	uint32_t	baseAddress,
		uint32_t	clockSourceFrequency,
		uint32_t	desiredSpiClock
	)

Initializes the SPI Master clock. At the end of this function call, SPI module is left enabled.

Parameters

baseAddress	is the base address of the EUSCI_B_SPI module.
clockSourceFrequency	is the frequency of the slected clock source
desiredSpiClock	is the desired clock rate for SPI communication

Modified bits are UCSWRST of UCAxCTLW0 register.

Returns: None

References EUSCI_B_CMSIS.

Referenced by SPI_changeMasterClock().

bool EUSCI_B_SPI_slaveInit	(	uint32_t	baseAddress,
		uint16_t	msbFirst,
		uint16_t	clockPhase,
		uint16_t	clockPolarity,
		uint16_t	spiMode
	)

Initializes the SPI Slave block.

Upon successful initialization of the SPI slave block, this function will have initailized the slave block, but the SPI Slave block still remains disabled and must be enabled with EUSCI_B_SPI_enable()

Parameters

baseAddress	is the base address of the EUSCI_B_SPI Slave module.
msbFirst	controls the direction of the receive and transmit shift register. Valid values are: EUSCI_B_SPI_MSB_FIRST EUSCI_B_SPI_LSB_FIRST [Default]
clockPhase	is clock phase select. Valid values are: EUSCI_B_SPI_PHASE_DATA_CHANGED_ONFIRST_CAPTURED_ON_NEXT [Default] EUSCI_B_SPI_PHASE_DATA_CAPTURED_ONFIRST_CHANGED_ON_NEXT
clockPolarity	is clock polarity select Valid values are: EUSCI_B_SPI_CLOCKPOLARITY_INACTIVITY_HIGH EUSCI_B_SPI_CLOCKPOLARITY_INACTIVITY_LOW [Default]
spiMode	is SPI mode select Valid values are: EUSCI_B_SPI_3PIN EUSCI_B_SPI_4PIN_UCxSTE_ACTIVE_HIGH EUSCI_B_SPI_4PIN_UCxSTE_ACTIVE_LOW

Modified bits are EUSCI_A_CTLW0_MSB, EUSCI_A_CTLW0_MST, EUSCI_A_CTLW0_SEVENBIT, EUSCI_A_CTLW0_CKPL, EUSCI_A_CTLW0_CKPH, UCMODE and UCSWRST of UCAxCTLW0 register.

Returns: true

References ASSERT, EUSCI_B_CMSIS, EUSCI_B_SPI_3PIN, EUSCI_B_SPI_4PIN_UCxSTE_ACTIVE_HIGH, EUSCI_B_SPI_4PIN_UCxSTE_ACTIVE_LOW, EUSCI_B_SPI_CLOCKPOLARITY_INACTIVITY_HIGH, EUSCI_B_SPI_CLOCKPOLARITY_INACTIVITY_LOW, EUSCI_B_SPI_LSB_FIRST, EUSCI_B_SPI_MSB_FIRST, EUSCI_B_SPI_PHASE_DATA_CAPTURED_ONFIRST_CHANGED_ON_NEXT, and EUSCI_B_SPI_PHASE_DATA_CHANGED_ONFIRST_CAPTURED_ON_NEXT.

void EUSCI_B_SPI_changeClockPhasePolarity	(	uint32_t	baseAddress,
		uint16_t	clockPhase,
		uint16_t	clockPolarity
	)

Changes the SPI colock phase and polarity. At the end of this function call, SPI module is left enabled.

Parameters

baseAddress	is the base address of the EUSCI_B_SPI module.
clockPhase	is clock phase select. Valid values are: EUSCI_B_SPI_PHASE_DATA_CHANGED_ONFIRST_CAPTURED_ON_NEXT [Default] EUSCI_B_SPI_PHASE_DATA_CAPTURED_ONFIRST_CHANGED_ON_NEXT
clockPolarity	is clock polarity select Valid values are: EUSCI_B_SPI_CLOCKPOLARITY_INACTIVITY_HIGH EUSCI_B_SPI_CLOCKPOLARITY_INACTIVITY_LOW [Default]

Modified bits are EUSCI_A_CTLW0_CKPL, EUSCI_A_CTLW0_CKPH and UCSWRST of UCAxCTLW0 register.

Returns: None

References ASSERT, EUSCI_B_CMSIS, EUSCI_B_SPI_CLOCKPOLARITY_INACTIVITY_HIGH, EUSCI_B_SPI_CLOCKPOLARITY_INACTIVITY_LOW, EUSCI_B_SPI_PHASE_DATA_CAPTURED_ONFIRST_CHANGED_ON_NEXT, and EUSCI_B_SPI_PHASE_DATA_CHANGED_ONFIRST_CAPTURED_ON_NEXT.

Referenced by SPI_changeClockPhasePolarity().

void EUSCI_B_SPI_transmitData	(	uint32_t	baseAddress,
		uint8_t	transmitData
	)

Transmits a byte from the SPI Module.

This function will place the supplied data into SPI trasmit data register to start transmission.

Parameters

baseAddress	is the base address of the EUSCI_B_SPI module.
transmitData	data to be transmitted from the SPI module

Returns: None

References EUSCI_B_CMSIS.

Referenced by SPI_transmitData().

uint8_t EUSCI_B_SPI_receiveData ( uint32_t baseAddress )

Receives a byte that has been sent to the SPI Module.

This function reads a byte of data from the SPI receive data Register.

Parameters

baseAddress is the base address of the EUSCI_B_SPI module.

Returns: Returns the byte received from by the SPI module, cast as an uint8_t.

References EUSCI_B_CMSIS.

Referenced by SPI_receiveData().

void EUSCI_B_SPI_enableInterrupt	(	uint32_t	baseAddress,
		uint8_t	mask
	)

Enables individual SPI interrupt sources.

Enables the indicated SPI interrupt sources. Only the sources that are enabled can be reflected to the processor interrupt; disabled sources have no effect on the processor. Does not clear interrupt flags.

Parameters

baseAddress	is the base address of the EUSCI_B_SPI module.
mask	is the bit mask of the interrupt sources to be enabled. Mask value is the logical OR of any of the following: EUSCI_B_SPI_TRANSMIT_INTERRUPT EUSCI_B_SPI_RECEIVE_INTERRUPT

Modified bits of UCAxIFG register and bits of UCAxIE register.

Returns: None

References ASSERT, EUSCI_B_CMSIS, EUSCI_B_SPI_RECEIVE_INTERRUPT, and EUSCI_B_SPI_TRANSMIT_INTERRUPT.

Referenced by SPI_enableInterrupt().

void EUSCI_B_SPI_disableInterrupt	(	uint32_t	baseAddress,
		uint8_t	mask
	)

Disables individual SPI interrupt sources.

Disables the indicated SPI interrupt sources. Only the sources that are enabled can be reflected to the processor interrupt; disabled sources have no effect on the processor.

Parameters

baseAddress	is the base address of the EUSCI_B_SPI module.
mask	is the bit mask of the interrupt sources to be disabled. Mask value is the logical OR of any of the following: EUSCI_B_SPI_TRANSMIT_INTERRUPT EUSCI_B_SPI_RECEIVE_INTERRUPT

Modified bits of UCAxIE register.

Returns: None

References ASSERT, EUSCI_B_CMSIS, EUSCI_B_SPI_RECEIVE_INTERRUPT, and EUSCI_B_SPI_TRANSMIT_INTERRUPT.

Referenced by SPI_disableInterrupt().

uint8_t EUSCI_B_SPI_getInterruptStatus	(	uint32_t	baseAddress,
		uint8_t	mask
	)

Gets the current SPI interrupt status.

This returns the interrupt status for the SPI module based on which flag is passed.

Parameters

baseAddress	is the base address of the EUSCI_B_SPI module.
mask	is the masked interrupt flag status to be returned. Mask value is the logical OR of any of the following: EUSCI_B_SPI_TRANSMIT_INTERRUPT EUSCI_B_SPI_RECEIVE_INTERRUPT

Returns

Logical OR of any of the following:

EUSCI_B_SPI_TRANSMIT_INTERRUPT
EUSCI_B_SPI_RECEIVE_INTERRUPT
indicating the status of the masked interrupts

References ASSERT, EUSCI_B_CMSIS, EUSCI_B_SPI_RECEIVE_INTERRUPT, and EUSCI_B_SPI_TRANSMIT_INTERRUPT.

Referenced by SPI_getInterruptStatus().

void EUSCI_B_SPI_clearInterruptFlag	(	uint32_t	baseAddress,
		uint8_t	mask
	)

Clears the selected SPI interrupt status flag.

Parameters

baseAddress	is the base address of the EUSCI_B_SPI module.
mask	is the masked interrupt flag to be cleared. Mask value is the logical OR of any of the following: EUSCI_B_SPI_TRANSMIT_INTERRUPT EUSCI_B_SPI_RECEIVE_INTERRUPT

Modified bits of UCAxIFG register.