MCAN.h

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/*
 * Copyright (c) 2023-2024, Texas Instruments Incorporated
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * *  Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *
 * *  Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * *  Neither the name of Texas Instruments Incorporated nor the names of
 *    its contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
/*!*****************************************************************************
 *  @file    MCAN.h
 *
 *  @brief   Hardware abstraction layer for M_CAN Controller v3.2.1
 *
 *******************************************************************************
 */

/* Structs were designed to avoid bitfields, unions, and casting
 * for portability and to avoid static analysis violations.
 */
#ifndef __MCAN_H__
#define __MCAN_H__

#include <stdint.h>
#include <stddef.h>
#include <third_party/mcan/inc/MCAN_reg.h>

#ifdef __cplusplus
extern "C" {
#endif

/*
 * MCAN register and message RAM R/W functions are defined in the
 * device-specific driver since access methods will vary for internal vs
 * external devices as will the base MCAN register address.
 */
extern void MCAN_writeReg(uint32_t offset, uint32_t value);
extern void MCAN_writeMsgRam(uint32_t offset, const uint8_t *src, size_t numBytes);
extern uint32_t MCAN_readReg(uint32_t offset);
extern void MCAN_readMsgRam(uint8_t *dst, uint32_t offset, size_t numBytes);
extern uint32_t MCAN_getMRAMOffset(void);

#define MCAN_STATUS_SUCCESS ((int_fast16_t)0)

#define MCAN_STATUS_ERROR ((int_fast16_t)-1)

#define MCAN_MAX_PAYLOAD_SIZE (64U)

#define MCAN_STD_ID_FILTER_ELEM_SIZE (4U)

#define MCAN_EXT_ID_FILTER_ELEM_SIZE (8U)

#define MCAN_TX_EVENT_ELEM_SIZE (8U)

#define MCAN_TX_RX_ELEMENT_HEADER_SIZE (8U)

typedef uint32_t MCAN_IntLineNum;

#define MCAN_INT_LINE_NUM_0 (0U)

#define MCAN_INT_LINE_NUM_1 (1U)

/* @} */

typedef uint32_t MCAN_OperationMode;

#define MCAN_OPERATION_MODE_NORMAL  (0U)

#define MCAN_OPERATION_MODE_SW_INIT (1U)

/* @} */

typedef uint32_t MCAN_MemType;

#define MCAN_MEM_TYPE_BUF  (0U)

#define MCAN_MEM_TYPE_FIFO (1U)

/* @} */

typedef uint32_t MCAN_RxFifoNum;

#define MCAN_RX_FIFO_NUM_0 (0U)

#define MCAN_RX_FIFO_NUM_1 (1U)

/* @} */

typedef uint32_t MCAN_ElemSize;

#define MCAN_ELEM_SIZE_8BYTES  (0U)

#define MCAN_ELEM_SIZE_12BYTES (1U)

#define MCAN_ELEM_SIZE_16BYTES (2U)

#define MCAN_ELEM_SIZE_20BYTES (3U)

#define MCAN_ELEM_SIZE_24BYTES (4U)

#define MCAN_ELEM_SIZE_32BYTES (5U)

#define MCAN_ELEM_SIZE_48BYTES (6U)

#define MCAN_ELEM_SIZE_64BYTES (7U)

/* @} */

typedef uint32_t MCAN_TimeOutSelect;

#define MCAN_TIMEOUT_SELECT_CONT          (0U)

#define MCAN_TIMEOUT_SELECT_TX_EVENT_FIFO (1U)

#define MCAN_TIMEOUT_SELECT_RX_FIFO0      (2U)

#define MCAN_TIMEOUT_SELECT_RX_FIFO1      (3U)

/* @} */

typedef uint32_t MCAN_IntSrc;

#define MCAN_INT_SRC_RX_FIFO0_NEW_MSG       (MCAN_IR_RF0N_MASK)

#define MCAN_INT_SRC_RX_FIFO0_WATERMARK     (MCAN_IR_RF0W_MASK)

#define MCAN_INT_SRC_RX_FIFO0_FULL          (MCAN_IR_RF0F_MASK)

#define MCAN_INT_SRC_RX_FIFO0_MSG_LOST      (MCAN_IR_RF0L_MASK)

#define MCAN_INT_SRC_RX_FIFO1_NEW_MSG       (MCAN_IR_RF1N_MASK)

#define MCAN_INT_SRC_RX_FIFO1_WATERMARK     (MCAN_IR_RF1W_MASK)

#define MCAN_INT_SRC_RX_FIFO1_FULL          (MCAN_IR_RF1F_MASK)

#define MCAN_INT_SRC_RX_FIFO1_MSG_LOST      (MCAN_IR_RF1L_MASK)

#define MCAN_INT_SRC_HIGH_PRIO_MSG          (MCAN_IR_HPM_MASK)

#define MCAN_INT_SRC_TRANS_COMPLETE         (MCAN_IR_TC_MASK)

#define MCAN_INT_SRC_TRANS_CANCEL_FINISH    (MCAN_IR_TCF_MASK)

#define MCAN_INT_SRC_TX_FIFO_EMPTY          (MCAN_IR_TFE_MASK)

#define MCAN_INT_SRC_TX_EVT_FIFO_NEW_ENTRY  (MCAN_IR_TEFN_MASK)

#define MCAN_INT_SRC_TX_EVT_FIFO_WATERMARK  (MCAN_IR_TEFW_MASK)

#define MCAN_INT_SRC_TX_EVT_FIFO_FULL       (MCAN_IR_TEFF_MASK)

#define MCAN_INT_SRC_TX_EVT_FIFO_ELEM_LOST  (MCAN_IR_TEFL_MASK)

#define MCAN_INT_SRC_TIMESTAMP_WRAPAROUND   (MCAN_IR_TSW_MASK)

#define MCAN_INT_SRC_MSG_RAM_ACCESS_FAILURE (MCAN_IR_MRAF_MASK)

#define MCAN_INT_SRC_TIMEOUT                (MCAN_IR_TOO_MASK)

#define MCAN_INT_SRC_DEDICATED_RX_BUFF_MSG  (MCAN_IR_DRX_MASK)

#define MCAN_INT_SRC_BIT_ERR_CORRECTED      (MCAN_IR_BEC_MASK)

#define MCAN_INT_SRC_BIT_ERR_UNCORRECTED    (MCAN_IR_BEU_MASK)

#define MCAN_INT_SRC_ERR_LOG_OVERFLOW       (MCAN_IR_ELO_MASK)

#define MCAN_INT_SRC_ERR_PASSIVE            (MCAN_IR_EP_MASK)

#define MCAN_INT_SRC_WARNING_STATUS         (MCAN_IR_EW_MASK)

#define MCAN_INT_SRC_BUS_OFF_STATUS         (MCAN_IR_BO_MASK)

#define MCAN_INT_SRC_WATCHDOG               (MCAN_IR_WDI_MASK)

#define MCAN_INT_SRC_PROTOCOL_ERR_ARB       (MCAN_IR_PEA_MASK)

#define MCAN_INT_SRC_PROTOCOL_ERR_DATA      (MCAN_IR_PED_MASK)

#define MCAN_INT_SRC_RES_ADDR_ACCESS        (MCAN_IR_ARA_MASK)

/* @} */

typedef uint32_t MCAN_LpbkMode;

#define MCAN_LPBK_MODE_INTERNAL (0U)

#define MCAN_LPBK_MODE_EXTERNAL (1U)

/* @} */

typedef uint32_t MCAN_ComState;

#define MCAN_COM_STATE_SYNCHRONIZING (0U)

#define MCAN_COM_STATE_IDLE          (1U)

#define MCAN_COM_STATE_RECEIVER      (2U)

#define MCAN_COM_STATE_TRANSMITTER   (3U)

/* @} */

typedef uint32_t MCAN_GFCNonMatching;

#define MCAN_GFC_NM_ACCEPT_INTO_RXFIFO0 (0U)

#define MCAN_GFC_NM_ACCEPT_INTO_RXFIFO1 (1U)

#define MCAN_GFC_NM_REJECT              (3U)

/* @} */

typedef uint32_t MCAN_TSCCTimestampSel;

#define MCAN_TSCC_COUNTER_ALWAYS_0 (0U)

#define MCAN_TSCC_COUNTER_USE_TCP  (1U)

#define MCAN_TSCC_COUNTER_EXTERNAL (2U)

/* @} */

typedef uint32_t MCAN_ErrCode;

#define MCAN_ERR_CODE_NO_ERROR    (0U)

#define MCAN_ERR_CODE_STUFF_ERROR (1U)

#define MCAN_ERR_CODE_FORM_ERROR  (2U)

#define MCAN_ERR_CODE_ACK_ERROR   (3U)

#define MCAN_ERR_CODE_BIT1_ERROR  (4U)

#define MCAN_ERR_CODE_BIT0_ERROR  (5U)

#define MCAN_ERR_CODE_CRC_ERROR   (6U)

#define MCAN_ERR_CODE_NO_CHANGE   (7U)

/* @} */

typedef struct
{
    uint32_t tdcf;
    uint32_t tdco;
} MCAN_TDCConfig;

typedef struct
{
    uint32_t nomRatePrescaler;
    uint32_t nomTimeSeg1;
    uint32_t nomTimeSeg2;
    uint32_t nomSynchJumpWidth;
    uint32_t dataRatePrescaler;
    uint32_t dataTimeSeg1;
    uint32_t dataTimeSeg2;
    uint32_t dataSynchJumpWidth;
    MCAN_TDCConfig tdcConfig;
} MCAN_BitTimingParams;

typedef struct
{
    uint32_t rrfe;
    uint32_t rrfs;
    MCAN_GFCNonMatching anfe;
    MCAN_GFCNonMatching anfs;
} MCAN_GlobalFiltConfig;

typedef struct
{
    uint32_t fdMode;
    uint32_t brsEnable;
    uint32_t txpEnable;
    uint32_t efbi;
    uint32_t pxhDisable;
    uint32_t darEnable;
    uint32_t wdcPreload;
} MCAN_InitParams;

typedef struct
{
    uint32_t monEnable;
    uint32_t asmEnable;
    uint32_t tsPrescaler;
    MCAN_TSCCTimestampSel tsSelect;
    MCAN_TimeOutSelect timeoutSelect;
    uint32_t timeoutPreload;
    uint32_t timeoutCntEnable;
    MCAN_GlobalFiltConfig filterConfig;
} MCAN_ConfigParams;

typedef struct
{
    uint32_t transErrLogCnt;
    uint32_t recErrCnt;
    uint32_t rpStatus;
    uint32_t canErrLogCnt;
} MCAN_ErrCntStatus;

typedef struct
{
    MCAN_ErrCode lastErrCode;
    MCAN_ComState act;
    uint32_t errPassive;
    uint32_t warningStatus;
    uint32_t busOffStatus;
    MCAN_ErrCode dlec;
    uint32_t resi;
    uint32_t rbrs;
    uint32_t rfdf;
    uint32_t pxe;
    uint32_t tdcv;
} MCAN_ProtocolStatus;

typedef struct
{
    uint32_t sidFilterStartAddr;
    uint32_t sidFilterListSize;
    uint32_t xidFilterStartAddr;
    uint32_t xidFilterListSize;
    uint32_t rxFifo0StartAddr;
    uint32_t rxFifo0Size;
    uint32_t rxFifo0Watermark;
    uint32_t rxFifo0OpMode;
    uint32_t rxFifo1StartAddr;
    uint32_t rxFifo1Size;
    uint32_t rxFifo1Watermark;
    uint32_t rxFifo1OpMode;
    uint32_t rxBufStartAddr;
    uint32_t rxBufElemSize;
    uint32_t rxFifo0ElemSize;
    uint32_t rxFifo1ElemSize;
    uint32_t txEventFifoStartAddr;
    uint32_t txEventFifoSize;
    uint32_t txEventFifoWatermark;
    uint32_t txBufStartAddr;
    uint32_t txBufNum;
    uint32_t txFifoQSize;
    uint32_t txFifoQMode;
    uint32_t txBufElemSize;
} MCAN_MsgRamConfig;

typedef struct
{
    uint32_t bufIdx;
    uint32_t msi;
    uint32_t filterIdx;
    uint32_t filterList;
} MCAN_HighPriorityMsgInfo;

typedef struct
{
    uint32_t statusLow;
    uint32_t statusHigh;
} MCAN_RxNewDataStatus;

typedef struct
{
    uint32_t fillLvl;
    uint32_t getIdx;
    uint32_t putIdx;
    uint32_t fifoFull;
    uint32_t msgLost;
} MCAN_RxFifoStatus;

typedef struct
{
    uint32_t freeLvl;
    uint32_t getIdx;
    uint32_t putIdx;
    uint32_t fifoFull;
} MCAN_TxFifoQStatus;

typedef struct
{
    uint32_t fillLvl;
    uint32_t getIdx;
    uint32_t putIdx;
    uint32_t fifoFull;
    uint32_t eleLost;
} MCAN_TxEventFifoStatus;

typedef struct
{
    uint8_t data[MCAN_MAX_PAYLOAD_SIZE];
    uint32_t id;
    uint32_t rtr;
    uint32_t xtd;
    uint32_t esi;
    uint32_t dlc;
    uint32_t brs;
    uint32_t fdf;
    uint32_t efc;
    uint32_t mm;
} MCAN_TxBufElement;

typedef struct
{
    uint32_t id;
    uint32_t rtr;
    uint32_t xtd;
    uint32_t esi;
    uint32_t dlc;
    uint32_t brs;
    uint32_t fdf;
    uint32_t efc;
    uint32_t mm;
    const uint8_t *data;
} MCAN_TxBufElementNoCpy;

typedef struct
{
    uint8_t data[MCAN_MAX_PAYLOAD_SIZE];
    uint32_t id;
    uint16_t rxts;
    uint8_t rtr;
    uint8_t xtd;
    uint8_t esi;
    uint8_t dlc;
    uint8_t brs;
    uint8_t fdf;
    uint8_t fidx;
    uint8_t anmf;
} MCAN_RxBufElement;

typedef struct
{
    uint32_t id;
    uint16_t rxts;
    uint8_t rtr;
    uint8_t xtd;
    uint8_t esi;
    uint8_t dlc;
    uint8_t brs;
    uint8_t fdf;
    uint8_t fidx;
    uint8_t anmf;
    uint8_t *data;
} MCAN_RxBufElementNoCpy;

typedef struct
{
    uint32_t id;
    uint16_t txts;
    uint8_t rtr;
    uint8_t xtd;
    uint8_t esi;
    uint8_t dlc;
    uint8_t brs;
    uint8_t fdf;
    uint8_t et;
    uint8_t mm;
} MCAN_TxEventFifoElement;

typedef struct
{
    uint32_t sfec;
    uint32_t sft;
    uint32_t sfid1;
    uint32_t sfid2;
} MCAN_StdMsgIDFilterElement;

typedef struct
{
    uint32_t efec;
    uint32_t eft;
    uint32_t efid1;
    uint32_t efid2;
} MCAN_ExtMsgIDFilterElement;

int_fast16_t MCAN_init(const MCAN_InitParams *initParams);

int_fast16_t MCAN_config(const MCAN_ConfigParams *config);

void MCAN_setOpMode(MCAN_OperationMode mode);

MCAN_OperationMode MCAN_getOpMode(void);

void MCAN_getBitTime(MCAN_BitTimingParams *bitTiming);

int_fast16_t MCAN_setBitTime(const MCAN_BitTimingParams *bitTiming);

void MCAN_configMsgRam(const MCAN_MsgRamConfig *msgRamConfig);

void MCAN_writeTxMsgNoCpy(uint32_t bufIdx, const MCAN_TxBufElementNoCpy *elem);

void MCAN_writeTxMsg(uint32_t bufIdx, const MCAN_TxBufElement *elem);

void MCAN_setTxBufAddReq(uint32_t bufIdx);

void MCAN_getNewDataStatus(MCAN_RxNewDataStatus *newDataStatus);

void MCAN_clearNewDataStatus(const MCAN_RxNewDataStatus *newDataStatus);

void MCAN_readRxMsgNoCpy(MCAN_MemType memType, uint32_t num, MCAN_RxBufElementNoCpy *elem);

void MCAN_readRxMsg(MCAN_MemType memType, uint32_t num, MCAN_RxBufElement *elem);

int_fast16_t MCAN_readTxEventFifo(MCAN_TxEventFifoElement *elem);

void MCAN_addStdMsgIDFilter(uint32_t filtNum, const MCAN_StdMsgIDFilterElement *elem);

void MCAN_addExtMsgIDFilter(uint32_t filtNum, const MCAN_ExtMsgIDFilterElement *elem);

void MCAN_enableLoopbackMode(MCAN_LpbkMode lpbkMode);

void MCAN_disableLoopbackMode(void);

void MCAN_getProtocolStatus(MCAN_ProtocolStatus *protStatus);

void MCAN_enableInt(uint32_t intMask);

void MCAN_disableInt(uint32_t intMask);

void MCAN_setIntLineSel(uint32_t intMask, MCAN_IntLineNum lineNum);

void MCAN_enableIntLine(MCAN_IntLineNum lineNum);

void MCAN_disableIntLine(MCAN_IntLineNum lineNum);

uint32_t MCAN_getIntStatus(void);

void MCAN_clearIntStatus(uint32_t intMask);

void MCAN_getRxFifoStatus(MCAN_RxFifoNum fifoNum, MCAN_RxFifoStatus *fifoStatus);

void MCAN_getTxEventFifoStatus(MCAN_TxEventFifoStatus *fifoStatus);

void MCAN_getTxFifoQStatus(MCAN_TxFifoQStatus *fifoQStatus);

int_fast16_t MCAN_setRxFifoAck(MCAN_RxFifoNum fifoNum, uint32_t idx);

uint32_t MCAN_getTxBufReqPend(void);

void MCAN_cancelTxBufReq(uint32_t bufIdx);

uint32_t MCAN_getTxBufTransmissionStatus(void);

uint32_t MCAN_getTxBufCancellationStatus(void);

void MCAN_enableTxBufTransInt(uint32_t bufMask);

void MCAN_disableTxBufTransInt(uint32_t bufMask);

uint32_t MCAN_getClkStopAck(void);

uint16_t MCAN_getTimestampCounter(void);

#ifdef __cplusplus
}
#endif

#endif /* __MCAN_H__ */