EVTULL

Instance: EVTULL
Component: EVTULL
Base address: 0x40005000


This is top module of Event Fabric for LOKI

TOP:EVTULL Register Summary

Register Name

Type

Register Width (Bits)

Register Reset

Address Offset

Physical Address

DESC

RO

32

0x3045 1010

0x0000 0000

0x4000 5000

DESCEX

RO

32

0x0001 0106

0x0000 0004

0x4000 5004

DTB

RW

32

0x0000 0000

0x0000 0064

0x4000 5064

RTCCPTSEL

RW

32

0x0000 0000

0x0000 0404

0x4000 5404

WKUPMASK

RW

32

0x0000 0000

0x0000 0800

0x4000 5800

TOP:EVTULL Register Descriptions

TOP:EVTULL:DESC

Address Offset 0x0000 0000
Physical Address 0x4000 5000 Instance 0x4000 5000
Description This register identifies the peripheral
Type RO
Bits Field Name Description Type Reset
31:16 MODID Module identifier RO 0x3045
15:12 STDIPOFF 64 B Standard IP MMR block
0: STDIP MMRs do not exist
1:15: These MMRs begin at offset 64*STDIPOFF from IP base address
RO 0x1
11:8 INSTIDX IP Instance number RO 0x0
7:4 MAJREV Major revision RO 0x1
3:0 MINREV Minor revision RO 0x0

TOP:EVTULL:DESCEX

Address Offset 0x0000 0004
Physical Address 0x4000 5004 Instance 0x4000 5004
Description This register identifies the configuration of the peripheral
Type RO
Bits Field Name Description Type Reset
31:22 IDMA Nember of DMA input channels RO 0b00 0000 0000
21:17 NDMA Number of DMA output channels RO 0b0 0000
16 PD Power Domain.
0 : SVT
1 : ULL
RO 1
15:8 NSUB Number of Subscribers RO 0x01
7:0 NPUB Number of Publishers RO 0x06

TOP:EVTULL:DTB

Address Offset 0x0000 0064
Physical Address 0x4000 5064 Instance 0x4000 5064
Description This bit field is used to select DTB mux digital inputs
Type RW
Bits Field Name Description Type Reset
31:1 RESERVED1 Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior RO 0b000 0000 0000 0000 0000 0000 0000 0000
0 SEL DTB Selection RW 0

TOP:EVTULL:RTCCPTSEL

Address Offset 0x0000 0404
Physical Address 0x4000 5404 Instance 0x4000 5404
Description Output Selection for CPU Interrupt RTCCPT
Type RW
Bits Field Name Description Type Reset
31:7 RESERVED7 Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior RO 0b0 0000 0000 0000 0000 0000 0000
6:0 PUBID Read/write selection value.
Writing any other value than values defined by a ENUM may result in undefined behavior.
Value ENUM Name Description
0x0 NONE Always inactive
0x2 AON_PMU_COMB PMU combined interrupt request for BATMON, interrupt flags can be found here PMUD:EVENT
0x3 AON_CKM_COMB CKMD combined interrupt request, interrupt flags can be found here CKMD:MIS
0x4 AON_RTC_COMB AON_RTC event, controlled by the RTC:IMASK setting
0x5 AON_DBG_COMB DebugSS combined interrupt, interrupt flags can be found here DBGSS:MIS
0x6 AON_LPCMP_IRQ AON LPCMP interrupt, controlled by SYS0:LPCMPCFG
0x7 AON_IOC_COMB IOC synchronous combined event, controlled by IOC:EVTCFG
RW 0b000 0000

TOP:EVTULL:WKUPMASK

Address Offset 0x0000 0800
Physical Address 0x4000 5800 Instance 0x4000 5800
Description WAKEUP Mask
Type RW
Bits Field Name Description Type Reset
31:8 RESERVED8 Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior RO 0x00 0000
7 AON_IOC_COMB Wake-up mask for AON_IOC_COMB.
0 - Wakeup Disabled
1 - Wakeup Enabled
RW 0
6 AON_LPCMP_IRQ Wake-up mask for AON_LPCMP_IRQ.
0 - Wakeup Disabled
1 - Wakeup Enabled
RW 0
5 AON_DBG_COMB Wake-up mask for AON_DBG_COMB.
0 - Wakeup Disabled
1 - Wakeup Enabled
RW 0
4 AON_RTC_COMB Wake-up mask for AON_RTC_COMB.
0 - Wakeup Disabled
1 - Wakeup Enabled
RW 0
3 AON_CKM_COMB Wake-up mask for AON_CKM_COMB.
0 - Wakeup Disabled
1 - Wakeup Enabled
RW 0
2 AON_PMU_COMB Wake-up mask for AON_PMU_COMB.
0 - Wakeup Disabled
1 - Wakeup Enabled
RW 0
1:0 RESERVED0 Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior RO 0b00