PMUD

Instance: PMUD
Component: PMUD
Base address: 0x40006000


Digital control signals for VDDR regulator and Battery Monitor

TOP:PMUD Register Summary

Register Name

Type

Register Width (Bits)

Register Reset

Address Offset

Physical Address

CTL

RW

32

0x0000 0004

0x0000 0000

0x4000 6000

MEASCFG

RW

32

0x0000 0000

0x0000 0004

0x4000 6004

BAT

RO

32

0x0000 0000

0x0000 0028

0x4000 6028

BATUPD

RW

32

0x0000 0000

0x0000 002C

0x4000 602C

TEMP

RO

32

0x0000 0000

0x0000 0030

0x4000 6030

TEMPUPD

RW

32

0x0000 0000

0x0000 0034

0x4000 6034

EVENTMASK

RW

32

0x0000 0000

0x0000 0048

0x4000 6048

EVENT

RW

32

0x0000 0000

0x0000 004C

0x4000 604C

BATTUL

RW

32

0x0000 07FF

0x0000 0050

0x4000 6050

BATTLL

RW

32

0x0000 0000

0x0000 0054

0x4000 6054

TEMPUL

RW

32

0x0000 FFC0

0x0000 0058

0x4000 6058

TEMPLL

RW

32

0x0001 0000

0x0000 005C

0x4000 605C

PREG0

RW

32

0x0000 0000

0x0000 0090

0x4000 6090

PREG1

RW

32

0x0000 0000

0x0000 0094

0x4000 6094

PREG2

RW

32

0x0000 0000

0x0000 0098

0x4000 6098

DCDCCFG

RW

32

0x0000 0000

0x0000 009C

0x4000 609C

DCDCSTAT

RO

32

0x0000 0000

0x0000 00A0

0x4000 60A0

TOP:PMUD Register Descriptions

TOP:PMUD:CTL

Address Offset 0x0000 0000
Physical Address 0x4000 6000 Instance 0x4000 6000
Description Control
General Configuration of BATMON
Type RW
Bits Field Name Description Type Reset
31:3 RESERVED3 Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. RO 0b0 0000 0000 0000 0000 0000 0000 0000
2 HYST_EN Enables hysteresis on both battery and temperature measurements.
Value ENUM Name Description
0x0 DIS Disable
0x1 EN Enable
RW 1
1 CALC_EN Configuration of the calculation block that converts the digital battery/temperature level to a Volt/Celsius value.
Value ENUM Name Description
0x0 DIS Calculation disabled
0x1 EN Calculation enabled
RW 0
0 MEAS_EN Configuration of the measurement block that interfaces with the analog domain.
Value ENUM Name Description
0x0 DIS Measurements disabled
0x1 EN Measurements enabled (battery voltage and temperature)
RW 0

TOP:PMUD:MEASCFG

Address Offset 0x0000 0004
Physical Address 0x4000 6004 Instance 0x4000 6004
Description Internal. Only to be used through TI provided API.
Type RW
Bits Field Name Description Type Reset
31:2 RESERVED2 Internal. Only to be used through TI provided API. RO 0b00 0000 0000 0000 0000 0000 0000 0000
1:0 PER Internal. Only to be used through TI provided API.
Value ENUM Name Description
0x0 CONT Internal. Only to be used through TI provided API.
0x1 _8CYC Internal. Only to be used through TI provided API.
0x2 _16CYC Internal. Only to be used through TI provided API.
0x3 _32CYC Internal. Only to be used through TI provided API.
RW 0b00

TOP:PMUD:BAT

Address Offset 0x0000 0028
Physical Address 0x4000 6028 Instance 0x4000 6028
Description Last Measured Battery Voltage

This register should be read when BATUPD.STA = 1
Type RO
Bits Field Name Description Type Reset
31:11 RESERVED11 Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. RO 0b0 0000 0000 0000 0000 0000
10:8 INT Integer part:

0x0: Battery voltage = 0V + fractional part
...
0x3: Battery voltage = 3V + fractional part
0x4: Battery voltage = 4V + fractional part		 RO 0b000
7:0 FRAC Fractional part, standard binary fractional encoding.

0x00: .0V
...
0x20: 1/8 = .125V
0x40: 1/4 = .25V
0x80: 1/2 = .5V
...
0xA0: 1/2 + 1/8 = .625V
...
0xFF: 1/2 + 1/4 + 1/8 + ... + 1/256 = 0.99V		 RO 0x00

TOP:PMUD:BATUPD

Address Offset 0x0000 002C
Physical Address 0x4000 602C Instance 0x4000 602C
Description Battery Update

Indicates BAT Updates
Type RW
Bits Field Name Description Type Reset
31:1 RESERVED1 Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. RO 0b000 0000 0000 0000 0000 0000 0000 0000
0 STA Battery update status. Write 1 to clear the status.
Value ENUM Name Description
0x0 NOUPD No update since last clear
0x1 UPD New battery voltage present
RW 0

TOP:PMUD:TEMP

Address Offset 0x0000 0030
Physical Address 0x4000 6030 Instance 0x4000 6030
Description Last measured Temperature in Degree Celsius

This register should be read when TEMPUPD.STA = 1.
Type RO
Bits Field Name Description Type Reset
31:17 RESERVED17 Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. RO 0b000 0000 0000 0000
16:8 INT Integer part of temperature value (signed)
Total value = INT + FRAC
2's complement encoding

0x100: Min value (-256°C)
0x1D8: -40°C
0x1FF: -1°C
0x00: 0°C
0x1B: 27°C
0x55: 85°C
0xFF: Max value (255°C)		 RO 0b0 0000 0000
7:6 FRAC Fractional part of temperature value.
Total value = INT + FRAC
The encoding is an extension of the 2's complement encoding.

00: 0.0°C
01: 0.25°C
10: 0.5°C
11: 0.75°C

For example:
000000001,00 = ( 1+0,00) = 1,00
000000000,11 = ( 0+0,75) = 0,75
000000000,10 = ( 0+0,50) = 0,50
000000000,01 = ( 0+0,25) = 0,25
000000000,00 = ( 0+0,00) = 0,00
111111111,11 = (-1+0,75) = -0,25
111111111,10 = (-1+0,50) = -0,50
111111111,01 = (-1+0,25) = -0,75
111111111,00 = (-1+0,00) = -1,00
111111110,11 = (-2+0,75) = -1,25		 RO 0b00
5:0 RESERVED0 Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. RO 0b00 0000

TOP:PMUD:TEMPUPD

Address Offset 0x0000 0034
Physical Address 0x4000 6034 Instance 0x4000 6034
Description Temperature Update

Indicates TEMP Updates
Type RW
Bits Field Name Description Type Reset
31:1 RESERVED1 Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. RO 0b000 0000 0000 0000 0000 0000 0000 0000
0 STA Temperature update status. Write 1 to clear the status.
Value ENUM Name Description
0x0 NOUPD No temperature update since last clear
0x1 UPD New temperature value present
RW 0

TOP:PMUD:EVENTMASK

Address Offset 0x0000 0048
Physical Address 0x4000 6048 Instance 0x4000 6048
Description Event Mask
Type RW
Bits Field Name Description Type Reset
31:6 RESERVED6 Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. RO 0b00 0000 0000 0000 0000 0000 0000
5 TEMP_UPDATE_MASK 1: EVENT.TEMP_UPDATE contributes to combined event from BATMON
0: EVENT.TEMP_UPDATE does not contribute to combined event from BATMON		 RW 0
4 BATT_UPDATE_MASK 1: EVENT.BATT_UPDATE contributes to combined event from BATMON
0: EVENT.BATT_UPDATE does not contribute to combined event from BATMON		 RW 0
3 TEMP_BELOW_LL_MASK 1: EVENT.TEMP_BELOW_LL contributes to combined event from BATMON
0: EVENT.TEMP_BELOW_LL does not contribute to combined event from BATMON		 RW 0
2 TEMP_OVER_UL_MASK 1: EVENT.TEMP_OVER_UL contributes to combined event from BATMON
0: EVENT.TEMP_OVER_UL does not contribute to combined event from BATMON		 RW 0
1 BATT_BELOW_LL_MASK 1: EVENT.BATT_BELOW_LL contributes to combined event from BATMON
0: EVENT.BATT_BELOW_LL does not contribute to combined event from BATMON		 RW 0
0 BATT_OVER_UL_MASK 1: EVENT.BATT_OVER_UL contributes to combined event from BATMON
0: EVENT.BATT_OVER_UL does not contribute to combined event from BATMON		 RW 0

TOP:PMUD:EVENT

Address Offset 0x0000 004C
Physical Address 0x4000 604C Instance 0x4000 604C
Description Event
Type RW
Bits Field Name Description Type Reset
31:6 RESERVED6 Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. RO 0b00 0000 0000 0000 0000 0000 0000
5 TEMP_UPDATE Alias to TEMPUPD.STA RW 0
4 BATT_UPDATE Alias to BATUPD.STA RW 0
3 TEMP_BELOW_LL Read:
1: Temperature level is below the lower limit set by TEMPLL.
0: Temperature level is not below the lower limit set by TEMPLL.
Write:
1: Clears the flag
0: No change in the flag		 RW 0
2 TEMP_OVER_UL Read:
1: Temperature level is above the upper limit set by TEMPUL.
0: Temperature level is not above the upper limit set by TEMPUL.
Write:
1: Clears the flag
0: No change in the flag		 RW 0
1 BATT_BELOW_LL Read:
1: Battery level is below the lower limit set by BATTLL.
0: Battery level is not below the lower limit set by BATTLL.
Write:
1: Clears the flag
0: No change in the flag		 RW 0
0 BATT_OVER_UL Read:
1: Battery level is above the upper limit set by BATTUL.
0: Battery level is not above the upper limit set by BATTUL.
Write:
1: Clears the flag
0: No change in the flag		 RW 0

TOP:PMUD:BATTUL

Address Offset 0x0000 0050
Physical Address 0x4000 6050 Instance 0x4000 6050
Description Battery Upper Limit

Total battery voltage = INT + FRAC
It is a sum of integer and fractional parts
Type RW
Bits Field Name Description Type Reset
31:11 RESERVED11 Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. RO 0b0 0000 0000 0000 0000 0000
10:8 INT Integer part:
Total battery voltage = INT + FRAC (integer and fractional part)

0x0: Battery voltage = 0V + fractional part
...
0x3: Battery voltage = 3V + fractional part
0x4: Battery voltage = 4V + fractional part		 RW 0b111
7:0 FRAC Fractional part, standard binary fractional encoding.

0x00: .0V
...
0x20: 1/8 = .125V
0x40: 1/4 = .25V
0x80: 1/2 = .5V
...
0xA0: 1/2 + 1/8 = .625V
...
0xFF: 1/2 + 1/4 + 1/8 + ... + 1/256 = 0.99V		 RW 0xFF

TOP:PMUD:BATTLL

Address Offset 0x0000 0054
Physical Address 0x4000 6054 Instance 0x4000 6054
Description Battery Lower Limit

Total battery voltage = INT + FRAC
It is a sum of integer and fractional parts
Type RW
Bits Field Name Description Type Reset
31:11 RESERVED11 Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. RO 0b0 0000 0000 0000 0000 0000
10:8 INT Integer part:
Total battery voltage = INT + FRAC (integer and fractional part)

0x0: Battery voltage = 0V + fractional part
...
0x3: Battery voltage = 3V + fractional part
0x4: Battery voltage = 4V + fractional part		 RW 0b000
7:0 FRAC Fractional part, standard binary fractional encoding.

0x00: .0V
...
0x20: 1/8 = .125V
0x40: 1/4 = .25V
0x80: 1/2 = .5V
...
0xA0: 1/2 + 1/8 = .625V
...
0xFF: 1/2 + 1/4 + 1/8 + ... + 1/256 = 0.99V		 RW 0x00

TOP:PMUD:TEMPUL

Address Offset 0x0000 0058
Physical Address 0x4000 6058 Instance 0x4000 6058
Description Temperature Upper Limit
Type RW
Bits Field Name Description Type Reset
31:17 RESERVED17 Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. RO 0b000 0000 0000 0000
16:8 INT Integer part (signed) of temperature upper limit.
Total value = INT + FRAC
2's complement encoding

0x100: Min value (-256°C)
0x1D8: -40°C
0x1FF: -1°C
0x00: 0°C
0x1B: 27°C
0x55: 85°C
0xFF: Max value (255°C)		 RW 0b0 1111 1111
7:6 FRAC Fractional part of temperature upper limit.
Total value = INT + FRAC
The encoding is an extension of the 2's complement encoding.

00: 0.0°C
01: 0.25°C
10: 0.5°C
11: 0.75°C

For example:
000000001,00 = ( 1+0,00) = 1,00
000000000,11 = ( 0+0,75) = 0,75
000000000,10 = ( 0+0,50) = 0,50
000000000,01 = ( 0+0,25) = 0,25
000000000,00 = ( 0+0,00) = 0,00
111111111,11 = (-1+0,75) = -0,25
111111111,10 = (-1+0,50) = -0,50
111111111,01 = (-1+0,25) = -0,75
111111111,00 = (-1+0,00) = -1,00
111111110,11 = (-2+0,75) = -1,25		 RW 0b11
5:0 RESERVED0 Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. RO 0b00 0000

TOP:PMUD:TEMPLL

Address Offset 0x0000 005C
Physical Address 0x4000 605C Instance 0x4000 605C
Description Temperature Lower Limit
Type RW
Bits Field Name Description Type Reset
31:17 RESERVED17 Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. RO 0b000 0000 0000 0000
16:8 INT Integer part (signed) of temperature lower limit.
Total value = INT + FRAC
2's complement encoding

0x100: Min value (-256°C)
0x1D8: -40°C
0x1FF: -1°C
0x00: 0°C
0x1B: 27°C
0x55: 85°C
0xFF: Max value (255°C)		 RW 0b1 0000 0000
7:6 FRAC Fractional part of temperature lower limit.
Total value = INT + FRAC
The encoding is an extension of the 2's complement encoding.

00: 0.0°C
01: 0.25°C
10: 0.5°C
11: 0.75°C

For example:
000000001,00 = ( 1+0,00) = 1,00
000000000,11 = ( 0+0,75) = 0,75
000000000,10 = ( 0+0,50) = 0,50
000000000,01 = ( 0+0,25) = 0,25
000000000,00 = ( 0+0,00) = 0,00
111111111,11 = (-1+0,75) = -0,25
111111111,10 = (-1+0,50) = -0,50
111111111,01 = (-1+0,25) = -0,75
111111111,00 = (-1+0,00) = -1,00
111111110,11 = (-2+0,75) = -1,25		 RW 0b00
5:0 RESERVED0 Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. RO 0b00 0000

TOP:PMUD:PREG0

Address Offset 0x0000 0090
Physical Address 0x4000 6090 Instance 0x4000 6090
Description Internal. Only to be used through TI provided API.
Type RW
Bits Field Name Description Type Reset
31:12 RESERVED12 Internal. Only to be used through TI provided API. RO 0x0 0000
11 LOW_IPEAK_DIS Internal. Only to be used through TI provided API.
Value ENUM Name Description
0x0 CLR Internal. Only to be used through TI provided API.
0x1 SET Internal. Only to be used through TI provided API.
RW 0
10 SOCLDO_ITESTEN Internal. Only to be used through TI provided API.
Value ENUM Name Description
0x0 DIS Internal. Only to be used through TI provided API.
0x1 EN Internal. Only to be used through TI provided API.
RW 0
9:7 SOCLDO_ATBSEL Internal. Only to be used through TI provided API.
Value ENUM Name Description
0x0 NC Internal. Only to be used through TI provided API.
0x1 SOCLDO_ITEST Internal. Only to be used through TI provided API.
0x2 SOCLDO_VREF_AMP_OUT Internal. Only to be used through TI provided API.
0x4 VDD_AON Internal. Only to be used through TI provided API.
RW 0b000
6:5 UDIGLDO_ATBSEL Internal. Only to be used through TI provided API.
Value ENUM Name Description
0x0 VAL0 Internal. Only to be used through TI provided API.
0x1 VAL1 Internal. Only to be used through TI provided API.
0x2 VAL2 Internal. Only to be used through TI provided API.
0x3 VAL3 Internal. Only to be used through TI provided API.
RW 0b00
4:2 DIGLDO_ATBSEL Internal. Only to be used through TI provided API.
Value ENUM Name Description
0x0 VAL0 Internal. Only to be used through TI provided API.
0x1 VAL1 Internal. Only to be used through TI provided API.
0x2 VAL2 Internal. Only to be used through TI provided API.
0x4 VAL4 Internal. Only to be used through TI provided API.
RW 0b000
1 SPARE Internal. Only to be used through TI provided API. RW 0
0 UDIGLDO_EN Internal. Only to be used through TI provided API.
Value ENUM Name Description
0x0 DIS Internal. Only to be used through TI provided API.
0x1 EN Internal. Only to be used through TI provided API.
RW 0

TOP:PMUD:PREG1

Address Offset 0x0000 0094
Physical Address 0x4000 6094 Instance 0x4000 6094
Description Internal. Only to be used through TI provided API.
Type RW
Bits Field Name Description Type Reset
31:20 RESERVED20 Internal. Only to be used through TI provided API. RO 0x000
19 TEST_DCDC_NMOS Internal. Only to be used through TI provided API.
Value ENUM Name Description
0x0 DIS Internal. Only to be used through TI provided API.
0x1 EN Internal. Only to be used through TI provided API.
RW 0
18 TEST_DCDC_PMOS Internal. Only to be used through TI provided API.
Value ENUM Name Description
0x0 DIS Internal. Only to be used through TI provided API.
0x1 EN Internal. Only to be used through TI provided API.
RW 0
17 DITHER_EN Internal. Only to be used through TI provided API.
Value ENUM Name Description
0x0 DIS Internal. Only to be used through TI provided API.
0x1 EN Internal. Only to be used through TI provided API.
RW 0
16 GLDO_AON Internal. Only to be used through TI provided API.
Value ENUM Name Description
0x0 DIS Internal. Only to be used through TI provided API.
0x1 EN Internal. Only to be used through TI provided API.
RW 0
15 RCHG_BLK_VTRIG_EN Internal. Only to be used through TI provided API.
Value ENUM Name Description
0x0 DIS Internal. Only to be used through TI provided API.
0x1 EN Internal. Only to be used through TI provided API.
RW 0
14 RCHG_BLK_ATEST_EN Internal. Only to be used through TI provided API.
Value ENUM Name Description
0x0 DIS Internal. Only to be used through TI provided API.
0x1 EN Internal. Only to be used through TI provided API.
RW 0
13 RCHG_FORCE_SAMP_VREF Internal. Only to be used through TI provided API.
Value ENUM Name Description
0x0 DIS Internal. Only to be used through TI provided API.
0x1 EN Internal. Only to be used through TI provided API.
RW 0
12 RCHG_COMP_CLK_DIS Internal. Only to be used through TI provided API.
Value ENUM Name Description
0x0 EN Internal. Only to be used through TI provided API.
0x1 DIS Internal. Only to be used through TI provided API.
RW 0
11:8 RESERVED8 Internal. Only to be used through TI provided API. RO 0x0
7 SPARE Internal. Only to be used through TI provided API. RW 0
6 VDDR_ATBSEL Internal. Only to be used through TI provided API.
Value ENUM Name Description
0x0 DIS Internal. Only to be used through TI provided API.
0x1 EN Internal. Only to be used through TI provided API.
RW 0
5 GLDO_EA_BIAS_DIS Internal. Only to be used through TI provided API.
Value ENUM Name Description
0x0 ON Internal. Only to be used through TI provided API.
0x1 OFF Internal. Only to be used through TI provided API.
RW 0
4:1 GLDO_ATBSEL Internal. Only to be used through TI provided API.
Value ENUM Name Description
0x0 NC Internal. Only to be used through TI provided API.
0x1 ERRAMP_OUT Internal. Only to be used through TI provided API.
0x2 PASSGATE Internal. Only to be used through TI provided API.
0x4 IB1U Internal. Only to be used through TI provided API.
0x8 VDDROK Internal. Only to be used through TI provided API.
RW 0x0
0 RESERVED0 Internal. Only to be used through TI provided API. RO 0

TOP:PMUD:PREG2

Address Offset 0x0000 0098
Physical Address 0x4000 6098 Instance 0x4000 6098
Description Internal. Only to be used through TI provided API.
Type RW
Bits Field Name Description Type Reset
31:6 RESERVED6 Internal. Only to be used through TI provided API. RO 0b00 0000 0000 0000 0000 0000 0000
5 RSTNMASK Internal. Only to be used through TI provided API.
Value ENUM Name Description
0x0 BNM Internal. Only to be used through TI provided API.
0x1 BM Internal. Only to be used through TI provided API.
RW 0
4 DCDC_RCHG_ATBSEL Internal. Only to be used through TI provided API.
Value ENUM Name Description
0x0 DCDC_GLDO Internal. Only to be used through TI provided API.
0x1 RCHG_BLK Internal. Only to be used through TI provided API.
RW 0
3:0 PMUREG_ATBSEL Internal. Only to be used through TI provided API.
Value ENUM Name Description
0x0 NC Internal. Only to be used through TI provided API.
0x1 SOCLDOV_A1 Internal. Only to be used through TI provided API.
0x2 RESERVED Internal. Only to be used through TI provided API.
0x4 SOCLDOI_A0 Internal. Only to be used through TI provided API.
0x8 DCDC_ATEST0_RCHG_ATEST1 Internal. Only to be used through TI provided API.
RW 0x0

TOP:PMUD:DCDCCFG

Address Offset 0x0000 009C
Physical Address 0x4000 609C Instance 0x4000 609C
Description DCDC configuration register
Type RW
Bits Field Name Description Type Reset
31:23 RESERVED23 Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. RO 0b0 0000 0000
22:16 LM_HIGHTH DCDC load meter high threshold value for adaptive IPEAK adjustment. DCDC load meter output is in percentage scale so the applicable values are 'd1 to 'd100. Values from 'd101 to 'd127 are invalid and not to be used. RW 0b000 0000
15 RESERVED15 Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. RO 0
14:8 LM_LOWTH DCDC load meter low threshold value for adaptive IPEAK adjustment. DCDC load meter output is in percentage scale so the applicable values are 'd1 to 'd100. Values from 'd101 to 'd127 are invalid and not to be used. RW 0b000 0000
7:5 RESERVED5 Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. RO 0b000
4 ADP_IPEAK_EN This bit is used to enable adaptive IPEAK adjustment scheme in hardware. When this bit is set, DCDC IPEAK value is automatically adjusted to suitable value by sensing the DCDC load meter output for better DCDC operational efficiency.
Value ENUM Name Description
0x0 DIS Disable
0x1 EN Enable
RW 0
3:1 RESERVED1 Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. RO 0b000
0 LMEN This bit is used to enable DCDC load meter. Software can obtain DCDC load meter value from DCDCSTAT regiser and adjust IPEAK setting in SYS0.TDCDC register accordingly.
Value ENUM Name Description
0x0 DIS Disable
0x1 EN Enable
RW 0

TOP:PMUD:DCDCSTAT

Address Offset 0x0000 00A0
Physical Address 0x4000 60A0 Instance 0x4000 60A0
Description DCDC status register
Type RO
Bits Field Name Description Type Reset
31:11 RESERVED11 Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. RO 0b0 0000 0000 0000 0000 0000
10:8 IPEAK DCDC IPEAK value. This value is same as what is programmed in SYS0:TMUTE4.IPEAK when adaptive IPEAK adjustment scheme is not enabled, and it shows current IPEAK value applied by hardware when adaptive IPEAK adjustment scheme is enabled.
Note: Software can only support IPEAK = 1		 RO 0b000
7 RESERVED7 Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. RO 0
6:0 LOAD This indicates DCDC load meter output value in percentage scale.
Applicable range is 'd1 to 'd100.		 RO 0b000 0000


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