4.11. ETH Module
4.11.1. Acronyms and Definitions
Abbreviation/Term |
Explanation |
---|---|
AUTOSAR |
Automotive Open System Architecture |
BSW |
Basic Software |
MCAL |
Micro Controller Abstraction Layer |
DET |
Default Error Tracer |
EC |
Ethernet controller |
Eth |
Ethernet Controller Driver (AUTOSAR BSW module) |
EthIf |
Ethernet Interface (AUTOSAR BSW module) |
EthTrcv |
Ethernet Transceiver Driver (AUTOSAR BSW module) |
ISR |
Interrupt Service Routine |
OS |
Operating System |
MCG |
Module Configuration Generator |
MII |
Media Independent Interface (standardized Interface provided by Ethernet controllers to access Ethernet transceivers) |
TCP |
Transmission Control Protocol |
UDP |
User Datagram Protocol |
4.11.2. Introduction
This document describes the functionality and configuration of the AUTOSAR BSW module Ethernet. The Ethernet driver is a hardware abstraction layer with a standardized interface to the Ethernet Interface layer.
Supported AUTOSAR Release |
4.3.1 |
---|---|
Supported Configuration Variants |
Pre-Compile time, Link-time, post-build time |
Vendor ID |
ETH_VENDOR_ID (44) |
Module ID |
ETH_MODULE_ID (88) |
Supported Platform |
AM263Px |
4.11.3. Functional Overview
The Ethernet module initializes and controls the Ethernet CPSW subsystem. It provides services to configure all transmit / receive resources of Ethernet controller to enable transfer of Ethernet frames. It supports polling and the interrupt modes. It provides configurations for
Initialization of Ethernet controller.
Configure receive/transmit and error interrupts.
Enable 10/100/1000 Mbps transfer.
Configuration of PHYs through MDIO functions.
4.11.3.1. Driver Architecture
The following figure shows where the ETHERNET is located in the AUTOSAR architecture.

Fig. 4.56 Ethernet in AUTOSAR architecture
Below figure shows Ethernet driver in Ethernet stack module.

Fig. 4.57 Ethernet stack module overview
4.11.3.2. Initialization
Eth_Init() has to be called to initialize the Ethernet driver.
4.11.3.3. States and Modes
The states and modes of the Ethernet driver define whether the Ethernet driver is operational or not. There are two states in which the Ethernet hardware/driver can be in.
ETH_STATE_UNINIT: This is the state when the Driver is not yet configured.
ETH_STATE_INIT: This is the state when the Driver is configured and initialization was successful.
There are 2 modes in which the Ethernet driver can be in.
ETH_MODE_DOWN: This is the mode when the driver/controller is disabled.
ETH_MODE_ACTIVE: This is the mode when the driver/controller is enabled.
The states and modes coexist. Whenever the ETH_STATE_INIT is reached by the driver then the mode of the driver also changes to ETH_MODE_ACTIVE. The modes of the driver can be changed by the API Eth_SetControllerMode.
4.11.3.4. Assumptions
The Ethernet BSW stack is intended to be used wherever high data rates are required but no hard real-time is required. Of course, it can also be used for less demanding use cases, i.e. for low data rates.
For using DMA feature, driver assumes that cache initialization is done in application only and not done by the driver.
4.11.3.5. Limitations
The Ethernet Driver module is only able to handle a single thread of execution. The execution must not be pre-empted by itself.
It is not possible to transmit data which exceeds the available buffer size of the used controller. Longer data has to be transmitted using the Internet Protocol (IP) or Transmission Control Protocol (TCP).
4.11.3.6. Design overview
Will be updated in next release
4.11.4. Hardware Features
4.11.4.1. IP Supported Features
Two Ethernet ports (Port 1/Port 2) with selectable MII, RMII, and RGMII interfaces and a single internal Communications Port Programming Interface (CPPI) port (Port 0).
Management Data Input/Output (MDIO) module for PHY Management with Clause 45 support.
Support for IEEE 1588 Clock Synchronization (2008 Annex D, Annex E and Annex F).
512 ALE table entries with configurable number of addresses plus VLANs
VLAN support
Synchronous 10/100/1000 Mbit operation with Flexible logical FIFO-based packet buffer structure
Full duplex mode supported in 10/100/1000 Mbps modes
Half-duplex mode supported in 10/100 Mbps modes only
4.11.4.2. AUTOSAR Supported Features
The below Autosar Api’s supported
Eth_Init
Eth_SetControllerMode
Eth_GetControllerMode
Eth_WriteMii
Eth_ReadMii
Eth_GetPhysAddr
Eth_ProvideTxBuffer : Priority option not supported.
Eth_Transmit
Eth_Receive : Priority option not supported.
Eth_TxConfirmation
Eth_GetVersionInfo
Eth_UpdatePhysAddrFilter
Eth_SetPhysAddr
Eth_GetCounterValues
Eth_GetRxStats
Eth_GetCurrentTime
Eth_EnableEgressTimeStamp
Eth_GetEgressTimeStamp
Eth_GetIngressTimeStamp
Eth_GetTxStats
Eth_GetTxErrorCounterValues
Eth_MainFunction
Eth_ProvideTxBuffer
Eth_Receive
4.11.4.3. Not supported Features
4.11.4.3.1. ETH Features not supported in Hardware
GMII Mode
SGMII Mode
Half Duplex in 1000 Mbps
Synchronous Ethernet
Time Sensitive Network Support IEEE P802.3br/D2.0 Interspersing Express Traffic
4.11.4.3.2. Supported in Hardware but not supported by Software
Eight priority level Quality Of Service (QOS) support (802.1p)
Support for Audio/Video Bridging (P802.1Qav/D6.0)
DSCP Priority Mapping (IPv4 and IPv6)
Energy Efficient Ethernet (EEE) support (802.3az)
Receive-based or destination-based Multicast and Broadcast rate limits
RAM Error Detection and Correction (SECDED)
CPSW Switch not implemented.(MCAL eth driver supports a single mac port with option to select the mac port in MCAL configuration)
4.11.4.4. Non compliance
4.11.4.4.1. Deviations to requirements (Requirement Traceability)
4.11.4.4.1.1. Deviation of requirements against AUTOSAR specification requirements
Will be updated in next release
4.11.5. Source files
Static source C Files are defined below
📦AM263Px
┣ 📂build
┣ 📂mcal
┃ ┣ 📂Eth
┃ ┃ ┣ 📂include
┃ ┃ ┃ ┣ 📜Eth.h : Contains the APIs of the ETH driver to be used by upper layers.
┃ ┃ ┃ ┣ 📜Eth_Irq.h : Contains ISR function declaration.
┃ ┃ ┃ ┣ 📜Eth_Types.h : Contains include header files.
┃ ┃ ┣ 📂src
┃ ┃ ┃ ┣ 📂cpsw
┃ ┃ ┃ ┃ ┣ 📂include
┃ ┃ ┃ ┃ ┃ ┣ 📜Cpsw.h : Internal header files.
┃ ┃ ┃ ┃ ┃ ┣ 📜Cpsw_Ale.h : Internal header files.
┃ ┃ ┃ ┃ ┃ ┣ 📜Cpsw_Cpdma.h : Internal header files.
┃ ┃ ┃ ┃ ┃ ┣ 📜Cpsw_Cpts.h : Internal header files.
┃ ┃ ┃ ┃ ┃ ┣ 📜Cpsw_Mdio.h : Internal header files.
┃ ┃ ┃ ┃ ┃ ┣ 📜Cpsw_Port.h : Internal header files.
┃ ┃ ┃ ┃ ┃ ┣ 📜Cpsw_Priv.h : Internal header files.
┃ ┃ ┃ ┃ ┃ ┣ 📜Cpsw_Stats.h : Internal header files.
┃ ┃ ┃ ┃ ┃ ┣ 📜Cpsw_Types.h : Internal header files.
┃ ┃ ┃ ┃ ┃ ┣ 📜Eth_Priv.h : Internal header files.
┃ ┃ ┃ ┃ ┣ 📜Cpsw.c : Contains module private functions used by main APIs.
┃ ┃ ┃ ┃ ┣ 📜Cpsw_Ale.c : Contains module private functions used by main APIs.
┃ ┃ ┃ ┃ ┣ 📜Cpsw_Cpdma.c : Contains module private functions used by main APIs.
┃ ┃ ┃ ┃ ┣ 📜Cpsw_Cpts.c : Contains module private functions used by main APIs.
┃ ┃ ┃ ┃ ┣ 📜Cpsw_Mdio.c : Contains module private functions used by main APIs.
┃ ┃ ┃ ┃ ┣ 📜Cpsw_Port.c : Contains module private functions used by main APIs.
┃ ┃ ┃ ┃ ┣ 📜Cpsw_Stats.c : Contains module private functions used by main APIs.
┃ ┃ ┃ ┃ ┣ 📜Eth_Priv.c : Contains module private functions used by main APIs.
┃ ┃ ┃ ┣ 📂hw
┃ ┃ ┃ ┃ ┃ ┣ 📜Hw_Cpsw.h : Contains Register address and operational macros.
┃ ┃ ┃ ┃ ┃ ┣ 📜Hw_Cpsw_Ale.h : Contains Register address and operational macros.
┃ ┃ ┃ ┃ ┃ ┣ 📜Hw_Cpsw_Cpdma.h : Contains Register address and operational macros.
┃ ┃ ┃ ┃ ┃ ┣ 📜Hw_Cpsw_Cpts.h : Contains Register address and operational macros.
┃ ┃ ┃ ┃ ┃ ┣ 📜Hw_Cpsw_Mdio.h : Contains Register address and operational macros.
┃ ┃ ┃ ┃ ┃ ┣ 📜Hw_Cpsw_Port.h : Contains Register address and operational macros.
┃ ┃ ┃ ┃ ┃ ┣ 📜Hw_Cpsw_Ss.h : Contains Register address and operational macros.
┃ ┃ ┃ ┃ ┃ ┣ 📜Hw_Cpsw_Stats.h : Contains Register address and operational macros.
┃ ┃ ┃ ┣ 📜Eth.c : Contains the implementation of the ETH driver to be used by upper layers.
┃ ┃ ┃ ┣ 📜Eth_Irq.c : Eth Interrupt service routines.
┃ ┃ ┣ 📂V0
┃ ┃ ┃ ┗ 📜Eth_Helpers.c : contains platform-dependent helper functions for ETH MCAL driver
┃ ┃ ┃ ┣ 📜Eth_Helpers.h : contains platform-dependent helper function declarations for ETH MCAL driver
┃ ┃ ┗ 📜Makefile
┃ 📂mcal_config
┃ 📂mcal_docs
┃ 📜README.txt
Plugin files are defined below in the table.
Plugin Files |
Description |
---|---|
Eth_Cfg.h |
Contains the pre-compiler switches. |
Eth_PBcfg.c |
Contains all channels Post-Build Configured parameters |
Eth_Cfg.c |
Contains all channels Pre-Compile Configured parameters |
Eth_Lcfg.c |
Contains all channels Link time Configured parameters |

Fig. 4.58 Eth header file include structure
4.11.6. Module requirements
Will be updated in next release
4.11.6.1. Memory Mapping
The objects (e.g., variables, functions, constants) are declared by compiler independent definitions – the compiler abstraction definitions. Each compiler abstraction definition is assigned to a memory section. The following table contains the memory section names and the compiler abstraction definitions defined for the Ethernet and illustrate their assignment among each other.
Compiler Abstraction Definitions / Memory Mapping Sections |
ETH_CODE |
ETH_VAR |
ETH_VAR_NOINIT |
ETH_CONST |
ETH_APPL_DATA |
ETH_APPL_CODE |
---|---|---|---|---|---|---|
ETH_START_SEC_VAR_INIT_UNSPECIFIED (.data) |
x |
|||||
ETH_STOP_SEC_VAR_INIT_UNSPECIFIED |
x |
|||||
ETH_START_SEC_CODE (.text) |
x |
|||||
ETH_STOP_SEC_CODE |
x |
|||||
ETH_START_SEC_VAR_NO_INIT_UNSPECIFIED (.bss) |
x |
|||||
ETH_STOP_SEC_VAR_NO_INIT_UNSPECIFIED |
x |
|||||
ETH_START_SEC_CONST_UNSPECIFIED (.const) |
x |
|||||
ETH_STOP_SEC_CONST_UNSPECIFIED |
x |
|||||
ETH_START_SEC_ISR_CODE (.text) |
x |
|||||
ETH_STOP_SEC_ISR_CODE |
x |
|||||
For application code used by ETH (like callback functions) |
x |
4.11.6.2. Scheduling
4.11.6.2.1. SchM
Beside the OS the BSW Scheduler provides functions that module Ethernet calls at begin and end of critical sections.
4.11.6.2.2. Critical Sections
There is only one kind of critical sections in this driver. Within these sections all read /modify/write accesses to internal Ethernet status variables must be protected. Therefore, switching to tasks that also access Ethernet has to be avoided and all Ethernet interrupts have to be suspended.
4.11.6.3. Error handling
4.11.6.3.1. DET Errors
The errors reported to DET module are described in the following table:
Type of Error |
Related Error code |
Value (Hex) |
---|---|---|
API service called with wrong controller index |
ETH_E_INV_CTRL_IDX |
0x1 |
API service called when controller is not initialized |
ETH_E_UNINIT |
0x2 |
API is called with wrong pointer value (e.g., NULL pointer) |
ETH_E_PARAM_POINTER |
0x3 |
API service called with wrong / inconsistent parameter(s) |
ETH_E_INV_PARAM |
0x4 |
API service called with wrong / inconsistent controller mode |
ETH_E_INV_MODE |
0x5 |
The following table shows which parameter checks are performed on which services:
Services |
ETH_E_UNINIT |
ETH_E_INV_CTRL_IDX |
ETH_E_INV_PARAM |
ETH_E_PARAM_POINTER |
ETH_E_INIT_FAILED |
ETH_E_INV_MODE |
---|---|---|---|---|---|---|
Eth_Init |
x |
x |
||||
Eth_SetControllerMode |
x |
x |
||||
Eth_GetControllerMode |
x |
x |
x |
|||
Eth_GetPhysAddr |
x |
x |
x |
|||
Eth_SetPhysAddr |
x |
x |
x |
|||
Eth_UpdatePhysAddrFilter |
x |
x |
x |
|||
Eth_WriteMii |
x |
x |
||||
Eth_ReadMii |
x |
x |
||||
Eth_GetCounterValues |
x |
x |
x |
|||
Eth_GetRxStats |
x |
x |
x |
|||
Eth_GetTxStats |
x |
x |
x |
|||
Eth_GetTxErrorCounterValues |
x |
x |
x |
|||
Eth_GetCurrentTime |
x |
x |
x |
|||
Eth_EnableEgressTimeStamp |
x |
x |
x |
|||
Eth_GetEgressTimeStamp |
x |
x |
x |
|||
Eth_GetIngressTimeStamp |
x |
x |
x |
|||
Eth_ProvideTxBuffer |
x |
x |
x |
|||
Eth_Transmit |
x |
x |
x |
x |
x |
x |
Eth_Receive |
x |
x |
x |
x |
||
Eth_TxConfirmation |
x |
x |
x |
|||
Eth_MainFunction |
x |
|||||
Eth_GetVersionInfo |
x |
|||||
Eth_SetBandwidthLimit |
x |
x |
x |
|||
Eth_GetBandwidthLimit |
x |
x |
x |
x |
4.11.6.3.2. Runtime Errors
There are no runtime errors.
4.11.6.3.3. DEM Errors
The errors reported to DEM are described in the following table:
DEM |
Error Code |
Description |
---|---|---|
Assigned by DEM |
ETH_E_ACCESS |
This error is raised when monitoring the access to the Ethernet Controller fails. |
Assigned by DEM |
ETH_E_RX_FRAMES_LOST |
This error is raised when the loss of Ethernet frames during reception is detected. |
Assigned by DEM |
ETH_E_CRC |
This error is raised when the invalid Ethernet frames during reception is detected. |
Assigned by DEM |
ETH_E_UNDERSIZEFRAME |
This error is raised when the undersized Ethernet frames during reception is detected. |
Assigned by DEM |
ETH_E_OVERSIZEFRAME |
This error is raised when the oversized Ethernet frames during reception is detected. |
Assigned by DEM |
ETH_E_ALIGNMENT |
This error is raised when the misaligned Ethernet frames during reception is detected. |
Assigned by DEM |
ETH_E_SINGLECOLLISION |
This error is raised when the single Ethernet frame collision is detected. |
Assigned by DEM |
ETH_E_MULTIPLECOLLISION |
This error is raised when the multiple Ethernet frames collision is detected. |
Assigned by DEM |
ETH_E_LATECOLLISION |
This error is raised when the Ethernet frames late collision is detected. |
4.11.7. Used resources
4.11.7.1. Interrupt Handling
Will be updated in the next release
4.11.7.2. Hardware-Software Mapping
Four interrupt routines are provided by the Ethernet driver. Basically, the ISR’s are in the Eth_Irq.c. User might edit it for adapting for the suitable OS. The current support is for the NON-OS Interrupts structure. The integrator has to map the interrupt service routines to the interrupt sources of the respective ETHERNET unit interrupt.
Following are ISRs for each hardware unit:
HW Interrupt |
HW Interrupt ID |
SW ISR for ETH module |
Description |
---|---|---|---|
CPSW_FH_INT |
12 |
Eth_TxIrqHdlr_0 |
FHost (from host to Ethernet) paced pulse interrupt. |
CPSW_TH_INT |
13 |
Eth_RxIrqHdlr_0 |
THost (from Ethernet to host) paced pulse interrupt. |
CPSW_TH_TRSH_INT |
14 |
Eth_RxThreshIrqHdlr_0 |
THost (from Ethernet to host) non-paced pulse interrupt. |
CPSW_MISC_INT |
15 |
Eth_MiscIrqHdlr_0 |
Miscellaneous (statistics, host error and MDIO interrupts) non-paced pulse interrupt. |
4.11.8. Integration description
4.11.8.1. Dependent modules
4.11.8.1.1. MCU
The module MCU powers up the microcontrollers peripherals at startup time and initializes the PLL and the internal clock domains which go to the Ethernet unit. Interrupt crossbar configuration and mapping of interrupts to core also taken care by MCU.
4.11.8.1.2. PORT
For PORT (IO PAD) configuration of Ethernet module PORT driver is used. Multiple configurations are available depending on Ethernet port used and mode of operation (like MII, RMII and RGMII).
4.11.8.1.3. OSEK / AUTOSAR OS (Optional)
An operating system can be used for task scheduling, interrupt handling, global suspend and restore of interrupts and creating of the Interrupt Vector Table. The Ethernet module may use OSEK/AUTOSAR OS to suspend and restore global interrupts.
Apart from AUTOSAR OS module OS Counter Id can be configured from the Eth configuration.
4.11.8.1.4. DET
The module Ethernet depends on the DET (by default) to report development errors. Detection and reporting of development errors can be enabled or disabled by the switch “Enable Development Error Detection” on the tab “General Settings” within the module Ethernet.
The following table represents the service IDs:
Service ID |
Service |
---|---|
0x01 |
Eth_Init |
0x03 |
Eth_SetControllerMode |
0x04 |
Eth_GetControllerMode |
0x05 |
Eth_WriteMii |
0x06 |
Eth_ReadMii |
0x08 |
Eth_GetPhysAddr |
0x09 |
Eth_ProvideTxBuffer |
0x0A |
Eth_Transmit |
0x0B |
Eth_Receive |
0x0C |
Eth_TxConfirmation |
0x0D |
Eth_GetVersionInfo |
0x12 |
Eth_UpdatePhysAddrFilter |
0x13 |
Eth_SetPhysAddr |
0x14 |
Eth_GetCounterValues |
0x15 |
Eth_GetRxStats |
0x16 |
Eth_GetCurrentTime |
0x17 |
Eth_EnableEgressTimeStamp |
0x18 |
Eth_GetEgressTimeStamp |
0x19 |
Eth_GetIngressTimeStamp |
0x1C |
Eth_GetTxStats |
0x1D |
Eth_GetTxErrorCounterValues |
0x20 |
Eth_MainFunction |
0x50 |
Eth_SetBandwidthLimit |
0x51 |
Eth_GetBandwidthLimit |
4.11.8.1.5. DEM
By default, production code related errors are reported to the DEM using the service Dem_SetEventStatus().
4.11.8.1.6. Callback Functions
The Ethernet driver does not provide any call back functions.
4.11.8.2. Multi-core and Resource allocator
Will be updated in the next release
4.11.9. Configuration
The ETH is configured through GUI in Post-Build, Pre-Compile and Link-Time Variants.
Variants |
Configured Files |
---|---|
PostBuild |
Eth_PBcfg.c , Eth_Cfg.h |
Pre-Compile |
Eth_Cfg.c , Eth_Cfg.h |
Link-Compile |
Eth_Lcfg.c , Eth_Cfg.h |
4.11.9.1. Parameter Description
4.11.9.1.1. Standard Configuration
Standard Parameters |
Description |
Default Value |
Range |
Unit/DataType |
---|---|---|---|---|
EthCtrlEnableMii |
Enables / Disables Media Independent Interface (MII) for transceiver access |
TRUE |
TRUE FALSE |
BOOLEAN |
EthCtrlEnableRxInterrupt |
Enables / Disables receive interrupt |
TRUE |
TRUE FALSE |
BOOLEAN |
EthCtrlEnableTxInterrupt |
Enables / Disables transmit interrupt |
TRUE |
TRUE FALSE |
BOOLEAN |
EthCtrlIdx |
Specifies the instance ID of the configured controller |
0 |
0..1 |
INTEGER |
EthCtrlMacLayerSpeed |
Defines the baud rate of the MAC layer. This Autosar Parameter not used. Eth_MacConnectionType TI parameter used for Speed |
ETH_MAC_LAYER_SPEED_1G |
ETH_MAC_LAYER_SPEED_100M ETH_MAC_LAYER_SPEED_10G ETH_MAC_LAYER_SPEED_10M ETH_MAC_LAYER_SPEED_1G |
ENUMERATION |
EthCtrlMacLayerSubType |
Defines the MAC layer subtype of a switch port.This Autosar Parameter not used Eth_MacConnectionType TI parameter used for Maclayer |
REDUCED |
REDUCED REVERSED SERIAL STANDARD UNIVERSAL_SERIAL |
ENUMERATION |
EthCtrlMacLayerType |
Defines the MAC layer type of the ethernet controller.This Autosar Parameter not used Eth_MacConnectionType TI parameter used for Maclayer |
ETH_MAC_LAYER_TYPE_XGMII |
ETH_MAC_LAYER_TYPE_XGMII ETH_MAC_LAYER_TYPE_XMII ETH_MAC_LAYER_TYPE_XXGMII |
ENUMERATION |
EthCtrlPhyAddress |
Specifies the unique 48-bit physical address (MAC address) of the controller in network byte order |
11-22-33-44-55-66 |
As per requirement |
STRING |
EthCtrlConfigEgressLastSchedulerRef |
Reference to the scheduler which is the last in the egress structure |
Reference |
Reference |
REFERENCE |
EthCtrlConfigEgressFifoBufLenByte |
Length of Fifo elements in bytes |
1522 |
0..65535 |
INTEGER |
EthCtrlConfigEgressFifoBufTotal |
Fifo buffer count |
2 |
0..65535 |
INTEGER |
EthCtrlConfigEgressFifoIdx |
Egress Fifo index |
0 |
0..255 |
INTEGER |
EthCtrlConfigEgressFifoPriorityAssignment |
Message egress prority assignment |
0 |
0..7 |
INTEGER |
EthCtrlConfigSchedulerPredecessorOrder |
Defines the order of the scheduler predecessors |
0 |
0..9223372036854775807 |
INTEGER |
EthCtrlConfigSchedulerPredecessorRef |
Choice reference to the scheduler predecessor |
Reference |
Reference |
REFERENCE |
EthCtrlConfigShaperIdleSlope |
Defines the increase of credit in bits per second for the AVB shaper |
0 |
0..9223372036854775807 |
INTEGER |
EthCtrlConfigShaperPredecessorFifoRef |
Reference to the fifo which is the predecessor for this shaper |
Reference |
Reference |
REFERENCE |
EthCtrlConfigIngressFifoBufLenByte |
Length of Fifo elements in bytes |
1522 |
0..65535 |
INTEGER |
EthCtrlConfigIngressFifoBufTotal |
Fifo buffer count |
2 |
0..65535 |
INTEGER |
EthCtrlConfigIngressFifoIdx |
Ingress Fifo index |
0 |
0..255 |
INTEGER |
EthCtrlConfigIngressFifoPriorityAssignment |
Message ingress prority assignment |
0 |
0..7 |
INTEGER |
ETH_E_ACCESS |
Reference to the DemEventParameter which shall be issued when the error “Controller access failed” has occurred |
Reference |
Reference |
REFERENCE |
ETH_E_ALIGNMENT |
Reference to the DemEventParameter which shall be issued when the error “Alignment Error” has occurred |
Reference |
Reference |
REFERENCE |
ETH_E_CRC |
Reference to the DemEventParameter which shall be issued when the error “CRC Failure” has occured |
Reference |
Reference |
REFERENCE |
ETH_E_LATECOLLISION |
Reference to the DemEventParameter which shall be issued when the error “Late Collisions” has occured. |
Reference |
Reference |
REFERENCE |
ETH_E_MULTIPLECOLLISION |
Reference to the DemEventParameter which shall be issued when the error “Multiple Collisions” has occured |
Reference |
Reference |
REFERENCE |
ETH_E_OVERSIZEFRAME |
Reference to the DemEventParameter which shall be issued when the error “Oversized Frame” has occured |
Reference |
Reference |
REFERENCE |
ETH_E_RX_FRAMES_LOST |
Reference to the DemEventParameter which shall be issued when the error “receive frames lost” has occured |
Reference |
Reference |
REFERENCE |
ETH_E_SINGLECOLLISION |
Reference to the DemEventParameter which shall be issued when the error “Single Collisions” has occured |
Reference |
Reference |
REFERENCE |
ETH_E_UNDERSIZEFRAME |
Reference to the DemEventParameter which shall be issued when the error “Undersized Frame” has occured |
Reference |
Reference |
REFERENCE |
EthDevErrorDetect |
Switches the development error detection and notification on or off |
FALSE |
TRUE FALSE |
BOOLEAN |
EthGetDropCountApi |
Enables / Disables Eth_GetCounterValues API |
FALSE |
TRUE FALSE |
BOOLEAN |
EthGetEtherStatsApi |
Enables / Disables Eth_GetEtherStats API |
FALSE |
TRUE FALSE |
BOOLEAN |
EthGetTxErrorCounterValuesApi |
Enables/Disables Eth_GetTxErrorCounterValues API |
FALSE |
TRUE FALSE |
BOOLEAN |
EthGetTxStatsApi |
Enables/Disables Eth_GetTxStats API |
FALSE |
TRUE FALSE |
BOOLEAN |
EthGlobalTimeSupport |
Enables/Disables the GlobalTime APIs used amongst others by Global Time Synchronization over Ethernet |
FALSE |
TRUE FALSE |
BOOLEAN |
EthIndex |
Specifies the InstanceId of this module instance. If only one instance is present it shall have the Id 0 |
0 |
0..255 |
INTEGER |
EthMainFunctionPeriod |
Specifies the period of main function Eth_MainFunction in seconds. Ethernet driver does not require this information but the BSW scheduler |
0.01 |
0.0..Infinity |
FLOAT |
EthMaxCtrlsSupported |
Limits the total number of supported controllers |
1 |
1..255 |
INTEGER |
EthUpdatePhysAddrFilter |
Enables/Disables optional API Eth_UpdatePhysAddrFilter |
FALSE |
TRUE FALSE |
BOOLEAN |
EthVersionInfoApi |
Enables / Disables version info API |
FALSE |
TRUE FALSE |
BOOLEAN |
EthCtrlEnableOffloadChecksumICMP |
Enables / Disables hardware offloading for ICMP checksums |
TRUE |
TRUE FALSE |
BOOLEAN |
EthCtrlEnableOffloadChecksumIPv4 |
Enables / Disables hardware offloading for IPv4 checksums |
TRUE |
TRUE FALSE |
BOOLEAN |
EthCtrlEnableOffloadChecksumTCP |
Enables / Disables hardware offloading for TCP checksums |
TRUE |
TRUE FALSE |
BOOLEAN |
EthCtrlEnableOffloadChecksumUDP |
Enables / Disables hardware offloading for UDP checksums |
TRUE |
TRUE FALSE |
BOOLEAN |
4.11.9.1.2. IP Specific Configuration
Standard Parameters |
Description |
Default Value |
Range |
Unit/DataType |
---|---|---|---|---|
EthPort |
Specifies the port of the Ethernet |
ETH_PORT1 |
ETH_PORT1 ETH_PORT2 |
ENUMERATION |
EthCacheFlushOps |
Cache flush function pointer |
Function |
Function |
STRING |
EthInvalidateOps |
Cache invalidate operation function pointer |
Function |
Function |
STRING |
EthEnableCacheOps |
Enable/Disable cache operations in Ethernet Driver |
FALSE |
TRUE FALSE |
BOOLEAN |
ETH_E_HARDWARE_ERROR |
Reference to the DemEventParameter which shall be issued when the error “Timeout on blocking API call occurs “ has occurred. |
Reference |
Reference |
REFERENCE |
EthPacingClkFreq |
Pacing Clock frequency |
125000000 |
0..4294967295 |
INTEGER |
EthRxInterruptPacingEnabled |
Enable/Disable Rx interrupt pacing |
TRUE |
TRUE FALSE |
BOOLEAN |
EthRxInterruptPerMsec |
Receive interrupt per Msec |
2 |
0..4294967295 |
INTEGER |
EthTxInterruptPerMsec |
Transmit interrupt per Msec |
2 |
0..4294967295 |
INTEGER |
EthTxInterruptPacingEnabled |
Enable/Disable Tx interrupt pacing |
TRUE |
TRUE FALSE |
BOOLEAN |
EthDmaModeFlags |
DMA Mode flags |
0 |
0..4294967295 |
INTEGER |
EthRxThresholdCount |
Receive threshold count |
15 |
0..4294967295 |
INTEGER |
EthMdioBusFreq |
Bus frequency for the MII module |
2200000 |
0..4294967295 |
INTEGER |
EthMdioClockFreq |
Clock frequency for MDIO link |
200000000 |
0..4294967295 |
INTEGER |
EthCptsInputFreq |
CPTS input clock frequency. Default CPTS input frequency is 266MHz. Please make sure to change CM_GMAC_GMAC_CLKCTRL[27:25 ] CLKSEL_RFT to select different freq source of the CPTS_RFT_CLK |
200000000 |
0..4294967295 |
INTEGER |
EthCptsVlanType |
Time sync HW supports 2 level tagging. Select appropriate level to enable time sync on VLAN tagged packet |
ETH_CPTS_VLAN_TYPE_NONE |
ETH_CPTS_VLAN_TYPE_NONE ETH_CPTS_VLAN_TYPE_SINGLE_TAG ETH_CPTS_VLAN_TYPE_STACKED_TAGS ETH_CPTS_VLAN_TYPE_INVALID |
ENUMERATION |
EthCptsMessageCfgEnum |
Enumerates CPTS Ethernet Message Types |
ETH_CPTS_MESSAGE_SYNC |
ETH_CPTS_MESSAGE_SYNC ETH_CPTS_MESSAGE_DELAY_REQ ETH_CPTS_MESSAGE_PDELAY_REQ ETH_CPTS_MESSAGE_PDELAY_RESP ETH_CPTS_MESSAGE_FOLLOW_UP ETH_CPTS_MESSAGE_DELAY_RESP ETH_CPTS_MESSAGE_PDELAY_RESP_FOLLOW_UP ETH_CPTS_MESSAGE_ANNOUNCE ETH_CPTS_MESSAGE_SIGNALING ETH_CPTS_MESSAGE_MANAGEMENT ETH_CPTS_MESSAGE_ALL |
ENUMERATION |
EthCpswRateLimitPrio |
Bandwidth for each of rate limited priority |
0 |
0..200 |
INTEGER |
EthTrafficShapingSupport |
Enables/Disables Traffic shaping feature |
TRUE |
TRUE FALSE |
BOOLEAN |
EthUseDefaultMacAddr |
Use default address for MAC ADDR |
TRUE |
TRUE FALSE |
BOOLEAN |
EthIrqType |
Type of Isr function: void functionname(void) CAT1 : interrupt void func(void) CAT2 : ISR(func) |
ETH_ISR_CAT1 |
ETH_ISR_VOID ETH_ISR_CAT1 ETH_ISR_CAT2 |
ENUMERATION |
EthNumTxBuffers |
Number of TX buffers |
256 |
8..1024 |
INTEGER |
EthNumRxBuffers |
Number of RX buffers |
256 |
8..1024 |
INTEGER |
EthBufLenByte |
Maximum rx/tx buffer length (frame length) in bytes |
1522 |
0..1522 |
INTEGER |
EthAutoBuffRotation |
Enable/Disable automatic buffer rotation |
TRUE |
TRUE FALSE |
BOOLEAN |
EthDefaultOSCounterId |
Default Os Counter Id if node reference to OsCounter ref EthOsCounterRef is not set |
0 |
0..16 |
INTEGER |
EthTimeoutDuration |
ETH timeout - used in ETH busy wait. Configure the timeout according to the r5f clock frequency(400MHz/200MHz) |
3200 |
1..4294967295 |
INTEGER |
EthOsCounterRef |
This parameter contains a reference to the OsCounter, which is used by the ETH driver |
Reference |
Reference |
REFERENCE |
EthStatsInterruptEnable |
Enables/Disables interrupt for ethernet stats |
TRUE |
TRUE FALSE |
BOOLEAN |
EthUsrMdioInterruptEnable |
Enables/Disables interrupt for mdio |
TRUE |
TRUE FALSE |
BOOLEAN |
EthHostErrorInterruptEnable |
Enables/Disables interrupt for host error |
TRUE |
TRUE FALSE |
BOOLEAN |
EthDeviceVariant |
Select SOC variant .This parameter shall be used by driver to impose device specific constraints. The user guide shall detail the device specific constraints |
AM263Px |
AM263Px |
ENUMERATION |
4.11.9.1.3. Symbolic Names deviations
None
4.11.9.2. Configuration rules and constraints to enable plausibility checks
None
4.11.10. Examples
4.11.10.1. Overview
Will be updated in the next release
4.11.10.2. Steps to build and run example
There’re several Ethernet example applications demonstrating the MCAL ETH driver features in folder <MCAL_ROOT>/examples/Eth.
- eth_app: basic test application.
- eth_test_app: full feature test application with linux host test app.
This application can be built from the build folder by giving,
- **gmake -s eth_app PLATFORM=am263px**
- **gmake -s eth_test_app PLATFORM=am263px**
4.11.10.3. Run eth_app

By default, in Example code PORT 2 is enabled for Transmit/receive functionality.
Connect CANoe/PC through Ethernet cable to RJ45 of AM263Px Board PORT 2.
Flash the eth_app binary (under mcal/binary/eth_app/bin/am263px) file on Hardware.
Connect to Serial terminal to see the output.
If CANoe using then speed(1000M) should be set accordingly in CANoe settings.
If Wireshark using:
in Auto negotiation no additional settings required.
in Force configuration Speed and duplex should be set as per configuration in PC network settings.
During Receive test the control will be in while loop until the expected frames received.
Here we will send Frames from CANoe/ColaSoft Packet builder software to the EVM. (gAppObj.stats.recvPacketCnt will update if the frame received in EthIf_RxIndication).
During Filter test Frames should send from CANoe/ColaSoft Packet builder with expected destination MAC address to the EVM.
During Time stamp test PTP packets should send from CANoe/ColaSoft Packet builder with expected destination MAC address to the EVM.
During Transmission test: EVM will transmit the frames to CANoe/PC. we can observe the Frames on CANoe/Wireshark.
At the end we can see the Statistics in serial terminal.
4.11.10.3.1. Hardware Software Setup and Tools
Connect CANoe/PC through Ethernet cable to RJ45 of AM263Px EVM PORT 2.
If CANoe tool is connected to AM263Px EVM then we can observe both Tx and Rx frames in CANoe software.
If PC is connected to AM263Px EVM then use wireshark tool to observe Transmitted frames from EVM,
For Receive functionality send frames from Colasoft Packet builder tool to EVM.
If CANoe using then speed(as per configuration:1000M) should be set accordingly in CANoe settings. If Wireshark and Packet builder softwares using:
in Auto negotiation mode no additional settings required.
in Force configuration mode Speed and duplex should be set as per Eth and EthTrcv configuration in PC network settings.
4.11.10.3.2. Configuration used to test this example
ETH Configuration:
Build Variant : ETH_VARIANT_POST_BUILD
EthStatsInterruptEnable : True
EthUsrMdioInterruptEnable : True
EthHostErrorInterruptEnable : True
EthCtrlEnableRxInterrupt : True
EthCtrlEnableTxInterrupt : True
Number of TX buffers : 24
Number of RX buffers : 48
EthPort : ETH_PORT2
EthMacConnectionType : ETH_MAC_CONN_TYPE_RGMII_DETECT_INBAND
ETHTRCV Configuration:
Build Variant : ETHTRCV_POST_BUILD_VARIANT
EthTrcv1000Mbps_speed : True
EthTrcvAutoNegotiationEnabled : (uint32 ) TRUE
EthTrcvConnNeg : TRCV_CONN_NEG_AUTO
EthTrcvPhyAdvertiseCapability : 10mbps Half_Duplex, 10mbps Full_Duplex, 100mbps Half_Duplex, 100mbps Full_Duplex, 1000mbps Full_Duplex
EthTrcvLinkPartnerCapability : 0U
EthTrcvGigabitCapabilityEnabled : (uint32 )TRUE
EthTrcvDuplexMode : ETHTRCV_DUPLEX_MODE_FULL
EthTrcvEnableLoopback : (boolean)FALSE
4.11.10.3.3. Example Logs
INFO: Bootloader_socLoadHsmRtFw:82: Device Type : HSFS
INFO: Bootloader_socLoadHsmRtFw:84: HSMRT Size in Bytes : 23875
INFO: Bootloader_socLoadHsmRtFw:97: hsm runtime firmware load complete ...
Starting NULL Bootloader ...
INFO: Bootloader_runCpu:155: CPU r5f1-1 is initialized to 400000000 Hz !!!
INFO: Bootloader_runCpu:155: CPU r5f1-0 is initialized to 400000000 Hz !!!
INFO: Bootloader_runCpu:155: CPU r5f0-1 is initialized to 400000000 Hz !!!
[BOOTLOADER_PROFILE] Boot Media : undefined
KPI_DATA: [BOOTLOADER_PROFILE] Boot Image Size : 0 KB
[BOOTLOADER_PROFILE] Cores present :
KPI_DATA: [BOOTLOADER PROFILE] System_init : 372us
KPI_DATA: [BOOTLOADER PROFILE] Drivers_open : 50us
KPI_DATA: [BOOTLOADER PROFILE] LoadHsmRtFw : 27955us
KPI_DATA: [BOOTLOADER_PROFILE] SBL Total Time Taken : 53513us
NULL Bootloader Execution Complete...
INFO: Bootloader_loadSelfCpu:207: CPU r5f0-0 is initialized to 400000000 Hz !!!
INFO: Bootloader_runSelfCpu:217: All done, reseting self ...
ETH_APP: Sample Application - STARTS !!!
ETH MCAL Version Info
---------------------
Vendor ID : 44
Module ID : 88
SW Major Version : 9
SW Minor Version : 2
SW Patch Version : 0
ETH TRCV MCAL Version Info
---------------------
Vendor ID : 44
Module ID : 73
SW Major Version : 9
SW Minor Version : 2
SW Patch Version : 0
ETH_APP: EthTrcv Controller mode change - ETHTRCV_MODE_ACTIVE
ETH_APP:ETHTRCV Link up
ETH_APP:ETHTRCV baud rate = 1000Mbps
ETH_APP:ETHTRCV in full duplex mode
ETH_APP:ETHTRCV Normal Operation
ETH_APP:ETHTRCV Tx mode Normal
ETH_APP:ETHTRCV PHY ID is different. OUI: 0x80028, Model No: 0xf, Revision No: 0x3
ETH_APP:ETHTRCV Cable Diagnostics Ok
ETH_APP:ETHTRCV Phy test mode Normal
ETH_APP:EthTRCV Controller Up
MAC Port 1 Address:
00:01:02:03:04:05
-----------------------------------------------
*********** ETH FILTER TEST *******************
-----------------------------------------------
Adding MAC Address to filter:
0a:0b:0c:0d:0e:0f
Waiting to receive 1000 packets from PC packet player..
Send packets with destination MAC address:
0a:0b:0c:0d:0e:0f
Removing MAC Address from filter:
0a:0b:0c:0d:0e:0f
Multicast address filter test
Adding multicast MAC Address to filter:
01:00:5e:0d:0e:0f
Waiting to receive 1000 packets from PC packet player..
Send packets with destination MAC address:
01:00:5e:0d:0e:0f
Removing MAC Address from filter:
01:00:5e:0d:0e:0f
Opening up filter completely (ALE bypass)
Waiting to receive 1000 packets from PC packet player..
Send packets with any MAC address
ALE Bypass Transmit Test
Transmitting 50000 packets
Expect PC Wireshark to receive 50000 packets..
Max Tx Packet Size Test passed
Disabling filter bypass & adding host address back to filter
Waiting to receive 1000 packets from PC packet player..
Send packets with Controller MAC address
-----------------------------------------------
***********Time Stamping Test*******************
-----------------------------------------------
Get global time after delay upto 1000ms (loop=50)
Curr_Time: [ 0 . 45 sec. 346402304 ns] TimeSync_Diff: [ 0 . 45 sec. 346402304 ns](32K Cntr Diff 31483)
Curr_Time: [ 0 . 46 sec. 355697664 ns] TimeSync_Diff: [ 0 . 1 sec. 9295360 ns](32K Cntr Diff 31484)
Curr_Time: [ 0 . 47 sec. 364988928 ns] TimeSync_Diff: [ 0 . 1 sec. 9291264 ns](32K Cntr Diff 31483)
Curr_Time: [ 0 . 48 sec. 374280192 ns] TimeSync_Diff: [ 0 . 1 sec. 9291264 ns](32K Cntr Diff 31484)
Curr_Time: [ 0 . 49 sec. 383571456 ns] TimeSync_Diff: [ 0 . 1 sec. 9291264 ns](32K Cntr Diff 31484)
Curr_Time: [ 0 . 50 sec. 392862720 ns] TimeSync_Diff: [ 0 . 1 sec. 9291264 ns](32K Cntr Diff 31483)
Curr_Time: [ 0 . 51 sec. 402149888 ns] TimeSync_Diff: [ 0 . 1 sec. 9287168 ns](32K Cntr Diff 31484)
Curr_Time: [ 0 . 52 sec. 411441152 ns] TimeSync_Diff: [ 0 . 1 sec. 9291264 ns](32K Cntr Diff 31484)
Curr_Time: [ 0 . 53 sec. 420732416 ns] TimeSync_Diff: [ 0 . 1 sec. 9291264 ns](32K Cntr Diff 31483)
Curr_Time: [ 0 . 54 sec. 430023680 ns] TimeSync_Diff: [ 0 . 1 sec. 9291264 ns](32K Cntr Diff 31484)
Curr_Time: [ 0 . 55 sec. 439314944 ns] TimeSync_Diff: [ 0 . 1 sec. 9291264 ns](32K Cntr Diff 31484)
Curr_Time: [ 0 . 56 sec. 448602112 ns] TimeSync_Diff: [ 0 . 1 sec. 9287168 ns](32K Cntr Diff 31483)
Curr_Time: [ 0 . 57 sec. 457893376 ns] TimeSync_Diff: [ 0 . 1 sec. 9291264 ns](32K Cntr Diff 31484)
Curr_Time: [ 0 . 58 sec. 467184640 ns] TimeSync_Diff: [ 0 . 1 sec. 9291264 ns](32K Cntr Diff 31483)
Curr_Time: [ 0 . 59 sec. 476475904 ns] TimeSync_Diff: [ 0 . 1 sec. 9291264 ns](32K Cntr Diff 31483)
Curr_Time: [ 0 . 60 sec. 485767168 ns] TimeSync_Diff: [ 0 . 1 sec. 9291264 ns](32K Cntr Diff 31483)
Curr_Time: [ 0 . 61 sec. 495058432 ns] TimeSync_Diff: [ 0 . 1 sec. 9291264 ns](32K Cntr Diff 31484)
Curr_Time: [ 0 . 62 sec. 504349696 ns] TimeSync_Diff: [ 0 . 1 sec. 9291264 ns](32K Cntr Diff 31483)
Curr_Time: [ 0 . 63 sec. 513636864 ns] TimeSync_Diff: [ 0 . 1 sec. 9287168 ns](32K Cntr Diff 31484)
Curr_Time: [ 0 . 64 sec. 522928128 ns] TimeSync_Diff: [ 0 . 1 sec. 9291264 ns](32K Cntr Diff 31484)
Curr_Time: [ 0 . 65 sec. 532219392 ns] TimeSync_Diff: [ 0 . 1 sec. 9291264 ns](32K Cntr Diff 31483)
Curr_Time: [ 0 . 66 sec. 541510656 ns] TimeSync_Diff: [ 0 . 1 sec. 9291264 ns](32K Cntr Diff 31483)
Curr_Time: [ 0 . 67 sec. 550801920 ns] TimeSync_Diff: [ 0 . 1 sec. 9291264 ns](32K Cntr Diff 31484)
Curr_Time: [ 0 . 68 sec. 560089088 ns] TimeSync_Diff: [ 0 . 1 sec. 9287168 ns](32K Cntr Diff 31483)
Curr_Time: [ 0 . 69 sec. 569380352 ns] TimeSync_Diff: [ 0 . 1 sec. 9291264 ns](32K Cntr Diff 31483)
Curr_Time: [ 0 . 70 sec. 578675712 ns] TimeSync_Diff: [ 0 . 1 sec. 9295360 ns](32K Cntr Diff 31484)
Curr_Time: [ 0 . 71 sec. 587962880 ns] TimeSync_Diff: [ 0 . 1 sec. 9287168 ns](32K Cntr Diff 31483)
Curr_Time: [ 0 . 72 sec. 597258240 ns] TimeSync_Diff: [ 0 . 1 sec. 9295360 ns](32K Cntr Diff 31484)
Curr_Time: [ 0 . 73 sec. 606545408 ns] TimeSync_Diff: [ 0 . 1 sec. 9287168 ns](32K Cntr Diff 31483)
Curr_Time: [ 0 . 74 sec. 615840768 ns] TimeSync_Diff: [ 0 . 1 sec. 9295360 ns](32K Cntr Diff 31483)
Curr_Time: [ 0 . 75 sec. 625127936 ns] TimeSync_Diff: [ 0 . 1 sec. 9287168 ns](32K Cntr Diff 31484)
Curr_Time: [ 0 . 76 sec. 634415104 ns] TimeSync_Diff: [ 0 . 1 sec. 9287168 ns](32K Cntr Diff 31483)
Curr_Time: [ 0 . 77 sec. 643710464 ns] TimeSync_Diff: [ 0 . 1 sec. 9295360 ns](32K Cntr Diff 31483)
Curr_Time: [ 0 . 78 sec. 652997632 ns] TimeSync_Diff: [ 0 . 1 sec. 9287168 ns](32K Cntr Diff 31483)
Curr_Time: [ 0 . 79 sec. 662292992 ns] TimeSync_Diff: [ 0 . 1 sec. 9295360 ns](32K Cntr Diff 31483)
Curr_Time: [ 0 . 80 sec. 671580160 ns] TimeSync_Diff: [ 0 . 1 sec. 9287168 ns](32K Cntr Diff 31483)
Curr_Time: [ 0 . 81 sec. 680875520 ns] TimeSync_Diff: [ 0 . 1 sec. 9295360 ns](32K Cntr Diff 31484)
Curr_Time: [ 0 . 82 sec. 690162688 ns] TimeSync_Diff: [ 0 . 1 sec. 9287168 ns](32K Cntr Diff 31483)
Curr_Time: [ 0 . 83 sec. 699449856 ns] TimeSync_Diff: [ 0 . 1 sec. 9287168 ns](32K Cntr Diff 31483)
Curr_Time: [ 0 . 84 sec. 708745216 ns] TimeSync_Diff: [ 0 . 1 sec. 9295360 ns](32K Cntr Diff 31484)
Curr_Time: [ 0 . 85 sec. 718032384 ns] TimeSync_Diff: [ 0 . 1 sec. 9287168 ns](32K Cntr Diff 31483)
Curr_Time: [ 0 . 86 sec. 727327744 ns] TimeSync_Diff: [ 0 . 1 sec. 9295360 ns](32K Cntr Diff 31483)
Curr_Time: [ 0 . 87 sec. 736614912 ns] TimeSync_Diff: [ 0 . 1 sec. 9287168 ns](32K Cntr Diff 31484)
Curr_Time: [ 0 . 88 sec. 745902080 ns] TimeSync_Diff: [ 0 . 1 sec. 9287168 ns](32K Cntr Diff 31483)
Curr_Time: [ 0 . 89 sec. 755197440 ns] TimeSync_Diff: [ 0 . 1 sec. 9295360 ns](32K Cntr Diff 31483)
Curr_Time: [ 0 . 90 sec. 764484608 ns] TimeSync_Diff: [ 0 . 1 sec. 9287168 ns](32K Cntr Diff 31483)
Curr_Time: [ 0 . 91 sec. 773779968 ns] TimeSync_Diff: [ 0 . 1 sec. 9295360 ns](32K Cntr Diff 31483)
Curr_Time: [ 0 . 92 sec. 783067136 ns] TimeSync_Diff: [ 0 . 1 sec. 9287168 ns](32K Cntr Diff 31483)
Curr_Time: [ 0 . 93 sec. 792362496 ns] TimeSync_Diff: [ 0 . 1 sec. 9295360 ns](32K Cntr Diff 31484)
Curr_Time: [ 0 . 94 sec. 801649664 ns] TimeSync_Diff: [ 0 . 1 sec. 9287168 ns](32K Cntr Diff 31483)
Time Sync Packet Egress Test
--------------------------------
Packet Egress TS:[ 0 . 94 sec. 816935936 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 94 sec. 832320512 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 94 sec. 847557632 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 94 sec. 862802944 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 94 sec. 878040064 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 94 sec. 893277184 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 94 sec. 908514304 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 94 sec. 923759616 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 94 sec. 938996736 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 94 sec. 954233856 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 94 sec. 969470976 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 94 sec. 984716288 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 94 sec. 999953408 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 95 sec. 15190528 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 95 sec. 30427648 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 95 sec. 45664768 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 95 sec. 60901888 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 95 sec. 76147200 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 95 sec. 91384320 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 95 sec. 106621440 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 95 sec. 121858560 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 95 sec. 137095680 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 95 sec. 152340992 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 95 sec. 167578112 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 95 sec. 182815232 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 95 sec. 198052352 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 95 sec. 213289472 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 95 sec. 228534784 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 95 sec. 243771904 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 95 sec. 259009024 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 95 sec. 274246144 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 95 sec. 289491456 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 95 sec. 304728576 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 95 sec. 319965696 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 95 sec. 335202816 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 95 sec. 350439936 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 95 sec. 365677056 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 95 sec. 380922368 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 95 sec. 396159488 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 95 sec. 411396608 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 95 sec. 426633728 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 95 sec. 441879040 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 95 sec. 457116160 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 95 sec. 472353280 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 95 sec. 487590400 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 95 sec. 502827520 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 95 sec. 518072832 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 95 sec. 533309952 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 95 sec. 548547072 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 95 sec. 563784192 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 95 sec. 579021312 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 95 sec. 594266624 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 95 sec. 609503744 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 95 sec. 624740864 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 95 sec. 639977984 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 95 sec. 655223296 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 95 sec. 670460416 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 95 sec. 685697536 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 95 sec. 700934656 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 95 sec. 716171776 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 95 sec. 731417088 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 95 sec. 746654208 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 95 sec. 761891328 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 95 sec. 777128448 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 95 sec. 792365568 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 95 sec. 807610880 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 95 sec. 822848000 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 95 sec. 838085120 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 95 sec. 853322240 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 95 sec. 868559360 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 95 sec. 883804672 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 95 sec. 899041792 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 95 sec. 914278912 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 95 sec. 929516032 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 95 sec. 944753152 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 95 sec. 959998464 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 95 sec. 975235584 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 95 sec. 990472704 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 96 sec. 5709824 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 96 sec. 20946944 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 96 sec. 36192256 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 96 sec. 51429376 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 96 sec. 66666496 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 96 sec. 81903616 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 96 sec. 97140736 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 96 sec. 112377856 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 96 sec. 127623168 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 96 sec. 142860288 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 96 sec. 158097408 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 96 sec. 173334528 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 96 sec. 188571648 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 96 sec. 203808768 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 96 sec. 219054080 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 96 sec. 234291200 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 96 sec. 249528320 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 96 sec. 264765440 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 96 sec. 280002560 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 96 sec. 295247872 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 96 sec. 310484992 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 96 sec. 325722112 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 96 sec. 340959232 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 96 sec. 356196352 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 96 sec. 371433472 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 96 sec. 386678784 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 96 sec. 401915904 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 96 sec. 417153024 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 96 sec. 432390144 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 96 sec. 447627264 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 96 sec. 462872576 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 96 sec. 478109696 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 96 sec. 493346816 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 96 sec. 508583936 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 96 sec. 523821056 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 96 sec. 539058176 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 96 sec. 554303488 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 96 sec. 569540608 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 96 sec. 584777728 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 96 sec. 600014848 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 96 sec. 615251968 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 96 sec. 630497280 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 96 sec. 645734400 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 96 sec. 660971520 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 96 sec. 676208640 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 96 sec. 691445760 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 96 sec. 706691072 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 96 sec. 721928192 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 96 sec. 737165312 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 96 sec. 752402432 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 96 sec. 767639552 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 96 sec. 782876672 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 96 sec. 798121984 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 96 sec. 813359104 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 96 sec. 828596224 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 96 sec. 843833344 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 96 sec. 859070464 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 96 sec. 874315776 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 96 sec. 889552896 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 96 sec. 904790016 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 96 sec. 920027136 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 96 sec. 935264256 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 96 sec. 950501376 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 96 sec. 965746688 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 96 sec. 980983808 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 96 sec. 996220928 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 97 sec. 11458048 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 97 sec. 26695168 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 97 sec. 41940480 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 97 sec. 57177600 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 97 sec. 72414720 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 97 sec. 87651840 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 97 sec. 102897152 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 97 sec. 118134272 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 97 sec. 133371392 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 97 sec. 148608512 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 97 sec. 163845632 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 97 sec. 179090944 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 97 sec. 194328064 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 97 sec. 209565184 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 97 sec. 224802304 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 97 sec. 240047616 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 97 sec. 255284736 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 97 sec. 270521856 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 97 sec. 285758976 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 97 sec. 301004288 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 97 sec. 316241408 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 97 sec. 331478528 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 97 sec. 346715648 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 97 sec. 361960960 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 97 sec. 377198080 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 97 sec. 392435200 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 97 sec. 407672320 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 97 sec. 422909440 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 97 sec. 438154752 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 97 sec. 453391872 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 97 sec. 468628992 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 97 sec. 483866112 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 97 sec. 499103232 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 97 sec. 514348544 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 97 sec. 529585664 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 97 sec. 544822784 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 97 sec. 560059904 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 97 sec. 575305216 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 97 sec. 590542336 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 97 sec. 605779456 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 97 sec. 621016576 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 97 sec. 636253696 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 97 sec. 651499008 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 97 sec. 666736128 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 97 sec. 681973248 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 97 sec. 697210368 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 97 sec. 712447488 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 97 sec. 727684608 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 97 sec. 742929920 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 97 sec. 758167040 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 97 sec. 773404160 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 97 sec. 788641280 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 97 sec. 803886592 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 97 sec. 819123712 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 97 sec. 834360832 ns][ ETH_VALID]
Packet Egress TS:[ 0 . 97 sec. 849597952 ns][ ETH_VALID]
Time Sync Packet Ingress Test
---------------------------------
Send timestamp (0x88F7) packets (100) from PC
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 104 sec. 73183232 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 104 sec. 573190144 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 105 sec. 73180672 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 105 sec. 573187584 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 106 sec. 73186304 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 106 sec. 573176832 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 107 sec. 73183744 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 107 sec. 573190656 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 108 sec. 73181184 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 108 sec. 573179904 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 109 sec. 73178624 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 109 sec. 573185536 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 110 sec. 73176064 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 110 sec. 573182976 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 111 sec. 73181696 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 111 sec. 573188608 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 112 sec. 73179136 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 112 sec. 573177856 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 113 sec. 73184768 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 113 sec. 573183488 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 114 sec. 73182208 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 114 sec. 573189120 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 115 sec. 73179648 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 115 sec. 573178368 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 116 sec. 73177088 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 116 sec. 573184000 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 117 sec. 73182720 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 117 sec. 573181440 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 118 sec. 73180160 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 118 sec. 573187072 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 119 sec. 73185792 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 119 sec. 573184512 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 120 sec. 73175040 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 120 sec. 573190144 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 121 sec. 73188864 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 121 sec. 573187584 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 122 sec. 73186304 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 122 sec. 573193216 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 123 sec. 73191936 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 123 sec. 573190656 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 124 sec. 73189376 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 124 sec. 573188096 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 125 sec. 73186816 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 125 sec. 573193728 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 126 sec. 73184256 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 126 sec. 573191168 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 127 sec. 73181696 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 127 sec. 573188608 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 128 sec. 73187328 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 128 sec. 573186048 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 129 sec. 73184768 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 129 sec. 573199872 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 130 sec. 73190400 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 130 sec. 573189120 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 131 sec. 73187840 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 131 sec. 573194752 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 132 sec. 73201664 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 132 sec. 573192192 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 133 sec. 73190912 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 133 sec. 573189632 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 134 sec. 73196544 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 134 sec. 573195264 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 135 sec. 73202176 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 135 sec. 573200896 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 136 sec. 73199616 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 136 sec. 573206528 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 137 sec. 73197056 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 137 sec. 573203968 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 138 sec. 73194496 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 138 sec. 573201408 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 139 sec. 73191936 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 139 sec. 573198848 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 140 sec. 73189376 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 140 sec. 573196288 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 141 sec. 73203200 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 141 sec. 573193728 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 142 sec. 73200640 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 142 sec. 573207552 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 143 sec. 73198080 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 143 sec. 573204992 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 144 sec. 73195520 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 144 sec. 573202432 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 145 sec. 73192960 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 145 sec. 573199872 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 146 sec. 73206784 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 146 sec. 573197312 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 147 sec. 73204224 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 147 sec. 573194752 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 148 sec. 73201664 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 148 sec. 573208576 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 149 sec. 73199104 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 149 sec. 573206016 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 150 sec. 73212928 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 150 sec. 573203456 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 151 sec. 73210368 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 151 sec. 573200896 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 152 sec. 73207808 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 152 sec. 573198336 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 153 sec. 73205248 ns][ ETH_VALID]
Packet Ingress MessagType-CPTS_MESSAGE_ANNOUNCE, SeqID-43947 [ 0 . 153 sec. 573212160 ns][ ETH_VALID]
----------------------------
Time Stamping Test Completed
----------------------------
---------------------------------------------
***********ETH RECEIVE TEST*******************
---------------------------------------------
Waiting to receive 50000 packets from CANoe/PC packet player
Receive packet statistics:
EXPECTEDETHERTYPE_IPV4 (0x800) = 54000
EXPECTEDETHERTYPE_VLAN (0x8100) = 0
UNEXPECTEDETHERTYPE = 0
-----------------------------------------------
***********ETH TRANSMIT TEST*******************
-----------------------------------------------
Transmitting 50000 packets,
Expect CANoe / PC Wireshark to receive 50000 packets..
Stats: Sent=50000,
Transmitted 50000 packets
----------------------------
Controller 0 Counters
----------------------------
Buffer overruns : 0
CRC errors : 0
Undersize packets : 0
Oversized packets : 0
Alignment errors : 0
Erroneous inbound : 0
Erroneous outbound: 0
Single collision : 0
Multiple collision: 0
Deferred transm : 0
Late collisions : 0
Excessive colls : 0
Carrier loss : 0
----------------------------
Controller 0 Rx Statistics
----------------------------
Rx Drop Events : 0
Rx Octets : 6383800
Rx Packets : 56100
Rx Bcast Packets : 0
Rx Mcast Packets : 2000
Rx CRC/Align Errors : 0
Rx Undersized Packets: 0
Rx Oversized Packets : 0
Rx Fragments : 0
Rx Jabbers : 0
Rx Unicast Packets : 52100
----------------------------
Controller 0 Tx Statistics
----------------------------
Tx Num octets : 151817800
Tx No Unicast Packets : 100200
Tx Unicast Packets : 0
--------------------------------
Controller 0 Tx Error Counters
--------------------------------
Tx Deferred transm : 0
Tx Single collisions : 0
Tx Multiple collisions : 0
Tx Late collisions : 0
Tx Excessive collisions : 0
ETH Test Passed!!!
4.11.10.4. Run eth_test_app
4.11.10.4.1. Configuration

RX buffer |
16 |
---|---|
RX threshold |
8 |
RX IRQ pacePerMs |
2 |
TX buffer |
16 |
TX IRQ pacePerMs |
2 |
Link speed |
1 Gbps |
4.11.10.4.2. Steps to build and run
Build eth_test_app for AM263Px in <mcal_sitara_mcu>/build
make OS=Linux PLATFORM=am263px PROFILE=release allclean
make OS=Linux PLATFORM=am263px PROFILE=release BUILD_VARIANT=precompile eth_test_app
Build host test app in host test app directory
<mcal_sitara_mcu>/mcal/examples/Eth/eth_test_app/host$ make clean && make
Launch target config for AM263Px in CCS
Connect to Cortex_R5_0
Load <mcal_sitara_mcu>/mcal/binary/eth_test_app/bin/am263px/eth_test_app_r5f0_0_release.xer5f onto the core
Run the test app in CCS
Run host test app
Run host load app with the eth interface in the host directory
<mcal_sitara_mcu>/mcal/examples/Eth/eth_test_app/host$
sudo ./EthHostTestApp -i <eno>
4.11.10.4.3. Sample log
Eth Application build date/time: May 2 2024, 16:23:13
Eth Application Starts
ETH_APP: EthTrcv Controller mode change - ETHTRCV_MODE_ACTIVE
ETH_APP:ETHTRCV Link up
ETH_APP:ETHTRCV baud rate = 1000Mbps
ETH_APP:ETHTRCV in full duplex mode
ETH_APP:ETHTRCV Normal Operation
ETH_APP:ETHTRCV Tx mode Normal
ETH_APP:ETHTRCV PHY(DP83869HM) ID is proper. OUI: 0x80028, Model No: 0xf, Revision No: 0x1
ETH_APP:ETHTRCV Cable Diagnostics Ok
ETH_APP:ETHTRCV Phy test mode Normal
MAC Port 1 Address:
aa:bb:cc:dd:ee:ff
ETH MCAL Version Info
---------------------
Vendor ID : 44
Module ID : 88
SW Major Version : 9
SW Minor Version : 2
SW Patch Version : 0
ETH TRCV MCAL Version Info
---------------------
Vendor ID : 44
Module ID : 73
SW Major Version : 9
SW Minor Version : 2
SW Patch Version : 0
Waiting for Host..
No Response from Host, remaining retry = 100
Host App detected! Sending Read ACK CMD...
-----------------------------------------------------------
test_0001: START
test_0001: received 1000 of 1000 frames
test_0001: END
Test Result: Pass 0
-----------------------------------------------------------
-----------------------------------------------------------
test_0002: START
test_0002: END
Test Result: Pass 0
-----------------------------------------------------------
-----------------------------------------------------------
test_0003: START
test_0003: END
Test Result: Pass 0
-----------------------------------------------------------
-----------------------------------------------------------
test_0004: START
test_0004: received 500 of 500 frames
test_0004: END
Test Result: Pass 0
-----------------------------------------------------------
-----------------------------------------------------------
test_0005: START
test_0005: Null: Exp1: exp 500, got 500
test_0005: Null: Exp2: exp 0, got 0
test_0005: Ucast: Exp1: exp 500, got 500
test_0005: Ucast: Exp2: exp 500, got 500
test_0005: Mcast: Exp1: exp 500, got 500
test_0005: Mcast: Exp2: exp 500, got 500
test_0005: Mcast: Exp1: exp 500, got 500
test_0005: Mcast: Exp2: exp 0, got 0
test_0005: Bcast: Exp1: exp 500, got 500
test_0005: Bcast: Exp2: exp 500, got 500
test_0005: Null: Exp1: exp 500, got 500
test_0005: Null: Exp2: exp 0, got 0
test_0005: END
Test Result: Pass 0
-----------------------------------------------------------
-----------------------------------------------------------
test_0006: START
test_0006: END
Test Result: Pass 0
-----------------------------------------------------------
-----------------------------------------------------------
test_0007: START
test_0007: END
Test Result: Pass 0
-----------------------------------------------------------
-----------------------------------------------------------
test_0008: START
test_0008: END
Test Result: Pass 0
-----------------------------------------------------------
-----------------------------------------------------------
test_0009: START
test_0009: received 1000 of 1000 frames
test_0009: END
Test Result: Pass 0
-----------------------------------------------------------
-----------------------------------------------------------
test_0010: START
Set CtrlMode DOWN
Get CtrlMode DOWN
Set CtrlMode ACTIVE
Get CtrlMode ACTIVE
test_0002: START
test_0002: END
test_0001: START
test_0001: received 1000 of 1000 frames
test_0001: END
Set CtrlMode DOWN
Get CtrlMode DOWN
Set CtrlMode ACTIVE
Get CtrlMode ACTIVE
test_0002: START
test_0002: END
test_0001: START
test_0001: received 1000 of 1000 frames
test_0001: END
Set CtrlMode DOWN
Get CtrlMode DOWN
Set CtrlMode ACTIVE
Get CtrlMode ACTIVE
test_0002: START
test_0002: END
test_0001: START
test_0001: received 1000 of 1000 frames
test_0001: END
Set CtrlMode DOWN
Get CtrlMode DOWN
Set CtrlMode ACTIVE
Get CtrlMode ACTIVE
test_0002: START
test_0002: END
test_0001: START
test_0001: received 1000 of 1000 frames
test_0001: END
Set CtrlMode DOWN
Get CtrlMode DOWN
Set CtrlMode ACTIVE
Get CtrlMode ACTIVE
test_0002: START
test_0002: END
test_0001: START
test_0001: received 1000 of 1000 frames
test_0001: END
Set CtrlMode DOWN
Get CtrlMode DOWN
Set CtrlMode ACTIVE
Get CtrlMode ACTIVE
test_0002: START
test_0002: END
test_0001: START
test_0001: received 1000 of 1000 frames
test_0001: END
Set CtrlMode DOWN
Get CtrlMode DOWN
Set CtrlMode ACTIVE
Get CtrlMode ACTIVE
test_0002: START
test_0002: END
test_0001: START
test_0001: received 1000 of 1000 frames
test_0001: END
Set CtrlMode DOWN
Get CtrlMode DOWN
Set CtrlMode ACTIVE
Get CtrlMode ACTIVE
test_0002: START
test_0002: END
test_0001: START
test_0001: received 1000 of 1000 frames
test_0001: END
Set CtrlMode DOWN
Get CtrlMode DOWN
Set CtrlMode ACTIVE
Get CtrlMode ACTIVE
test_0002: START
test_0002: END
test_0001: START
test_0001: received 1000 of 1000 frames
test_0001: END
Set CtrlMode DOWN
Get CtrlMode DOWN
Set CtrlMode ACTIVE
Get CtrlMode ACTIVE
test_0002: START
test_0002: END
test_0001: START
test_0001: received 1000 of 1000 frames
test_0001: END
test_0010: completed 10 of 10 iterations
test_0010: END
Test Result: Pass 0
-----------------------------------------------------------
-----------------------------------------------------------
test_0011: START
test_0011: END
Test Result: Pass 0
-----------------------------------------------------------
-----------------------------------------------------------
test_0300: START
Egress timestamp 0 Ts: 626478464 1 0
Egress timestamp 1 Ts: 657482496 1 0 [Exp: 0.030999999 Actual: 0.031004032]
Egress timestamp 2 Ts: 719486080 1 0 [Exp: 0.061999999 Actual: 0.062003583]
Egress timestamp 3 Ts: 844489088 1 0 [Exp: 0.125000000 Actual: 0.125003010]
Egress timestamp 4 Ts: 94492032 2 0 [Exp: 0.250000000 Actual: 0.250002950]
Egress timestamp 5 Ts: 594494976 2 0 [Exp: 0.500000000 Actual: 0.500002921]
Egress timestamp 6 Ts: 344498176 3 0 [Exp: 0.750000000 Actual: 0.750003219]
Egress timestamp 7 Ts: 344501248 4 0 [Exp: 1.000000000 Actual: 1.000003099]
Egress timestamp 8 Ts: 344504320 6 0 [Exp: 2.000000000 Actual: 2.000003099]
Egress timestamp 9 Ts: 344507904 11 0 [Exp: 5.000000000 Actual: 5.000003815]
test_0300: END
Test Result: Pass 0
-----------------------------------------------------------
-----------------------------------------------------------
test_0301: START
test_0301: received 10 of 10 frames
Ingress timestamp 0 Ts: 449156096 12 0
Ingress timestamp 1 Ts: 481692672 12 0 [Exp: 0.030999999 Actual: 0.032536577]
Ingress timestamp 2 Ts: 545492992 12 0 [Exp: 0.061999999 Actual: 0.063800320]
Ingress timestamp 3 Ts: 671789056 12 0 [Exp: 0.125000000 Actual: 0.126296058]
Ingress timestamp 4 Ts: 923078656 12 0 [Exp: 0.250000000 Actual: 0.251289606]
Ingress timestamp 5 Ts: 424245760 13 0 [Exp: 0.500000000 Actual: 0.501167119]
Ingress timestamp 6 Ts: 175565824 14 0 [Exp: 0.750000000 Actual: 0.751320064]
Ingress timestamp 7 Ts: 176792064 15 0 [Exp: 1.000000000 Actual: 1.001226187]
Ingress timestamp 8 Ts: 178081280 17 0 [Exp: 2.000000000 Actual: 2.001289129]
Ingress timestamp 9 Ts: 179293184 22 0 [Exp: 5.000000000 Actual: 5.001212120]
test_0301: END
Test Result: Pass 0
-----------------------------------------------------------
-----------------------------------------------------------
test_0302: START
Current timestamp 0 Ts: 289099776 24 0
Current timestamp 0 Ts: 292584960 25 0
Current timestamp 0 Ts: 296068096 26 0
Current timestamp 0 Ts: 299553280 27 0
Current timestamp 0 Ts: 303036416 28 0
Current timestamp 0 Ts: 306517504 29 0
Current timestamp 0 Ts: 310000640 30 0
Current timestamp 0 Ts: 313483776 31 0
Current timestamp 0 Ts: 316966912 32 0
Current timestamp 0 Ts: 320448000 33 0
test_0302: END
Test Result: Pass 0
-----------------------------------------------------------
-----------------------------------------------------------
test_0110: START
test_0100 frames 150000 size 1500: START
test_0100: 10 frames size 1500
test_0100: END
test_0100 frames 150000 size 512: START
test_0100: 10 frames size 512
test_0100: END
test_0100 frames 150000 size 256: START
test_0100: 10 frames size 256
test_0100: END
test_0100 frames 150000 size 128: START
test_0100: 10 frames size 128
test_0100: END
test_0100 frames 150000 size 64: START
test_0100: 10 frames size 64
test_0100: END
test_0110: DONE
Test Result: Pass 0
-----------------------------------------------------------
-----------------------------------------------------------
test_0101: START
receiveTput-1500: received 149935 frames in 1.92 secs (78213.07 frames/s, 938.56 Mbps) Lost 0
receiveTput-512: received 149945 frames in 1.90 secs (78897.49 frames/s, 323.16 Mbps) Lost 0
receiveTput-256: received 150000 frames in 1.90 secs (78895.63 frames/s, 161.58 Mbps) Lost 0
receiveTput-128: received 300000 frames in 3.70 secs (81069.05 frames/s, 83.01 Mbps) Lost 0
receiveTput-64: received 300000 frames in 3.71 secs (80912.84 frames/s, 41.43 Mbps) Lost 0
test_0101: END
Test Result: Pass 0
-----------------------------------------------------------
-----------------------------------------------------------
test_0500: START
EthTrcv link state: Up
EthTrcv link state: Up
EthTrcv link state: Up
EthTrcv link state: Up
.....
EthTrcv link state: Up
EthTrcv link state: Up
test_0500: END
Test Result: Pass 0
-----------------------------------------------------------
----------------------------
Controller 0 Counters
----------------------------
Buffer overruns : 0
CRC errors : 0
Undersize packets : 0
Oversized packets : 0
Alignment errors : 0
SQE errors : -1
Discarded inbound : -1
Erroneous inbound : 0
Discarded outbound: -1
Erroneous outbound: 0
Single collision : 0
Multiple collision: 0
Deferred transm : 0
Late collisions : 0
Excessive colls : 0
Carrier loss : 0
----------------------------
Controller 0 Rx Statistics
----------------------------
Rx Drop Events : 0
Rx Octets : 402108288
Rx Packets : 1051134
Rx Bcast Packets : 0
Rx Mcast Packets : 67
Rx CRC/Align Errors : 0
Rx Undersized Packets: 0
Rx Oversized Packets : 0
Rx Fragments : 0
Rx Jabbers : 0
Rx Collisions : -1
Rx 64 bytes or less Packets : -1
Rx 65 to 127 bytes Packets : -1
Rx 128 to 255 bytes Packets : -1
Rx 256 to 511 bytes Packets : -1
Rx 512 to 1023 bytes Packets : -1
Rx 1024 to 1518 bytes Packets : -1
Rx Unicast Packets : 1051000
----------------------------
Controller 0 Tx Statistics
----------------------------
Tx Num octets : 387075068
Tx No Unicast Packets : 753102
Tx Unicast Packets : 0
--------------------------------
Controller 0 Tx Error Counters
--------------------------------
Tx Deferred transm : 0
Tx Single collisions : 0
Tx Multiple collisions : 0
Tx Late collisions : 0
Tx Excessive collisions : 0
ETH Stack Usage: 2580 bytes
Final Tests Results: PASS
Eth Application Completed
4.11.10.5. File Structure
📦AM263Px
┣ 📂build
┣ 📂mcal
┃ ┣ 📂examples
┃ ┃ ┣ 📂Eth
┃ ┃ ┃ ┣ 📂eth_app
┃ ┃ ┃ ┃ ┣ 📂soc
┃ ┃ ┃ ┃ ┣ 📜EthApp.c : Contains ETH test example.
┃ ┃ ┃ ┃ ┣ 📜EthApp.h : Contains ETH test example header.
┃ ┃ ┃ ┃ ┣ 📜Makefile
┃ ┃ ┃ ┣ 📂eth_test_app
┃ ┃ ┃ ┃ ┣ 📂host
┃ ┃ ┃ ┃ ┣ 📂soc
┃ ┃ ┃ ┃ ┣ 📜EthTestApp.c : Contains ETH test example.
┃ ┃ ┃ ┃ ┣ 📜EthTestApp.h : Contains ETH test example header.
┃ ┃ ┃ ┃ ┣ 📜Makefile
┃ ┣ 📂examples_config
┃ ┃ ┣ 📂Eth_Demo_Cfg
┃ ┃ ┃ ┣ 📂soc
┃ ┃ ┃ ┃ ┣ 📂am263px
┃ ┃ ┃ ┃ ┃ ┣ 📂r5f0_0
┃ ┃ ┃ ┃ ┃ ┃ ┣ 📂include
┃ ┃ ┃ ┃ ┃ ┃ ┃ ┣ 📜Eth_Cfg.h : Contains the Precompile switches, Symbolic names.
┃ ┃ ┃ ┃ ┃ ┃ ┣ 📂src
┃ ┃ ┃ ┃ ┃ ┃ ┃ ┣ 📜Eth_Cfg.c : Contains all Pre-Compile Configured parameters
┃ ┃ ┃ ┃ ┃ ┃ ┃ ┣ 📜Eth_Lcfg.c : Contains all linker Configured parameters
┃ ┃ ┃ ┃ ┃ ┃ ┃ ┣ 📜Eth_PBcfg.c : Contains all Post-Build Configured parameters
┃ ┃ ┣ 📂Eth_Demo_Lcfg
┃ ┃ ┃ ┣ 📂soc
┃ ┃ ┃ ┃ ┣ 📂am263px
┃ ┃ ┃ ┃ ┃ ┣ 📂r5f0_0
┃ ┃ ┃ ┃ ┃ ┃ ┣ 📂include
┃ ┃ ┃ ┃ ┃ ┃ ┃ ┣ 📜Eth_Cfg.h : Contains the Precompile switches, Symbolic names.
┃ ┃ ┃ ┃ ┃ ┃ ┣ 📂src
┃ ┃ ┃ ┃ ┃ ┃ ┃ ┣ 📜Eth_Cfg.c : Contains all Pre-Compile Configured parameters
┃ ┃ ┃ ┃ ┃ ┃ ┃ ┣ 📜Eth_Lcfg.c : Contains all linker Configured parameters
┃ ┃ ┃ ┃ ┃ ┃ ┃ ┣ 📜Eth_PBcfg.c : Contains all Post-Build Configured parameters
┃ ┃ ┣ 📂Eth_Demo_PBcfg
┃ ┃ ┃ ┣ 📂soc
┃ ┃ ┃ ┃ ┣ 📂am263px
┃ ┃ ┃ ┃ ┃ ┣ 📂r5f0_0
┃ ┃ ┃ ┃ ┃ ┃ ┣ 📂include
┃ ┃ ┃ ┃ ┃ ┃ ┃ ┣ 📜Eth_Cfg.h : Contains the Precompile switches, Symbolic names.
┃ ┃ ┃ ┃ ┃ ┃ ┣ 📂src
┃ ┃ ┃ ┃ ┃ ┃ ┃ ┣ 📜Eth_Cfg.c : Contains all Pre-Compile Configured parameters
┃ ┃ ┃ ┃ ┃ ┃ ┃ ┣ 📜Eth_Lcfg.c : Contains all linker Configured parameters
┃ ┃ ┃ ┃ ┃ ┃ ┃ ┣ 📜Eth_PBcfg.c : Contains all Post-Build Configured parameters
┃ 📂mcal_config
┃ 📂mcal_docs
┣ 📜README.txt
4.11.11. FAQ’s
None
4.11.12. Test Report
Please refer AM26x Eth Driver Test Case Report as part of CSP provided in the release package.