4.8. CDD_I2C Module

4.8.1. Acronyms and Definitions

Abbreviation/Term

Explanation

AUTOSAR

Automotive Open System Architecture

I2C

Inter Integrated Circuit

BSW

Basic Software

MCAL

Micro Controller Abstraction Layer

API

Application Programming Interface

DET

Default Error Tracer

MCU

Micro Controller Unit

OS

Operating System

4.8.2. Introduction

This document describes the functionality, API and configuration of the AUTOSAR BSW module I2C.

Supported AUTOSAR Release

4.3.1

Supported Configuration Variants

Pre-Compile

Vendor ID

CDD_I2C_VENDOR_ID (44)(TEXAS INSTRUMENTS)

Module ID

CDD_I2C_MODULE_ID (255)

Supported Platform

AM263Px

4.8.3. Functional Overview

The I2C component is a proprietary extension of AUTOSAR BSW. The I2C driver was designed similar to the SPI driver specifications and is compatible to AUTOSAR 4.3.1.

4.8.3.1. I2C Driver Architecture

The following figure shows where the I2C is located in the AUTOSAR architecture.

../_images/i2c_architecture.png

The expected flow for utilization of the driver as per the example application is interrupt registration (only required in case of interrupt mode), I2c driver initialization using Cdd_I2c_Init. Post initialization buffer set up linking is done to point channels to their respective buffers using Cdd_I2c_SetupEB and for writing data to slaves Cdd_I2c_AsyncTransmit() is used in both polling as well as interrupt mode.

For reception of data from I2c slaves Cdd_I2c_AsyncTransmit() can be used in interrupt mode. If polling mode is being used, use Cdd_I2c_PollingModeProcessing() and after these functional calls call Cdd_I2c_MainFunction to process any sequence in the queue and update the status of the queue to real time value.

4.8.3.2. Initialization

The driver I2C is initialized by calling Cdd_I2c_Init () with a null pointer passed as argument. To re-initialize the driver call I2c_DeInit () and then I2c_Init () again. Only pre-compile variant is supported for the driver, hence all configuration related parameters are provided through the GUI. The service for de-initialization is provided with the function Cdd_I2c_DeInit ().

4.8.3.3. States

I2C maintains states for:

  1. Driver

    • CDD_I2C_UNINIT

      • Driver is uninitialized

      • Cdd_I2c_Init () has not been called or Cdd_I2c_DeInit () has been called after initialization

    • CDD_I2C_IDLE

      • Driver is currently free, not in the middle of any transmission/reception process

    • CDD_I2C_BUSY

      • Driver is currently in use, transmission/reception in process

    The state for I2c driver is returned with Cdd_I2c_GetStaus() function call.

  2. Channels:-

    • CDD_I2C_CH_RESULT_OK

      • Channel transmission/reception not yet started

      • Channel transmission/reception successful

    • CDD_I2C_CH_RESULT_NOT_OK

      • Channel transmission/reception is not OK

    • CDD_I2C_CH_RESULT_IN_PROGRESS

      • Channel transmission/reception currently in progress

    • CDD_I2C_CH_RESULT_BUS_FAIL

      • Channel transmission/reception failed due to bus fault

    • CDD_I2C_CH_RESULT_ARBFAIL

      • Channel transmission/reception failed due to arbitration loss

    • CDD_I2C_CH_RESULT_NACKFAIL

      • Channel transmission/reception failed due to no acknowledge

    The channel status is returned with Cdd_I2c_GetResult() function call. In case incorrect channel ID is passed a DET error occur

  3. Sequences:-

    • CDD_I2C_SEQ_OK

      • Sequence transmission/reception not yet started

      • Sequence transmission/reception successful

    • CDD_I2C_SEQ_NOT_OK

      • Sequence transmission/reception in not OK

    • CDD_I2C_SEQ_PENDING

      • Sequence transmission/reception in progress

    • CDD_I2C_SEQ_QUEUED

      • Sequence queued

    • CDD_I2C_SEQ_NACK

      • Sequence failed due to no acknowledge

    • CDD_I2C_SEQ_FAILED

      • Sequence transmission/reception failed

    • CDD_I2C_SEQ_CANCELLED

      • Sequence cancelled

    The sequence status is returned with Cdd_I2c_GetSequenceResult

  4. Hardware Units:-

    • CDD_I2C_HW_UNIT_FREE

      • Hardware Unit not in use

    • CDD_I2C_HW_UNIT_BUSY

      • Hardware Unit busy

4.8.4. Hardware Features

On AM263Px platform, there are 4 I2C instances I2C0, I2C1, I2C2 and I2C3 each consisting of 25 registers for control, data transmission and reception.

4.8.4.1. Supported Features

  • Configurable Development error (Software supported)

  • Configurable No acknowledgement error check (Software supported)

  • Configurable Arbitration loss error check (Software supported)

  • Polling mode (Software supported)

  • Interrupt mode (Software supported)

  • Configurable multiple sequence in queue check (Software supported)

  • Configurable arbitration loss parameter (Software supported)

  • Configurable timeouts for reception, arbitration loss and queue (Software supported)

  • Configurable queue size (Software supported)

  • Configurable sequence size (Software supported)

  • Configurable channel size (Software supported)

  • Configurable data length (Software supported)

  • Configurable Hardware units (Hardware supported)

  • Configurable Channels (Software supported)

  • Configurable Sequences (Software supported)

  • Shareable channels (Software supported)

  • Channel in use checks (Software supported)

  • Sequence in use checks (Software supported)

  • Hardware unit in use checks (Software supported)

  • 7 and 10 bit address schemes (Hardware supported)

  • Multiple channels in a sequence

4.8.4.1.1. Configurable Development Error

  1. User configurable error check to report development errors.

  2. Blocking error

4.8.4.1.2. Configurable No Acknowledgement Error Check

  1. User configurable check to treat a no acknowledgement condition as a development error

  2. Applicable only when AM263Px is in master receiving mode

4.8.4.1.3. Configurable Arbitration Loss Error Check

  1. User configurable check to treat an arbitration loss condition as a development error.

  2. Applicable in both master receive and master transmit mode for AM263Px

4.8.4.1.4. Configurable Multiple Sequences in Queue Check

  1. User configurable check to process the same sequence multiple times or only once inside the queue

4.8.4.1.5. Configurable Arbitration Loss Parameter

  1. User configurable parameter to deal with arbitration loss condition

  2. Possible parameters

    • CDD_I2C_BURST_MODE

      I2c driver detaches from the bus without any recovery attempts.

    • CDD_I2C_RECURRENT_MODE

      I2c driver sends multiple stop signals on the bus in an attempt to free the bus and recover control.

../_images/i2c_config.png

4.8.4.1.6. Configurable Timeouts

  1. User configurable timeout for queue, reception in polling mode and arbitration loss

  2. All the timeout periods are in ticks

  3. It is user responsibility to initialize and start the timer in the application for timeouts to take effect

Note

CddI2cQueueTimeout parameter Value should be passed as number of ticks according to clock frequency. The clock source have changed from RTI timers which used 200MHz clock frequency to R5f timers which uses 400MHz clock frequency, so the timeout values need to be configured accordingly.

4.8.4.1.7. Configurable Queue, Sequence and Channel Size

  1. User configurable maximum size for Sequence, Queue and Channel

4.8.4.1.8. Configurable Hardware Units

  1. User configurable parameter to define how many Hardware Units (Instances) to use out of a maximum of 4

  2. User configurable parameter to specify which Hardware Unit to use

  3. User configurable parameter to specify Serial clock frequency (Channel bit rate)

  4. User configurable parameter to specify the frequency at which the Hardware Unit will operate internally

  5. User configurable input frequency to I2c module which will be used to set channel bit rate and I2c internal operational frequency. Please note that this frequency should be the same as the clock source selected in MCU module, this has to be maintained by the user.

../_images/i2c_confighw.png

4.8.4.1.9. Configurable Channels

  1. User configurable parameter to define channel direction (read or write), I2c Slave address, address scheme (7 bit slave address or 10 bit slave address) and chained channel implementation.

  2. A channel is the actual unit which contains the data to be transmitted along with direction(read/write) and slave address.

  3. The number of channels configured can not exceed the maximum number of channels defined in the general container.

  4. Data buffer is linked to channels in the application by provided API’s

  5. Same channels can be used by multiple sequences

../_images/i2c_configchannel.png

4.8.4.1.10. Configurable Sequences

  1. User configurable parameter to define which Hardware unit to use, number of channels present in the sequence, sequence complete callback function and sequence error notify callback function

  2. Sequences are accessible to the user and are passed as function parameters for transmission and reception

../_images/i2c_configseq.png

Note

In a sequence, there can be multiple channel but all the channel should have the same slave address.

4.8.4.1.11. Channel in Use Checks

  1. Channels in free state, i.e. not currently being transmitted by another sequence or the same sequence are available for transmission/reception

4.8.4.1.12. Sequence in Use Checks

  1. Sequence not in transmission currently are available for use.

4.8.4.1.13. Hardware Unit in Use Checks

  1. Hardware not in use, i.e. currently not transmitting/receiving any sequence is available for use.

4.8.4.2. Features Provided Beyond the AUTOSAR Standard

  1. Hardware configuration unit container to handle different hardware units

  2. Hardware configuration unit container to handle transfer speeds and hardware unit mapping. Parallel sequence and channel processing on different hardware units. Configure acknowledge and no acknowledge handling (ACK, NACK). Configurable addressing for standard (7bit) and extended (10bit) addresses.

  3. I2C chain channel feature.

  4. I2C sequence queuing feature.

  5. I2C support for parallel handling of hardware units if more than one is available.

  6. I2C improved error handling like:

    • Handling for SDA stuck scenario

    • Handling for SCL low held scenario

    • Handling for general communication timeout

4.8.4.3. Not supported Features

  • Multi master mode (Software limitation)

  • DMA mode (Software limitation)

4.8.5. Source files

Description of static files is provided below:

📦AM263Px
┣ 📂build
┣ 📂mcal
┃ ┣ 📂I2c
┃ ┃ ┣ 📂include
┃ ┃ ┃ ┣ 📜Cdd_I2c.h : Header file that contains all API relevant declarations
┃ ┃ ┃ ┗ 📜Cdd_I2c_Irq.h : Contains the declarations of the ISR handlers
┃ ┃ ┣ 📂src
┃ ┃ ┃ ┣ 📜Cdd_I2c.c : Source file that contains the API relevant implementation
┃ ┃ ┃ ┗ 📜Cdd_I2c_Irq.c : Contains the ISR implementation
┃ ┃ ┣ 📂V0
┃ ┃ ┃ ┣ 📜Cdd_I2c_hw_reg.h : Contains register offsets, mask values, shift values and specific bit set reset macros
┃ ┃ ┃ ┣ 📜Cdd_I2c_priv.c : Contains internal function definitions used to realize the driver
┃ ┃ ┃ ┗ 📜Cdd_I2c_priv.h : Contains internal function declarations used to realize the driver
┃ ┃ ┗ 📜Makefile
┣ 📂mcal_config
┣ 📂mcal_docs
┗ 📜README.txt

Description of generated files is provided below:

Plugin Files

Description

Cdd_I2c_Cfg.h

This file contains general container configuration parameters like DET error ON, Polling mode OFF, Sequence size, Queue size, Channel size etc.

Cdd_I2c_Cfg.c

Contains all channels Post-Build Configuration parameters

The below diagram shows the files structure for the I2C driver.

../_images/i2c_filestructure.png

4.8.6. Module requirements

4.8.6.1. Memory Mapping

The objects (e.g. variables, functions, constants) are declared by compiler independent definitions – the compiler abstraction definitions. Each compiler abstraction definition is assigned to a memory section. The following table contains the memory section names and the compiler abstraction definitions of the I2C and illustrates their assignment among each other.

Memory Mapping Sections

I2C_CODE

I2C_VAR1

I2C_VAR_NO_INIT

I2C_VAR_INIT

CDD_VAR_ZERO_INIT

I2C_CONST

I2C_PBCFG

I2C_APPL_CODE

I2C_APPL_DATA

I2C_START_SEC_CODE

x

I2C_STOP_SEC_CODE

x

I2C_START_SEC_CODE_ISR

x

I2C_STOP_SEC_CODE_ISR

x

I2C_START_SEC_PBCFG_ROOT

x

I2C_STOP_SEC_PBCFG_ROOT

x

I2C_START_SEC_PBCFG

x

I2C_STOP_SEC_PBCFG

x

I2C_START_SEC_CONST_32BIT (.text)

x

I2C_STOP_SEC_CONST_32BIT

x

I2C_START_SEC_CONST_UNSPECIFIED

x

I2C_STOP_SEC_CONST_UNSPECIFIED

x

I2C_START_SEC_VAR_NOINIT_UNSPECIFIED

x

I2C_STOP_SEC_VAR_NOINIT_UNSPECIFIED

x

I2C_START_SEC_VAR_INIT_UNSPECIFIED

x

I2C_STOP_SEC_VAR_INIT_UNSPECIFIED

x

I2C_START_SEC_VAR_ZERO_INIT_UNSPECIFIED

x

I2C_STOP_SEC_VAR_ZERO_INIT_UNSPECIFIED

x

Application buffers passed to I2C

x

Notification called from I2C

x

4.8.6.2. Scheduling

Schedule Function API

Description

Cdd_I2c_MainFunction

This function process the I2c transmission

4.8.6.3. Error handling

4.8.6.3.1. Development Error Reporting

By default, development errors are reported to the DET using the service Det_ReportError (), If development error reporting is enabled (i.e. precompile parameter CDD_I2C_DEV_ERROR_DETECT==STD_ON). If another module is used for development error reporting, the function prototype for reporting the error can be configured by the integrator, but must have the same signature as the service Det_ReportError (). The reported I2C ID is 255

4.8.6.4. Error codes

4.8.6.4.1. Development Errors

Type of Error

Related Error code

Value (Hex)

API service used without module initialization

CDD_I2C_E_UNINIT

0x01

Init service called twice without DeInit

CDD_I2C_E_ALREADY_INITIALIZED

0x02

API service called during ongoing process

CDD_I2C_E_BUSY

0x03

Channel out of bounds, exceeds the maximum number of configured channels

CDD_I2C_E_PARAM_CHANNEL

0x04

Sequence out of bounds, exceeds the maximum number of configured sequences

CDD_I2C_E_PARAM_SEQUENCE

0x05

Length out of bounds – a zero length is not accepted.
The total length is limited to 65535

CDD_I2C_E_PARAM_LENGTH

0x06

An invalid version info pointer has been passed (a NULL_PTR)

CDD_I2C_E_PARAM_VINFO_PTR

0x07

An invalid configuration has been passed (a non NULL_PTR)

CDD_I2C_E_PARAM_CONFIG

0x08

Two in-valid transmission buffers have been passed (no NULL_PTR/ or both NULL_PTR)

CDD_I2C_E_PARAM_TRANS_BUFFER

0x09

Address out of bounds, exceeds the limit of the configured address range

CDD_I2C_E_PARAM_ADDRESS

0x0A

Buffer direction conflicts with channel direction set via EB

CDD_I2C_E_PARAM_DIRECTION

0x0B

Notify callback functions passed as NULL_PTR

CDD_I2C_E_PARAM_NOTIFY_CALLBACK

0x0C

Bus error encountered during transmission or reception

CDD_I2C_E_PARAM_TRANSMISSION_ERROR

0x0D

Queue full

CDD_I2C_E_PARAM_QUEUE_FULL

0x0E

Timeout error

CDD_I2C_E_PARAM_TIMEOUT

0x0F

Hardware unit busy

CDD_I2C_E_HW_UNIT_BUSY

0x10

Channel unit busy

CDD_I2C_E_CHANNEL_BUSY

0x11

Arbitration Loss

CDD_I2C_E_ARBITRATION_LOSS

0x12

Nack

CDD_I2C_E_NACK

0x13

Receive shift register full

CDD_I2C_E_RECEIVE_SHIFT_REGISTER_FULL

0x14

4.8.7. Used resources

4.8.7.1. Interrupt Handling

Interrupt routines are provided by the CDD I2C driver is Cdd_I2c_Isr_Handler(). Basically, the ISR’s are in the file Cdd_I2c_priv.c. User might edit it for adapting for the suitable OS.

Interrupt handler shall be provided for each instance of the CDD I2C driver. e.g. If the SoC has 4 instances of CDD I2C Driver, four ISR

The corresponding CDD I2C Interrupt numbers are:

Hardware Units

ISR Handler Mapped

Interrupt Number

0

Cdd_I2c_HwUnit0_ISR

44

1

Cdd_I2c_HwUnit1_ISR

45

2

Cdd_I2c_HwUnit2_ISR

46

3

Cdd_I2c_HwUnit3_ISR

47

4.8.8. Integration description

4.8.8.1. Dependent modules

4.8.8.1.1. DET

The module I2C depends on the DET (by default) in order to report development errors. Detection and reporting of development errors can be enabled or disabled by the switch “Enable Development Error Detection” on the “General” container within the module I2C. The DET can be replaced optionally by an equivalent component which is responsible to recognize development errors, if no DET component is available.

4.8.8.1.2. MCU

The module MCU powers up the microcontroller’s peripherals at startup time and initializes clock source. Since the peripherals are also containing the registers for I/O functionality they have to be activated if it is intended to use them.

4.8.8.1.3. PORT

The module PORT enables the I2C lines at startup time. To operate the I2C properly, the PORT driver has to be configured. The PORT driver sets the Pins to the required values for the I2C to operate. The Pins used are SDA (serial data line) and SCL (serial clock). An open drain configuration is recommended. Some I2C drivers require the PORT for switching from I2C functionality to DIO functionality – to use the “clock free” procedure - and back.

4.8.8.1.4. SchM

If multiple AUTOSAR runnables have access to the same Data Store Memory block, the exported AUTOSAR specification enforces data consistency by using an AUTOSAR exclusive area. With this specification, the runnables have mutually exclusive access to the per-instance memory global data, which prevents data corruption. Beside the OS, the BSW Scheduler provides functions that CDD I2C module calls at begin and end of critical sections. This implementation requires 1 level of exclusive access to guard critical sections.

The data consistency mechanism that has to be applied to an ExclusiveArea might be domain, ECU or even project specific. The decision which mechanism has to be applied by RTE / Basic Software Scheduler is taken during ECU integration by setting the Exclusive Area configuration parameter RteExclusiveAreaImplMechanism. This parameter is an input for RTE generator.

For CDD_I2C Module, data consistency and exclusive access to critical sections are required for the following sections as shown in the table below:

Exclusive Area Functions used

CDD_I2C Function calling Exclusive Area

Need for Exclusive Area

Recommended Exclusive Area Mapping

I2C_EXCLUSIVE_AREA_0

Cdd_I2c_AsyncTransmit_PollingONcheckchannelconfigure
Cdd_I2c_AsyncTransmit_PollingOFF
Cdd_I2c_AsyncTransmit_PollingOFFsequencecheck

To protect against multiple access for shared resources

ALL_INTERRUPT_BLOCKING : All interrupts should be blocked as this API’s can be called in the interrupts

4.8.8.1.5. Configurable callback functions

4.8.8.1.5.1. Notifications

At its configurable interfaces the I2C defines notifications that can be mapped to callback functions in case completion of a sequence or failure of a sequence. The mapping is not statically defined by the I2C but can be performed at configuration time.

4.8.8.1.5.2. I2c_SequenceCompleteNotification

Sequence transfer successful notification function. Can be configured in the configuration tool.

Particularities and Limitations: It is advised to keep the code execution in the notification function as short as possible.

Call context: Interrupt as well as polling

4.8.8.1.5.3. I2c_SequenceErrorNotification

Sequence transfer error notification function. If the I2c detects an error, this function notifies the application about a communication failure. Can be configured in the configuration tool.

Particularities and Limitations: It is advised to keep the code execution in the notification function as short as possible.

Call context: Interrupt as well as polling

For the Following API’s it is possible to be called from the sequence notifications:

  1. Cdd_I2c_DeInit

  2. Cdd_I2c_GetVersionInfo

  3. Cdd_I2c_SetupEB

  4. Cdd_I2c_SetupEBDynamic

  5. Cdd_I2c_AsyncTransmit

  6. CDD_I2c_Cancel

  7. Cdd_I2c_GetResult

  8. Cdd_I2c_GetSequenceResult

  9. Cdd_I2c_MainFunction

  10. Cdd_I2c_PollingModeProcessing

  11. Cdd_I2c_SetHandling

  12. Cdd_I2c_GetStatus

4.8.8.2. Multi-core support

Not Supported

4.8.9. Configuration

4.8.9.1. CddI2cDevErrorDetect

Item

Description

I2c Dev Error ON/OFF.

Post-build-variant-multiplicity

false

Name

CddI2cDevErrorDetect

Origin

Texas Instruments

Post-Build-Variant-Value

false

Value-Configuration-Class

Pre-Compile-Time

VARIANT-PRE-COMPILE

Default-value

true

4.8.9.2. CddI2cUseInterrupts

Item

Name

CddI2cUseInterrupts

Description

Switches to activate or deactivate interrupt controlled job processing(ON/OFF).

Origin

Texas Instruments

Post-build-variant-multiplicity

false

Post-Build-Variant-Value

false

Value-Configuration-Class

Pre-Compile-Time

VARIANT-PRE-COMPILE

Default-value

false

4.8.9.3. CddI2cVersionInfoApi

Item

Name

CddI2cVersionInfoApi

Description

Pre-processor switch to enable/disable the API to read out the modules version information.

Origin

Texas Instruments

Post-build-variant-multiplicity

false

Post-Build-Variant-Value

false

Value-Configuration-Class

Pre-Compile-Time

VARIANT-PRE-COMPILE

Default-value

true

4.8.9.4. CddI2cArbitrationLossCheck

Item

Name

CddI2cArbitrationLossCheck

Description

Switches to activate or deactivate Arbitration loss interrupt(ON/OFF).

Origin

Texas Instruments

Post-build-variant-multiplicity

false

Post-Build-Variant-Value

false

Value-Configuration-Class

Pre-Compile-Time

VARIANT-PRE-COMPILE

Default-value

false

4.8.9.5. CddI2cNackAsErrorCheck

Item

Name

CddI2cNackAsErrorCheck

Description

Switches to activate or deactivate NACK error check(ON/OFF).

Origin

Texas Instruments

Post-build-variant-multiplicity

false

Post-Build-Variant-Value

false

Value-Configuration-Class

Pre-Compile-Time

VARIANT-PRE-COMPILE

Default-value

false

4.8.9.6. CddI2cCancelCheck

Item

Name

CddI2cCancelCheck

Description

Switches to activate or deactivate the Cancel channel transmission API(ON/OFF).

Origin

Texas Instruments

Post-build-variant-multiplicity

false

Post-Build-Variant-Value

false

Value-Configuration-Class

Pre-Compile-Time

VARIANT-PRE-COMPILE

Default-value

false

4.8.9.7. CddI2cStatusCheck

Item

Name

CddI2cStatusCheck

Description

Switches to activate or deactivate Cdd_I2c_GetStatus API(ON/OFF).

Origin

Texas Instruments

Post-build-variant-multiplicity

false

Post-Build-Variant-Value

false

Value-Configuration-Class

Pre-Compile-Time

VARIANT-PRE-COMPILE

Default-value

false

4.8.9.8. CddI2cMultipleSequenceInQueueProcessCheck

Item

Name

CddI2cMultipleSequenceInQueueProcessCheck

Description

Switches to activate or deactivate functionality to process same sequence in queue multiple times (ON/OFF).

Origin

Texas Instruments

Post-build-variant-multiplicity

false

Post-Build-Variant-Value

false

Value-Configuration-Class

Pre-Compile-Time

VARIANT-PRE-COMPILE

Default-value

false

4.8.9.9. CddI2cArbitrationLossParam

Item

Name

CddI2cArbitrationLossParam

Description

Type of Isr function: void functionname(void) CAT1 : interrupt void func(void) CAT2 : ISR(func)

Origin

Texas Instruments

Post-build-variant-multiplicity

false

Post-Build-Variant-Value

false

Value-Configuration-Class

Pre-Compile-Time

VARIANT-PRE-COMPILE

Default-value

CDD_I2C_ISR_VOID

Range

CDD_I2C_ISR_VOID
CDD_I2C_ISR_CAT1
CDD_I2C_ISR_CAT2

4.8.9.10. CddI2cDefaultOSCounterId

Item

Name

CddI2cDefaultOSCounterId

Description

Default Os Counter Id if node reference to OsCounter ref CddI2cOsCounterRef is not set

Origin

Texas Instruments

Post-build-variant-multiplicity

false

Post-Build-Variant-Value

false

Value-Configuration-Class

Pre-Compile-Time

VARIANT-PRE-COMPILE

Default-value

0

Max-value

16

Min-value

0

4.8.9.11. CddI2cArbitrationLossTimeout

Item

Name

CddI2cArbitrationLossTimeout

Description

I2C timeout - used for timing I2C arbitration loss wait wait

Origin

Texas Instruments

Post-build-variant-multiplicity

false

Post-Build-Variant-Value

false

Value-Configuration-Class

Pre-Compile-Time

VARIANT-PRE-COMPILE

Default-value

1000

Max-value

4294967295

Min-value

1

4.8.9.12. CddI2cPollTimeout

Item

Name

CddI2cPollTimeout

Description

I2C timeout - used for I2C polling timeouts

Origin

Texas Instruments

Post-build-variant-multiplicity

false

Post-Build-Variant-Value

false

Value-Configuration-Class

Pre-Compile-Time

VARIANT-PRE-COMPILE

Default-value

1000

Max-value

4294967295

Min-value

1

4.8.9.13. CddI2cQueueTimeout

Item

Name

CddI2cQueueTimeout

Description

I2C timeout - used for queue timeouts. Unit is in clock ticks. Configure the timeout according to r5f clock frequency(400MHz/200MHz)

Origin

Texas Instruments

Post-build-variant-multiplicity

false

Post-Build-Variant-Value

false

Value-Configuration-Class

Pre-Compile-Time

VARIANT-PRE-COMPILE

Default-value

1000

Max-value

4294967295

Min-value

1

4.8.9.14. CddI2cQueueSize

Item

Name

CddI2cQueueSize

Description

Define I2c driver max queue size.

Origin

Texas Instruments

Post-build-variant-multiplicity

false

Post-Build-Variant-Value

false

Value-Configuration-Class

Pre-Compile-Time

VARIANT-PRE-COMPILE

Default-value

10

Max-value

255

Min-value

0

4.8.9.15. CddI2cMaxlengthByte

Item

Name

CddI2cMaxlengthByte

Description

Maximum Length of byte to be write or read

Origin

Texas Instruments

Post-build-variant-multiplicity

false

Post-Build-Variant-Value

false

Value-Configuration-Class

Pre-Compile-Time

VARIANT-PRE-COMPILE

Default-value

1

Max-value

255

Min-value

0

4.8.9.16. CddI2cHwUnitsUsed

Item

Name

CddI2cHwUnitsUsed

Description

Maximum number of I2c hardware units used

Origin

Texas Instruments

Post-build-variant-multiplicity

false

Post-Build-Variant-Value

false

Value-Configuration-Class

Pre-Compile-Time

VARIANT-PRE-COMPILE

Default-value

1

Max-value

4

Min-value

1

4.8.9.17. CddI2cOsCounterRef

Item

Name

CddI2cOsCounterRef

Description

This parameter contains a reference to the OsCounter, which is used by the CddI2c driver.

Origin

Texas Instruments

Post-build-variant-multiplicity

false

Post-Build-Variant-Value

false

Value-Configuration-Class

Pre-Compile-Time

VARIANT-PRE-COMPILE

4.8.9.18. CddI2cHwConfig

This container contains the HW unit initialization parameters

4.8.9.18.1. CddI2cHwUnitType

Item

Name

CddI2cHwUnitType

Description

I2c HW unit to use.

Origin

Texas Instruments

Post-build-variant-multiplicity

false

Post-Build-Variant-Value

false

Value-Configuration-Class

Pre-Compile-Time

VARIANT-PRE-COMPILE

Default-value

CDD_I2C_HW_UNIT_0

Range

CDD_I2C_HW_UNIT_0
CDD_I2C_HW_UNIT_1
CDD_I2C_HW_UNIT_2
CDD_I2C_HW_UNIT_3

4.8.9.18.2. CddI2cChannelBitRate

Item

Name

CddI2cChannelBitRate

Description

Selection of Channel Bit Rate.

Origin

Texas Instruments

Post-build-variant-multiplicity

false

Post-Build-Variant-Value

false

Value-Configuration-Class

Pre-Compile-Time

VARIANT-PRE-COMPILE

Default-value

CDD_I2C_100KHZ

Range

CDD_I2C_100KHZ
CDD_I2C_400KHZ
CDD_I2C_1P0MHZ
CDD_I2C_3P4MHZ

4.8.9.18.3. CddI2cHwUnitFrequency

Item

Name

CddI2cHwUnitFrequency

Description

Frequency which the HW unit will utilise, please note that this differs from the bus frequency used for communication

Origin

Texas Instruments

Post-build-variant-multiplicity

false

Post-Build-Variant-Value

false

Value-Configuration-Class

Pre-Compile-Time

VARIANT-PRE-COMPILE

Default-value

96000000

4.8.9.18.4. CddI2cClkInputSrc

Item

Name

CddI2cClkInputSrc

Description

Please ensure that the frequency used here should be the same as mcu clk settings for I2c, as this is required internally to calculate pre-scalar which is needed to set the bus frequency

Origin

Texas Instruments

Post-build-variant-multiplicity

false

Post-Build-Variant-Value

false

Value-Configuration-Class

Pre-Compile-Time

VARIANT-PRE-COMPILE

Default-value

200000000

Max-value

4294967295

Min-value

0

4.8.9.19. CddI2cChannelConfig

This container contains the Channel configurations

4.8.9.19.1. CddI2cChannelDirection

Item

Name

CddI2cChannelDirection

Description

Selection of Channel direction.

Origin

Texas Instruments

Post-build-variant-multiplicity

false

Post-Build-Variant-Value

false

Value-Configuration-Class

Pre-Compile-Time

VARIANT-PRE-COMPILE

Default-value

CDD_I2C_WRITE

Range

CDD_I2C_WRITE
CDD_I2C_READ

4.8.9.19.2. CddI2cChannelSlaveAddress

Item

Name

CddI2cChannelSlaveAddress

Description

Specifies whether channel is 7 bit or 10 bit.

Origin

Texas Instruments

Post-build-variant-multiplicity

false

Post-Build-Variant-Value

false

Value-Configuration-Class

Pre-Compile-Time

VARIANT-PRE-COMPILE

Default-value

CDD_I2C_7_BIT_ADDRESS

Max-value

65535

Min-value

0

Range

CDD_I2C_7_BIT_ADDRESS
CDD_I2C_10_BIT_ADDRESS

4.8.9.20. CddI2cSequenceConfig

This container contains the Sequence configurations

4.8.9.20.1. CddI2cSequenceHwUnitType

Item

Name

CddI2cSequenceHwUnitType

Description

I2c HW unit to use.

Origin

Texas Instruments

Post-build-variant-multiplicity

false

Post-Build-Variant-Value

false

Value-Configuration-Class

Pre-Compile-Time

VARIANT-PRE-COMPILE

Default-value

CDD_I2C_HW_UNIT_0

Range

CDD_I2C_HW_UNIT_0
CDD_I2C_HW_UNIT_1
CDD_I2C_HW_UNIT_2
CDD_I2C_HW_UNIT_3

4.8.9.20.2. CddI2cNumberOfChannelsInSequence

Item

Name

CddI2cNumberOfChannelsInSequence

Description

Set the number of channels in the sequence

Origin

Texas Instruments

Post-build-variant-multiplicity

false

Post-Build-Variant-Value

false

Value-Configuration-Class

Pre-Compile-Time

VARIANT-PRE-COMPILE

Default-value

1

Max-value

255

Min-value

1

4.8.9.20.3. CddI2cSequenceCompleteNotify

Item

Name

CddI2cSequenceCompleteNotify

Description

Function pointer to callback function sequence complete notify

Origin

Texas Instruments

Post-build-variant-multiplicity

false

Post-Build-Variant-Value

false

Value-Configuration-Class

Pre-Compile-Time

VARIANT-PRE-COMPILE

Default-value

NULL_PTR

4.8.10. Examples

The example applications demonstrates use of I2C module, the list below identifies key steps performed in the example.

4.8.10.1. Overview

  • I2c Example:

    • Initialize clock using Mcu_Init()

    • Initializes pins as I2C SDA and SCL using Port_Init()

    • Configure interrupt using Cdd_I2c_InterruptConfig()

    • Get I2C version using Cdd_I2c_GetVersionInfo()

    • Initialize I2c module using Cdd_I2c_Init()

    • Set up channels using I2c_Buffer_Setup()

    • Write data to Temperature sensor and EEPROM

    • Write dummy data to EEPROM to reset address pointer

    • Receive and process data

    • De-initialize I2c module using Cdd_I2c_DeInit()

4.8.10.2. Setup required to run example

None

4.8.10.3. How to run examples

I2C example application demonstrating the MCAL I2C driver features is in folder <MCAL_ROOT>/examples /I2C.

This application can be built from the root folder by giving “gmake -s I2c_app PLATFORM=am263px”.

4.8.10.4. Sample Log

I2cApp: Sample Application - STARTS !!!
I2cApp: gI2cAppMcuClockConfig[0].Mcu_ClockSourceId = 2 gI2cAppMcuClockConfig[0].Mcu_ClockDiv = 0  :
I2cApp: Vendor ID: 44
I2cApp: Module ID: 255
I2cApp: SW Major version ID: 10
I2cApp: SW Minor version ID: 0
I2cApp: SW Patch version ID: 0
I2cApp: Temperature write SuccessFull 
I2cApp: Message written to EEPROM: I2C read/write test passed 
I2cApp: EEPROM address pointer reset to start read from location : 0
I2cApp: Temperature sensor reading : 38.500000 (celcius)
I2cApp: Message read from EEPROM: I2C read/write test passed
All tests have passed

4.8.10.5. File Structure

📦AM263Px
┣ 📂build
┣ 📂mcal
┃ ┣ 📂examples
┃ ┃ ┣ 📂I2c
┃ ┃ ┃ ┣ 📂soc
┃ ┃ ┃ ┣ 📜I2capp.c : Contains I2c test example
┃ ┃ ┃ ┗ 📜Makefile
┃ ┣ 📂examples_config
┃ ┃ ┣ 📂I2c_Demo_Cfg
┃ ┃ ┃ ┗ 📂soc
┃ ┃ ┃ ┃ ┣ 📂am263px
┃ ┃ ┃ ┃ ┃ ┗ 📂r5f0_0
┃ ┃ ┃ ┃ ┃ ┃ ┣ 📂include
┃ ┃ ┃ ┃ ┃ ┃ ┃ ┗📜Cdd_I2c_Cfg.h : Contains the configuration parameters
┃ ┃ ┃ ┃ ┃ ┃ ┗ 📂src
┃ ┃ ┃ ┃ ┃ ┃ ┃ ┗ 📜Cdd_I2c_Cfg.c : Contains all Pre-Compile Configured parameters
┃ ┃ ┃ ┃ ┃ ┃ ┗ 📂swcd
┃ ┃ ┃ ┃ ┃ ┃ ┃ ┗ 📜Cdd_I2c_Bswmd.arxml : contains the arxml description file
┃ 📂mcal_config
┃ 📂mcal_docs
┗ 📜README.txt

4.8.11. References

Technical Reference Manual