AM64x MCU+ SDK  10.01.00
phy_common.h File Reference

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Data Structures

struct  Phy_Version
 
struct  Phy_RegAccessCb_t
 
struct  Phy_DrvObj_t
 
struct  Phy_Obj_t
 

Macros

#define ETHPHYDRV_MAX_OBJ_SIZE   (64) /* to meet the size of Phy_Obj_t */
 
#define PHY_DIV_ROUNDUP(val, div)   (((val) + (div) - 1) / (div))
 Macro to perform round-up division. More...
 
#define PHY_BIT(n)   (1U << (n))
 Macro to set bit at given bit position. More...
 
#define PHY_ON   (1U)
 Build-time config option is enabled. More...
 
#define PHY_OFF   (0U)
 Build-time config option is disabled. More...
 
#define PHY_CFG_IS_ON(name)   ((PHY_CFG_ ## name) == PHY_ON)
 Preprocessor check if config option is enabled. More...
 
#define PHY_CFG_IS_OFF(name)   ((PHY_CFG_ ## name) == PHY_OFF)
 Preprocessor check if config option is disabled. More...
 
#define PHY_BMCR   (0x00U)
 Basic Mode Control Register (BMCR) More...
 
#define PHY_BMSR   (0x01U)
 Basic Mode Status Register (BMSR) More...
 
#define PHY_PHYIDR1   (0x02U)
 PHY Identifier Register #1 (PHYIDR1) More...
 
#define PHY_PHYIDR2   (0x03U)
 PHY Identifier Register #2 (PHYIDR2) More...
 
#define PHY_ANAR   (0x04U)
 Auto-Negotiation Advertisement Register (ANAR) More...
 
#define PHY_ANLPAR   (0x05U)
 Auto-Negotiation Link Partner Abilitiy Register (ANLPAR) More...
 
#define PHY_ANER   (0x06U)
 Auto-Negotiation Expansion Register (ANER) More...
 
#define PHY_ANNPTR   (0x07U)
 Auto-Negotiation NP TX Register (ANNPTR) More...
 
#define PHY_ANNPRR   (0x08U)
 Auto-Neg NP RX Register (ANNPRR) More...
 
#define PHY_GIGCR   (0x09U)
 1000BASE-T Control Register (GIGCR) More...
 
#define PHY_GIGSR   (0x0AU)
 1000BASE-T Status Register (GIGSR) More...
 
#define PHY_MMD_CR   (0x0DU)
 MMD Access Control Register. More...
 
#define PHY_MMD_DR   (0x0EU)
 MMD Access Data Register. More...
 
#define PHY_GIGESR   (0x0FU)
 1000BASE-T Extended Status Register (GIGESR) More...
 
#define MMD_CR_ADDR   (0x0000U)
 
#define MMD_CR_DATA_NOPOSTINC   (0x4000U)
 
#define MMD_CR_DATA_POSTINC_RW   (0x8000U)
 
#define MMD_CR_DATA_POSTINC_W   (0xC000U)
 
#define MMD_CR_DEVADDR   (0x001FU)
 
#define PHY_BMCR_RESET   PHY_BIT(15)
 
#define PHY_BMCR_LOOPBACK   PHY_BIT(14)
 
#define PHY_BMCR_SPEED100   PHY_BIT(13)
 
#define PHY_BMCR_ANEN   PHY_BIT(12)
 
#define PHY_BMCR_PWRDOWN   PHY_BIT(11)
 
#define PHY_BMCR_ISOLATE   PHY_BIT(10)
 
#define PHY_BMCR_ANRESTART   PHY_BIT(9)
 
#define PHY_BMCR_FD   PHY_BIT(8)
 
#define PHY_BMCR_SPEED1000   PHY_BIT(6)
 
#define PHY_EXTENDED_CFG_SIZE_MAX   (128U)
 Max extended configuration size, arbitrarily chosen. More...
 
#define PHY_LINK_CAP_HD10   PHY_BIT(1)
 10-Mbps, half-duplex capability mask. More...
 
#define PHY_LINK_CAP_FD10   PHY_BIT(2)
 10-Mbps, full-duplex capability mask. More...
 
#define PHY_LINK_CAP_HD100   PHY_BIT(3)
 100-Mbps, half-duplex capability mask. More...
 
#define PHY_LINK_CAP_FD100   PHY_BIT(4)
 100-Mbps, full-duplex capability mask. More...
 
#define PHY_LINK_CAP_HD1000   PHY_BIT(5)
 1-Gbps, half-duplex capability mask. More...
 
#define PHY_LINK_CAP_FD1000   PHY_BIT(6)
 1-Gbps, full-duplex capability mask. More...
 
#define PHY_LINK_CAP_10   (PHY_LINK_CAP_HD10 | PHY_LINK_CAP_FD10)
 10-Mbps, full and half-duplex capability mask. More...
 
#define PHY_LINK_CAP_100   (PHY_LINK_CAP_HD100 | PHY_LINK_CAP_FD100)
 100-Mbps, full and half-duplex capability mask. More...
 
#define PHY_LINK_CAP_1000   (PHY_LINK_CAP_HD1000 | PHY_LINK_CAP_FD1000)
 1-Gbps, full and half-duplex capability mask. More...
 
#define PHY_LINK_CAP_ALL
 Auto-negotiation mask with all duplexity and speed values set. More...
 
Ethernet PHY driver error codes

Error codes returned by the Ethernet PHY driver APIs.

#define PHY_SOK   ( (int32_t) (0))
 Success. More...
 
#define PHY_EFAIL   (-(int32_t) (1))
 Generic failure error condition (typically caused by hardware). More...
 
#define PHY_EBADARGS   (-(int32_t) (2)) (-(int32_t) (2))
 Bad arguments (i.e. NULL pointer). More...
 
#define PHY_EINVALIDPARAMS   (-(int32_t) (3))
 Invalid parameters (i.e. value out-of-range). More...
 
#define PHY_ETIMEOUT   (-(int32_t) (4))
 Time out while waiting for a given condition to happen. More...
 
#define PHY_EALLOC   (-(int32_t) (8))
 Allocation failure. More...
 
#define PHY_EPERM   (PHY_EALLOC - 4)
 Operation not permitted. More...
 
#define PHY_ENOTSUPPORTED   (PHY_EALLOC - 5)
 Operation not supported. More...
 

Typedefs

typedef uint8_t EthPhyDrv_Handle[ETHPHYDRV_MAX_OBJ_SIZE]
 
typedef Phy_DrvObj_tEthPhyDrv_If
 

Enumerations

enum  Phy_Mii {
  PHY_MAC_MII_MII = 0U, PHY_MAC_MII_RMII, PHY_MAC_MII_GMII, PHY_MAC_MII_RGMII,
  PHY_MAC_MII_SGMII, PHY_MAC_MII_QSGMII
}
 

Functions

int32_t GenericPhy_readExtReg (EthPhyDrv_Handle hPhy, uint32_t reg, uint16_t *val)
 
int32_t GenericPhy_writeExtReg (EthPhyDrv_Handle hPhy, uint32_t reg, uint16_t val)
 
void GenericPhy_reset (EthPhyDrv_Handle hPhy)
 
bool GenericPhy_isResetComplete (EthPhyDrv_Handle hPhy)