2.9. Release Notes - 07_03_00¶
2.9.1. Introduction¶
This release notes provides important information that will assist you in using the PDK software package for the Jacinto family of devices. This document provides the product information and known issues that are specific to the PDK software package.
New features added / supported is listed below and defects fixed are highligted in Fixed Issues also please check Upgrade and Compatibility for backward compatibility
2.9.2. What’s New¶
PDK-5257 |
Support Windows Package for Core SDK |
BUILD |
J721E, J7200 |
PDK-9312 |
FreeRTOS Support on R5F for CPU |
OSAL |
J721E, J7200 |
PDK-8726 |
OSPI Cache Support |
OSPI |
J721E, J7200 |
PDK-9263 |
J721E HS-EVM Support |
COMMON |
J721E |
PDK-5179 |
DSS FVID2 Writeback M2M Driver |
DSS |
J721E |
PDK-9321 |
DSS M2M: Single Channel Support |
DSS |
J721E |
PDK-9320 |
DSS M2M: Chrominance Subsampling - YUV422 to YUV420 |
DSS |
J721E |
PDK-9319 |
DSS M2M: Color Space Conversion - RGB to YUV |
DSS |
J721E |
PDK-5211 |
DSS M2M: Color Space Conversion - YUV to RGB |
DSS |
J721E |
PDK-5184 |
DSS Writeback Pipeline Support |
DSS |
J721E |
PDK-9317 |
DDR: Support for Thermal Testapp on MAIN Domain R5 cores |
DDR |
J721E |
2.9.3. Upgrade and Compatibility¶
2.9.3.1. emac¶
pdk/packages/ti/drv/emac Will be deprecated in subsequent release
From SDK versioned v07.03.00, enet drivers support ICSSG ports too
emac is replaced by enet drivers
2.9.3.2. Sciclient¶
The Sciclient Sciclient_service API does not accept NULL pointers for the pRespPayload and expects the respPayloadSize to be the size of the structure pointed to by pRespPayload.
2.9.3.3. BoardCfg RM¶
Removed the shared resource allocation(entries for both secure and non_secure context) for MCU R5(mcu1_0) in default BoardCfg RM. MCU R5(mcu1_0) resource entries are only for non-secure host ID. This is because, Messages forwarded from DM must originate from a non-secure host in the system. Any secure host ID used during a forwarded request will be rejected as a spoofing attempt. Hence, Sciclient should be initialized in non-secure mode. ie, Sciclient_ConfigPrms_t->isSecureMode shouldn’t be set to 1U
2.9.3.4. ENET¶
txPktTc and txTsId fields have been added to EnetUdma_PktInfo for ICSSG peripheral usage. They are not required for CPSW. No action needed for applications using CPSW peripheral that initialize EnetUdma_PktInfo via EnetDma_initPktInfo(), otherwise must explicity set txPktTc to ENET_TRAFFIC_CLASS_INV.
Added ENET_TIMESYNC_IOCTL_TS_TO_NS ioctl command to convert timestamp values to nanoseconds values. This IOCTL is not required for packet timestamping in CPSW peripheral.
Following IOCTLs have been renamed:
CPSW_IOCTL_[UN]REGISTER_RX_DEFAULT_FLOW to ENET_IOCTL_[UN]REGISTER_RX_DEFAULT_FLOW.
CPSW_IOCTL_[UN]REGISTER_DSTMAC_RX_FLOW to ENET_IOCTL_[UN]REGISTER_DSTMAC_RX_FLOW.
Mdio_Cfg has added isMaster field for cases where MDIO module is shared with multiple peripherals, so only one peripheral (master) must perform the MDIO initial configuration and be skipped by the other peripherals (slaves). This is not needed by applications using CPSW.
2.9.3.5. Board Library¶
2.9.3.6. Board Diagnostics¶
Board diagnostic test framework which integrates diagnostic tests into menu based execution is no longer supported. This module is meant for board manufacturers and not validated as part of the SDK.
Board diagnostic tests serve as reference for board bring-up and they are not recommended to be used as reference for production software development.
2.9.4. Device Support¶
J721E EVM SR1.0 and SR1.1, J721E-HS EVM (BOARD=j721e_evm)
Associated TIFS versions: - ‘tifs.bin’ for J721E SR1.0 and SR1.1 GP devices - ‘tifs-hs-enc.bin’ for J721E-HS SR1.0 - ‘tifs-sr1.1-hs-enc.bin’ for J721E-HS SR1.1
sysfw name |
AM65xx SR revision |
|---|---|
sysfw.bin |
SR1.0 |
sysfw-hs-enc.bin |
SR1.0 HS |
sysfw_sr2.bin |
SR2.0 & SR2.1 |
sysfw_sr2-hs-enc.bin |
SR2.0 HS & SR2.1 HS |
2.9.5. Validation Information¶
For details on the validated examples refer to the platform specific test report available here.
2.9.6. Tool Chain Information¶
Component |
Version |
|---|---|
Sys Bios |
6_83_02_07 |
XDC Tools |
3_61_04_40_core |
Network Development Kit (NDK) |
3_80_00_19 |
Network Services for NDK (NS) |
2_80_00_17 |
TI ARM R5F code generation tools |
20.2.0.LTS |
PRU code generation tools |
2.3.3 |
GCC ARM code generation tools |
ARCH64 9.2-2019.12 |
CGT XML Processing Scripts |
2.61.00 |
System Analyzer (UIA Target) |
2_41_00_01 |
Component |
Version |
|---|---|
TI C6x code generation tools |
8.3.7 |
TI C7x code generation tools |
1.4.2.LTS |
2.9.7. Fixed Issues¶
ID |
Head Line |
Module |
Affected Versions |
Affected Platforms |
|---|---|---|---|---|
Display stops working if two pipelines are started back to back |
DSS |
06.02.00 |
J721E |
|
Timer osal - noos - Timer should be reset first before registering interrupts |
OSAL |
06.02.00 |
J721E |
|
Sciclient_rmIrqRelease API is failing |
SCICLIENT |
07.01.00 |
J721E |
|
PDK-8502 |
Uniflash flash programmer failure in DMA mode |
BOARD |
07.01.00 |
J721E, AM65xx |
Recent DDR config update to 4266 MT/s causing DDR memory failures on some boards |
BOARD |
07.01.00 |
J721E |
|
Timer osal - noos - Timer delete doesn’t “free” timer |
OSAL |
06.02.00 |
J721E |
|
Master Slave: Data corruption in mode 0 |
McSPI |
07.01.00 |
J7200 |
|
PDK-8586 |
Early CAN response measurement is beyond 50 ms for J721E |
SBL |
07.01.00 |
J721E |
PDK-9240 |
SBL fails to initialize DDR after warm reset |
BOARD, SBL |
07.01.00 |
J721E |
PDK-8945 |
Interrupts are disabled globally in Sciclient_service API |
SCICLIENT |
07.00.00 |
J721E |
PDK-9328 |
OSPI tuning calculation fails in linear search algorithm |
OSPI |
07.02.00 |
J721E |
PDK-8598 |
ospi flash test fails when the ospi memory is cachable |
OSPI |
07.01.00 |
J721E, J7200 |
PDK-8226 |
R5FSS: The same interrupt cannot be nested back-2-back within another interrupt |
CSL |
07.00.00 |
J721E, AM65xx |
PDK-6848 |
osal - task delete function should check for deleteTerminatedTasks flag |
OSAL |
07.00.00 |
J721E, J7200 |
PDK-6706 |
McSPI : Driver Master example is not functional |
McSPI |
07.00.00 |
J721E, AM65xx |
PDK-8932 |
PMIC: Pmic Handle Critical Section Stop Function validation check is incorrect |
PMIC |
07.01.00 |
J721E, J7VCL |
PDK-8863 |
PMIC: Critical Section causing hang in Pmic_gpioIntrDisable API |
PMIC |
07.02.00 |
J721E, J7200 |
PDK-8131 |
PMIC: Asynchronous Interrupt tests failure on Main domain R5 Cores |
BOARD |
07.01.00 |
J7200 |
PDK-9050 |
Diag : Hyperbus : is not functional |
CSL, DIAG |
07.01.00 |
J721E |
2.9.8. Known Issues¶
ID |
Head Line |
Module |
Reported in Release |
Affected Platforms |
Impact |
Workaround in this release |
|---|---|---|---|---|---|---|
USB : 3.0 : Hagiwara drive : fails to enumerate as 3.0 : once in 250 times average |
USB 3.0 |
07.00.00 |
AM65xx |
Hagiwara USB 3.0 devices may not be enumerated as 3.0 |
Consider operating in 2.0 mode |
|
USB: USB3.0 enumeration failing for some of the adapters |
USB 3.0 |
07.00.00 |
AM65xx |
Some of USB 3.0 devices may not be enumerated as 3.0 |
Consider operating in 2.0 mode |
|
PCIE-0 : Gen 3 : Intermittent failures during Gen 3 mode on AM65x PG2.0 |
PCIe |
07.00.00 |
AM65xx |
GEN 3 mode is stable |
Use GEN 2 mode |
|
McSPI : All data words not transmitted in FIFO, interrupt mode when length not divisible by FIFO |
McASP |
07.01.00 |
AM65xx |
In Complete data transfers |
Transfer length should be multiple of FIFO depth |
|
PDK-9717 |
AM65xx : SA2UL : Demo application is not functional |
SA2UL |
07.03.00 |
AM65xx |
SA2UL Is not functional |
None |
[DSS Test]Sync-lost is observed for RGB24/BGR24 test-cases |
DSS |
07.01.00 |
AM65xx |
No images displayed on the screen / flicker |
None |
|
csl_cbass_baremetal_test_app fails on QoS Test |
CBAS |
07.01.00 |
AM65xx |
None |
None |
|
McASP regression test app some tests are failing |
CBAS |
07.00.00 |
AM65xx |
None |
None |
|
MMCSD read/write failure with 1.8V - no I/F to program timings params |
MMC/SD |
07.00.00 |
AM65xx |
Requires timing update in driver io != 3.3v |
None |
|
Active DP -> HDMI adapter doesn’t work |
DSS |
00.09.01 |
J721E |
DP to HDMI adapter for display cannot be used. |
None |
|
Display flickers for BT601 output format |
DSS |
07.00.00 |
J721E |
None |
||
ICSS V1 CSL not up to date with ICSSG |
CSL |
07.00.00 |
J721E, AM65xx |
None |
Patch available. Will be included in next release |
|
Increase in Boot time when DDR ECC is enabled |
BOARD |
07.02.00 |
J721E, J7200 |
Increase in boot time |
Use UDMA for priming the DDR. |
|
I2C Driver does not return error when camera/client is not available on the I2C bus |
I2C |
07.02.00 |
J721E |
Application continues even if sensors programming has failed. |
None |
|
MASTER _BYPASS bit in PHY_MASTER_CONTROL should be controlled based on the clock |
OSPI |
07.01.00 |
J721E |
None |
None |
|
Pulsar (R5F) : High priority interrupt is missed by VIM |
CSL, OSAL |
07.00.00 |
J721E, J7200, AM65xx |
Baremetal implementation is pending |
Use SYSBIOS instead of baremetal |
|
J721E: MCU Timer 0 is not usable from application (sysbios) with SBL |
OSAL, SBL |
07.01.00 |
J721E |
None |
Use any other timer |
|
UDMA MCU NAVSS Channel Num 5 is not functional, when booting the application using the SBL bootloader. |
UDMA |
07.01.00 |
J721E |
Low Impact. UDMA MCU NAVSS Channel 5 can’t be used when booting the application using the SBL bootloader. |
Use any other channel. In the defaultBoardCfg Channel no. 5 is not used. The issue will be seen only when the boardcfg is updated to use channel 5. |
|
MCU/Main NAVSS UDMA memcpy from L2SRAM fails |
UDMA |
07.00.00 |
J721E |
Transfer works fine when source buffer, destination buffer and TRPD buffers are in L2SRAM. The issue happens only when the ring memory is in L2SRAM location |
Use ring memory from non-L2SRAM location |
|
Output mismatch when each region requiring 3 TRs |
VHWA |
01.00.00 |
J721E |
In multi-region mode with more then 3 TR per region can’t be used |
In multi-region mode for each region less than 3 TR should be used |
|
DOF generated wrong output with SOF if pixel in all row are not enabled |
VHWA |
01.00.00, 00.09.01 |
J721E |
When using the SOF if the Paxel rows without any pixel enabled is not in consecutive pair with lead to lead to output mismatch |
This issue is due to shift in flowvector out buffer. While generating the SOF binary map make sure that Paxel rows without any pixel enabled should be in consecutive pair |
|
VPAC VISS driver doesn’t support several valid mux combinations for outputs |
VHWA |
01.00.00, 00.09.01 |
J721E |
VISS output with Chroma only and one of the RGB component enabled may not work |
Enable YUV420 instead of Chroma only while using RGB component |
|
[CPSW] Packet drop with QSGMII ports IPerf |
Enet |
06.02.00 |
J721E, J7200 |
None |
None |
|
mcu2_1: loopback: Test fails to setup interrupts in iteration 2 |
Enet |
07.01.00 |
J721E |
None |
Avoid restarting Enet LLD on J721E mcu2_1 core |
|
PRSDK-5074 |
McASP driver hangs with small buffer size |
McASP |
05.01.00 |
J721E, AM65xx |
None |
Use packet size 32 samples or greater |
MCU2 core diagnostic tests not running through sbl |
BOARD |
07.00.00 |
J721E |
None |
Use CCS/JTAG to run the tests |
|
Display port (eDP) diagnostic test failure |
BOARD |
07.00.00 |
J721E |
None |
Use display sample application |
|
PMIC: Asynchronous Interrupt tests failure on Main domain R5 Cores and mcu1_1 core |
BOARD |
07.01.00 |
J721E |
None |
Use Polled mode |
|
ECAP CSL Capture Event Counter Reset Function Fails |
CSL |
07.03.00 |
J721E, J7200 |
None |
None |
|
PDK-8601 |
CSL ECC test application fails on J721E and J7200 |
CSL |
07.01.00 |
J721E, J7200 |
None |
None |
SBL prebuild binary for J721E HS doesn’t work from package |
SBL |
07.03.00 |
J721E-HS |
None |
Cleanup the SBL library and re-build the SBL image for HS. Commands: - Clean sbl_lib_uart (make sbl_lib_uart_clean) - Build for HS (make -sj sbl_uart_img_hs) |
|
CSI2-RX: Stream FIFO Overflow observed for 4 channel input with FrameSync |
CSI2-RX |
06.02.00 |
J721E |
Multi-channel capture with FrameSync cannot be used. |
None |
|
SBL optimizations for OSPI boot mode |
SBL |
07.00.00 |
J721E |
None |
None |
|
OSPI_Baremetal_Flash_Dma_TestApp fails on mpu1_0 in release mode |
OSPI |
07.03.00 |
J7200 |
None |
None |
|
icssg: RX ch teardown timed out observed in NIMU restart |
ENET |
07.03.00 |
AM65XX |
Low - observed during shutdown sequence |
None |
|
enet: icssg: Incorrect rxTxTotalByte in unicast test |
ENET |
07.03.00 |
AM65XX |
Low - network statistics, no functional impact |
None |
|
timesync: v2: TimeSync PTP restart is not supported |
ENET |
07.03.00 |
AM65XX |
Impacts only applications that require stack restart |
None |
|
DUT stopped forwarding frames in one direction |
ENET |
07.03.00 |
AM65XX |
Firmware doesn’t handle long burst of packets at line rate |
None |
2.9.9. Limitations¶
2.9.9.1. PDK¶
PDK examples do not supported SMP mode. Some of examples still support build in SMP mode but these binaries are not supported or validated.
2.9.9.2. ENET¶
ICSSG integration with NDK is done only for ICSSG Dual-MAC. Driver level support is available for Dual-MAC and Switch.
TimeSync PTP integration is done only for ICSSG-Dual MAC.
TimeSync is possible only in one MAC port at a time.
Different VLAN modes are not supported in Dual-MAC mode (within given ICSSG MAC ports). Both MACs should either be in VLAN aware or VLAN unaware mode.
Independent VLAN learning is not supported in Dual-MAC mode.