Detailed Description

Structure containing csitx module initialization arguments.

Data Fields
uint32_t	rxCompEnable

uint32_t	rxv1p3MapEnable

uint32_t	numDataLanes

uint32_t	lanePolarityCtrl [(CSITX_TX_DATA_LANES_MAX+CSITX_TX_CLK_LANES_MAX)]

uint32_t	enableFrameRepeat

Csitx_DPhyCfg	dphyCfg

uint32_t	eventGrpNum

Csitx_EventPrms	eventParams [CSITX_EVENT_GROUP_MAX]

Field Documentation

◆ rxCompEnable

uint32_t Csitx_InstCfg::rxCompEnable

Enable RX compatibility mode 0: Disable RX compatibility mode. 1: Enable RX compatibility mode.

◆ rxv1p3MapEnable

uint32_t Csitx_InstCfg::rxv1p3MapEnable

Enable TX controller to use pixel mappings for 8-bit data types which match that of the CSI-2 RX v1.3 Controller 0: Disable RX v1p3 mapping. 1: Enable RX v1p3 mapping.

◆ numDataLanes

uint32_t Csitx_InstCfg::numDataLanes

Number of data to be used for receiving data

◆ lanePolarityCtrl

uint32_t Csitx_InstCfg::lanePolarityCtrl[(CSITX_TX_DATA_LANES_MAX+CSITX_TX_CLK_LANES_MAX)]

Invert control for differential pair of DPHY 0: Default mapping. 1: Invert P and N pair of the differential signals. dlMap[0U]: Invert control for clock lane dlMap[1U]: Invert control for data lane 1 dlMap[2U]: Invert control for data lane 2 dlMap[3U]: Invert control for data lane 3 dlMap[4U]: Invert control for data lane 4 Note: This feature is currently not supported.

◆ enableFrameRepeat

uint32_t Csitx_InstCfg::enableFrameRepeat

Enable frame repeat control. 0: Disable Frame Repeat 1: Enable Frame Repeat Last frame is repeated (and will not be returned to the application) until new frame is queued for transmission. Enable this feature for remote device which expects frames at regular intervals like display.

◆ dphyCfg

Csitx_DPhyCfg Csitx_InstCfg::dphyCfg

CSITX D-PHY configurations.

◆ eventGrpNum

uint32_t Csitx_InstCfg::eventGrpNum

CSITX number of event groups to register

◆ eventParams

Csitx_EventPrms Csitx_InstCfg::eventParams[CSITX_EVENT_GROUP_MAX]

CSITX event configurations parameter.