MCUSW
Spi.h
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62 
116 /* Design : SPI_DesignId_001, SPI_DesignId_002, SPI_DesignId_005,
117  * SPI_DesignId_006, SPI_DesignId_024, SPI_DesignId_008 */
118 /*
119  * Below are the global requirements which are met by this SPI handler
120  * driver which can't be mapped to a particular source ID
121  */
122 /*
123  * Requirements : MCAL-1237, MCAL-1241, MCAL-1242, MCAL-1243,
124  * MCAL-1263, MCAL-1273, MCAL-1274, MCAL-1280,
125  * MCAL-1295, MCAL-1498, MCAL-1505, MCAL-1296,
126  * MCAL-1266, MCAL-1267, MCAL-1329, MCAL-1268
127  * MCAL-981, MCAL-4482, MCAL-4474
128  */
129 
130 /*
131  * Below are the SPI's module environment requirements which can't be mapped
132  * to this driver.
133  */
134 /* Design : SPI_DesignId_023 */
135 /*
136  * Requirements : MCAL-1446, MCAL-1456, MCAL-1461, MCAL-1238,
137  * MCAL-1429, MCAL-1501, MCAL-1479, MCAL-1271,
138  * MCAL-1270
139  */
140 
141 #ifndef SPI_H_
142 #define SPI_H_
143 
144 /* ========================================================================== */
145 /* Include Files */
146 /* ========================================================================== */
147 
148 #include "Std_Types.h"
149 #include "Spi_Cfg.h"
150 #include "Spi_Irq.h"
151 #include <ti/drv/udma/udma.h>
152 
153 #ifdef __cplusplus
154 extern "C"
155 {
156 #endif
157 
158 /* ========================================================================== */
159 /* Macros & Typedefs */
160 /* ========================================================================== */
161 
169 #define SPI_SW_MAJOR_VERSION (1U)
170 
171 #define SPI_SW_MINOR_VERSION (3U)
172 
173 #define SPI_SW_PATCH_VERSION (2U)
174 /* @} */
175 
183 #define SPI_AR_RELEASE_MAJOR_VERSION (4U)
184 
185 #define SPI_AR_RELEASE_MINOR_VERSION (3U)
186 
187 #define SPI_AR_RELEASE_REVISION_VERSION (1U)
188 /* @} */
189 
195 #define SPI_VENDOR_ID ((uint16) 44U)
196 
197 #define SPI_MODULE_ID ((uint16) 83U)
198 
199 #define SPI_INSTANCE_ID ((uint8) 0U)
200 /* @} */
201 
207 #define SPI_UNIT_MCU_MCSPI0 ((Spi_HWUnitType) CSIB0)
208 
209 #define SPI_UNIT_MCU_MCSPI1 ((Spi_HWUnitType) CSIB1)
210 
211 #define SPI_UNIT_MCU_MCSPI2 ((Spi_HWUnitType) CSIB2)
212 
213 #define SPI_UNIT_MCSPI0 ((Spi_HWUnitType) CSIB3)
214 
215 #define SPI_UNIT_MCSPI1 ((Spi_HWUnitType) CSIB4)
216 
217 #define SPI_UNIT_MCSPI2 ((Spi_HWUnitType) CSIB5)
218 
219 #define SPI_UNIT_MCSPI3 ((Spi_HWUnitType) CSIB6)
220 #if defined (SOC_J721E) || defined (SOC_J7200)
221 
222 #define SPI_UNIT_MCSPI4 ((Spi_HWUnitType) CSIB7)
223 
224 #define SPI_UNIT_MCSPI5 ((Spi_HWUnitType) CSIB8)
225 
226 #define SPI_UNIT_MCSPI6 ((Spi_HWUnitType) CSIB9)
227 
228 #define SPI_UNIT_MCSPI7 ((Spi_HWUnitType) CSIB10)
229 #endif
230 /* @} */
231 
236 #if defined (SOC_J721E) || defined (SOC_J7200)
237 #define SPI_HW_UNIT_CNT (11U)
238 #endif
239 
245 #define SPI_IB (0U)
246 
247 #define SPI_EB (1U)
248 
249 #define SPI_IB_EB (2U)
250 /* @} */
251 
252 
254 /* Requirements : MCAL-1363, MCAL-1364, MCAL-1365 */
255 typedef uint8 Spi_DataBufferType;
260 /* Requirements : MCAL-1366, MCAL-1367 */
261 typedef uint16 Spi_NumberOfDataType;
263 /* Requirements : MCAL-1368, MCAL-1369, MCAL-1370 */
264 typedef uint8 Spi_ChannelType;
266 /* Requirements : MCAL-1371, MCAL-1372, MCAL-1373 */
267 typedef uint16 Spi_JobType;
269 /* Requirements : MCAL-1374, MCAL-1375, MCAL-1376 */
270 typedef uint8 Spi_SequenceType;
275 /* Requirements : MCAL-1377, MCAL-1378, MCAL-1379 */
276 typedef uint8 Spi_HWUnitType;
277 
284 #ifndef SPI_E_PARAM_CHANNEL
285 
286 #define SPI_E_PARAM_CHANNEL ((uint8) 0x0AU)
287 #endif
288 #ifndef SPI_E_PARAM_JOB
289 
290 #define SPI_E_PARAM_JOB ((uint8) 0x0BU)
291 #endif
292 #ifndef SPI_E_PARAM_SEQ
293 
294 #define SPI_E_PARAM_SEQ ((uint8) 0x0CU)
295 #endif
296 #ifndef SPI_E_PARAM_LENGTH
297 
298 #define SPI_E_PARAM_LENGTH ((uint8) 0x0DU)
299 #endif
300 #ifndef SPI_E_PARAM_UNIT
301 
302 #define SPI_E_PARAM_UNIT ((uint8) 0x0EU)
303 #endif
304 #ifndef SPI_E_PARAM_POINTER
305 
306 #define SPI_E_PARAM_POINTER ((uint8) 0x10U)
307 #endif
308 #ifndef SPI_E_UNINIT
309 
310 #define SPI_E_UNINIT ((uint8) 0x1AU)
311 #endif
312 #ifndef SPI_E_SEQ_PENDING
313 
314 #define SPI_E_SEQ_PENDING ((uint8) 0x2AU)
315 #endif
316 #ifndef SPI_E_SEQ_IN_PROCESS
317 
318 #define SPI_E_SEQ_IN_PROCESS ((uint8) 0x3AU)
319 #endif
320 #ifndef SPI_E_ALREADY_INITIALIZED
321 
325 #define SPI_E_ALREADY_INITIALIZED ((uint8) 0x4AU)
326 #endif
327 #ifndef SPI_E_SEQUENCE_NOT_OK
328 
329 #define SPI_E_SEQUENCE_NOT_OK ((uint8) 0x5AU)
330 #endif
331 
332 /* @} */
333 
342 #define SPI_SID_INIT ((uint8) 0x00U)
343 
344 #define SPI_SID_DEINIT ((uint8) 0x01U)
345 
346 #define SPI_SID_WRITE_IB ((uint8) 0x02U)
347 
348 #define SPI_SID_ASYNC_TRANSMIT ((uint8) 0x03U)
349 
350 #define SPI_SID_READ_IB ((uint8) 0x04U)
351 
352 #define SPI_SID_SETUP_EB ((uint8) 0x05U)
353 
354 #define SPI_SID_GET_STATUS ((uint8) 0x06U)
355 
356 #define SPI_SID_GET_JOB_RESULT ((uint8) 0x07U)
357 
358 #define SPI_SID_GET_SEQ_RESULT ((uint8) 0x08U)
359 
360 #define SPI_SID_GET_VERSION_INFO ((uint8) 0x09U)
361 
362 #define SPI_SID_SYNC_TRANSMIT ((uint8) 0x0AU)
363 
364 #define SPI_SID_GET_HW_UNIT_STATUS ((uint8) 0x0BU)
365 
366 #define SPI_SID_CANCEL ((uint8) 0x0CU)
367 
368 #define SPI_SID_SET_ASYNC_MODE ((uint8) 0x0DU)
369 
370 #define SPI_SID_MAINFUNCTION_HANDLING ((uint8) 0x10U)
371 /* @} */
372 
379 /* Requirements : MCAL-1232 */
380 #define SPI_MCSPI_FCLK (48000000U)
381 
390 #define SPI_CFG_ID_0 (0x01U)
391 
393 #define SPI_CFG_ID_1 (0x02U)
394 
395 #define SPI_CFG_ID_2 (0x04U)
396 
397 #define SPI_CFG_ID_3 (0x08U)
398 
399 #define SPI_CFG_ID_4 (0x10U)
400 
401 #define SPI_CFG_ID_5 (0x20U)
402 /* @} */
403 
404 /* ========================================================================== */
405 /* Structures and Enums */
406 /* ========================================================================== */
407 
416 /* Requirements : MCAL-1340, MCAL-1341, MCAL-1344 */
417 typedef enum
418 {
421  SPI_IDLE = 1U,
423  SPI_BUSY = 2U
426 
431 typedef enum
432 {
433  CSIB0 = 0U,
447 #if defined (SOC_J721E) || defined (SOC_J7200)
456 #endif
458 
463 /* Requirements : MCAL-1350, MCAL-1351, MCAL-1353 */
464 typedef enum
465 {
477 
482 /* Requirements : MCAL-1355, MCAL-1357, MCAL-1359 */
483 typedef enum
484 {
495 
500 typedef enum
501 {
509 
514 /* Requirements : MCAL-1380, MCAL-1381, MCAL-1382, MCAL-1383,
515  * MCAL-1384, MCAL-1385, MCAL-1300 */
516 typedef enum
517 {
526 
530 typedef enum
531 {
532  SPI_MSB = 0U,
534  SPI_LSB = 1U
537 
541 typedef enum
542 {
543  SPI_LOW = STD_LOW,
547 } Spi_LevelType;
548 
552 typedef enum
553 {
554  SPI_CS0 = 0U,
562 } Spi_CsPinType;
563 
568 typedef enum
569 {
570  SPI_CLK_MODE_0 = 0x00U,
572  SPI_CLK_MODE_1 = 0x01U,
574  SPI_CLK_MODE_2 = 0x02U,
576  SPI_CLK_MODE_3 = 0x03U,
578 } Spi_ClkMode;
579 
592 typedef enum
593 {
598 } Spi_TxRxMode;
599 
603 /* Requirements : MCAL-1277 */
604 typedef enum
605 {
615 
619 typedef enum
620 {
626 
631 typedef enum
632 {
642 
646 typedef enum
647 {
653 
657 typedef enum
658 {
668 
676 typedef void (*Spi_CacheWbInv)(uint8 *BufPtr,
677  uint16 LenByte);
678 
686 typedef void (*Spi_CacheWb)(uint8 *BufPtr,
687  uint16 LenByte);
688 
696 typedef void (*Spi_CacheInv)(uint8 *BufPtr,
697  uint16 LenByte);
698 
702 /*
703  * Requirements : MCAL-1256, MCAL-1257, MCAL-1264, MCAL-1265,
704  * MCAL-1336
705  */
706 typedef struct
707 {
710  uint8 dataWidth;
729 
733 typedef struct
734 {
735  uint16 csEnable;
750  uint32 clkDivider;
770 
774 typedef struct
775 {
780 
784 /* Requirements : MCAL-1231, MCAL-1244
785  * MCAL-1248, MCAL-1249, MCAL-1276, MCAL-1337,
786  * MCAL-1339
787  */
788 typedef struct
789 {
794  Spi_JobEndNotifyType Spi_JobEndNotification;
802 
806 /* Requirements : MCAL-1251, MCAL-1338, MCAL-1286 */
807 typedef struct
808 {
811  Spi_SeqEndNotifyType Spi_SequenceEndNotification;
813  uint32 jobPerSeq;
819 
823 typedef struct
824 {
827  boolean enabledmaMode;
834 
838 /*
839  * Requirements : MCAL-1333, MCAL-1334, MCAL-1335, MCAL-1502,
840  * MCAL-1503
841  */
842 typedef struct Spi_ConfigType_s
843 {
844  uint8 maxChannels;
847  uint8 maxJobs;
850  uint8 maxSeq;
853  uint8 maxHwUnit;
859  uint32 udmaInstId;
882 
886 typedef struct Spi_ChannelConfigType_PC_s
887 {
891 
892 /* Requirements : MCAL-1245, MCAL-1246 */
896 typedef struct Spi_JobConfigType_PC_s
897 {
906 
910 typedef struct Spi_SeqConfigType_PC_s
911 {
915 
916 #if (STD_ON == SPI_REGISTER_READBACK_API)
917 
921 typedef struct
922 {
923  /*
924  * McSPI related registers
925  */
926  uint32 mcspiHlRev;
932  uint32 mcspiRev;
936  uint32 mcspiSyst;
939 #endif /* #if (STD_ON == SPI_REGISTER_READBACK_API) */
940 
941 /* @} */
942 /* @} */
943 /* ========================================================================== */
944 /* Function Declarations */
945 /* ========================================================================== */
946 
964 FUNC(void, SPI_CODE) Spi_Init(
965  P2CONST(Spi_ConfigType, AUTOMATIC, SPI_CONFIG_DATA) CfgPtr);
966 
987 FUNC(Std_ReturnType, SPI_CODE) Spi_DeInit(void);
988 
1006 FUNC(Spi_StatusType, SPI_CODE) Spi_GetStatus(void);
1007 
1027 FUNC(Spi_JobResultType, SPI_CODE) Spi_GetJobResult(Spi_JobType Job);
1028 
1051  Spi_SequenceType Sequence);
1052 
1053 #if (STD_ON == SPI_VERSION_INFO_API)
1054 
1074 FUNC(void, SPI_CODE) Spi_GetVersionInfo(
1075  P2VAR(Std_VersionInfoType, AUTOMATIC, SPI_APPL_DATA) versioninfo);
1076 #endif /* #if (STD_ON == SPI_VERSION_INFO_API) */
1077 
1078 #if (STD_ON == SPI_HW_STATUS_API)
1079 
1100 FUNC(Spi_StatusType, SPI_CODE) Spi_GetHWUnitStatus(Spi_HWUnitType HWUnit);
1101 #endif /* #if (STD_ON == SPI_HW_STATUS_API) */
1102 
1103 #if ((SPI_CHANNELBUFFERS == SPI_IB) || (SPI_CHANNELBUFFERS == SPI_IB_EB))
1104 
1132 FUNC(Std_ReturnType, SPI_CODE) Spi_WriteIB(
1133  Spi_ChannelType Channel,
1134  P2CONST(Spi_DataBufferType, AUTOMATIC, SPI_APPL_DATA) DataBufferPtr);
1135 
1161 FUNC(Std_ReturnType, SPI_CODE) Spi_ReadIB(
1162  Spi_ChannelType Channel,
1163  P2VAR(Spi_DataBufferType, AUTOMATIC, SPI_APPL_DATA) DataBufferPointer);
1164 #endif /* #if SPI_IB || SPI_IB_EB */
1165 
1166 #if ((SPI_CHANNELBUFFERS == SPI_EB) || (SPI_CHANNELBUFFERS == SPI_IB_EB))
1167 
1199 FUNC(Std_ReturnType, SPI_CODE) Spi_SetupEB(
1200  Spi_ChannelType Channel,
1201  P2CONST(Spi_DataBufferType, AUTOMATIC, SPI_APPL_DATA) SrcDataBufferPtr,
1202  P2VAR(Spi_DataBufferType, AUTOMATIC, SPI_APPL_DATA) DesDataBufferPtr,
1203  Spi_NumberOfDataType Length);
1204 #endif /* #if ((SPI_CHANNELBUFFERS == SPI_EB) || (SPI_CHANNELBUFFERS ==
1205  *SPI_IB_EB)) */
1206 
1207 #if ((SPI_SCALEABILITY == SPI_LEVEL_1) || (SPI_SCALEABILITY == \
1208  SPI_LEVEL_2))
1209 
1229 FUNC(Std_ReturnType, SPI_CODE) Spi_AsyncTransmit(Spi_SequenceType Sequence);
1230 #endif /* #if ((SPI_SCALEABILITY == SPI_LEVEL_1) ||
1231  *(SPI_SCALEABILITY == SPI_LEVEL_2)) */
1232 
1233 #if (STD_ON == SPI_CANCEL_API)
1234 
1252 FUNC(void, SPI_CODE) Spi_Cancel(Spi_SequenceType Sequence);
1253 #endif /* #if (STD_ON == SPI_CANCEL_API) */
1254 
1255 #if ((SPI_SCALEABILITY == SPI_LEVEL_0) || (SPI_SCALEABILITY == \
1256  SPI_LEVEL_2))
1257 
1277 FUNC(Std_ReturnType, SPI_CODE) Spi_SyncTransmit(Spi_SequenceType Sequence);
1278 #endif /* #if ((SPI_SCALEABILITY == SPI_LEVEL_0) ||
1279  *(SPI_SCALEABILITY == SPI_LEVEL_2)) */
1280 
1281 #if (SPI_SCALEABILITY == SPI_LEVEL_2)
1282 
1304 FUNC(Std_ReturnType, SPI_CODE) Spi_SetAsyncMode(Spi_AsyncModeType Mode);
1305 #endif /* #if (SPI_SCALEABILITY == SPI_LEVEL_2) */
1306 
1329 FUNC(void, SPI_CODE) Spi_MainFunction_Handling(void);
1330 
1331 #if (STD_ON == SPI_REGISTER_READBACK_API)
1332 
1361 FUNC(Std_ReturnType, SPI_CODE) Spi_RegisterReadback(
1362  Spi_HWUnitType HWUnit,
1363  P2VAR(Spi_RegisterReadbackType, AUTOMATIC, SPI_APPL_DATA) RegRbPtr);
1364 #endif /* #if (STD_ON == SPI_REGISTER_READBACK_API) */
1365 
1366 #ifdef __cplusplus
1367 }
1368 #endif
1369 
1370 #endif /* #ifndef SPI_H_ */
1371 
1372 /* @} */
Definition: Spi.h:534
SPI Sequence configuration structure.
Definition: Spi.h:807
uint8 Spi_SequenceType
Specifies the identification (ID) for a sequence of jobs.
Definition: Spi.h:270
Definition: Spi.h:659
Definition: Spi.h:594
Definition: Spi.h:441
Std_ReturnType Spi_RegisterReadback(Spi_HWUnitType HWUnit, Spi_RegisterReadbackType *RegRbPtr)
This function reads the important registers of the hardware unit and returns the value in the structu...
Spi_SeqEndNotifyType Spi_SequenceEndNotification
Definition: Spi.h:811
Std_ReturnType Spi_SyncTransmit(Spi_SequenceType Sequence)
Service to transmit data on the SPI bus.
Spi_SeqResultType Spi_GetSequenceResult(Spi_SequenceType Sequence)
This service returns the last transmission result of the specified Sequence.
#define SPI_MAX_JOBS
Maximum jobs across all sequence/hwunit.
Definition: Spi_Cfg.h:182
void(* Spi_CacheInv)(uint8 *BufPtr, uint16 LenByte)
Cache invalidate function.
Definition: Spi.h:696
Definition: Spi.h:433
Spi_JobPriorityType jobPriority
Definition: Spi.h:790
Definition: Spi.h:443
Definition: Spi.h:637
Spi_AsyncModeType
Specifies the asynchronous mechanism mode for SPI busses handled asynchronously in LEVEL 2.
Definition: Spi.h:516
Spi_DataLineTransmitType transmissionLineEnable
Definition: Spi.h:767
Definition: Spi.h:556
#define SPI_MAX_CHANNELS_PER_JOB
Maximum channels allowed per job.
Definition: Spi_Cfg.h:173
Definition: Spi.h:504
Spi_StatusType Spi_GetHWUnitStatus(Spi_HWUnitType HWUnit)
This service returns the status of the specified SPI Hardware microcontroller peripheral.
Spi_NumberOfDataType maxBufLength
Definition: Spi.h:715
This file contains ISR function declaration for SPI MCAL driver.
void(* Spi_CacheWb)(uint8 *BufPtr, uint16 LenByte)
Cache write-back function.
Definition: Spi.h:686
Std_ReturnType Spi_WriteIB(Spi_ChannelType Channel, const Spi_DataBufferType *DataBufferPtr)
Service for writing one or more data to an IB SPI Handler/Driver Channel specified by parameter.
uint8 externalDeviceCfgId
Definition: Spi.h:902
Spi_CacheWb cacheWb
Definition: Spi.h:867
Definition: Spi.h:663
void Spi_GetVersionInfo(Std_VersionInfoType *versioninfo)
This service returns the version information of this module.
Definition: Spi.h:439
Spi_JobResultType
This type defines a range of specific Jobs status for SPI Handler/Driver.
Definition: Spi.h:464
Spi_CsPinType
SPI Chip Select Pin.
Definition: Spi.h:552
Spi_TxRxMode
SPI TX/RX Mode.
Definition: Spi.h:592
uint8 Spi_HWUnitType
Specifies the identification (ID) for a SPI Hardware micro controller peripheral (unit)
Definition: Spi.h:276
#define SPI_MAX_HW_UNIT
Maximum HW unit - This should match the sum for the below units ISR which are ON.
Definition: Spi_Cfg.h:191
Definition: Spi.h:450
boolean enabledmaMode
Definition: Spi.h:827
Spi_DataDelayType
Spi_DataDelayType defines the number of interface clock cycles between CS toggling and first or last ...
Definition: Spi.h:631
Definition: Spi.h:665
Std_ReturnType Spi_SetAsyncMode(Spi_AsyncModeType Mode)
Service to set the asynchronous mechanism mode for SPI busses handled asynchronously.
Spi_HWUnitType hwUnitId
Definition: Spi.h:825
Definition: Spi.h:487
uint16 Spi_NumberOfDataType
Type for defining the number of data elements of the type Spi_DataBufferType to send and / or receive...
Definition: Spi.h:261
Definition: Spi.h:574
Definition: Spi.h:545
Definition: Spi.h:606
uint8 Spi_DataBufferType
Type of application data buffer elements.
Definition: Spi.h:255
SPI channel config structure parameters Pre-Compile only.
Definition: Spi.h:886
Definition: Spi.h:445
uint32 clkDivider
Definition: Spi.h:750
uint32 defaultTxData
Definition: Spi.h:713
#define SPI_MAX_JOBS_PER_SEQ
Maximum jobs allowed per sequence.
Definition: Spi_Cfg.h:176
uint32 udmaInstId
Definition: Spi.h:859
Definition: Spi.h:576
Definition: Spi.h:648
Definition: Spi.h:558
Spi_CsModeType
SPI Chip Select Mode.
Definition: Spi.h:619
uint16 Spi_JobType
Specifies the identification (ID) for a Job.
Definition: Spi.h:267
Spi_SeqResultType
This type defines a range of specific Sequences status for SPI Handler/Driver.
Definition: Spi.h:483
Spi_HwUnitResultType
This type defines a range of specific HW unit status for SPI Handler/Driver.
Definition: Spi.h:500
#define SPI_MAX_CHANNELS
Maximum channels across all jobs/sequence/hwunit.
Definition: Spi_Cfg.h:179
SPI job config structure parameters Pre-Compile only.
Definition: Spi.h:896
SPI sequence config structure parameters Pre-Compile only.
Definition: Spi.h:910
Definition: Spi.h:661
Spi_TransferType transferType
Definition: Spi.h:725
uint32 mcspiRev
Definition: Spi.h:932
Definition: Spi.h:543
uint16 startBitEnable
Definition: Spi.h:760
uint32 mcspiHlSysConfig
Definition: Spi.h:930
SPI Hardware unit configuration structure.
Definition: Spi.h:823
Definition: Spi.h:419
Spi_CacheWbInv cacheWbInv
Definition: Spi.h:865
Definition: Spi.h:468
uint8 dataWidth
Definition: Spi.h:710
Definition: Spi.h:554
Spi_ChannelType channelId
Definition: Spi.h:888
Definition: Spi.h:423
Spi_StatusType Spi_GetStatus(void)
Service returns the SPI Handler/Driver software module status.
Spi_CsModeType csMode
Definition: Spi.h:737
Definition: Spi.h:639
Definition: Spi.h:633
uint32 dmaTxChIntrNum
Definition: Spi.h:829
Spi_ClkMode clkMode
Definition: Spi.h:756
void(* Spi_CacheWbInv)(uint8 *BufPtr, uint16 LenByte)
Cache write-back invalidate function.
Definition: Spi.h:676
uint8 maxExtDevCfg
Definition: Spi.h:856
Spi_LevelType csPolarity
Definition: Spi.h:740
Definition: Spi.h:570
Spi_DataLineReceiveType receptionLineEnable
Definition: Spi.h:765
This file contains generated pre compile configuration file for SPI MCAL driver.
#define SPI_MAX_EXT_DEV
Maximum external device cfg.
Definition: Spi_Cfg.h:196
Definition: Spi.h:612
Spi_DataDelayType csIdleTime
Definition: Spi.h:742
Spi_McspiExternalDeviceConfigType mcspi
Definition: Spi.h:776
Definition: Spi.h:473
Definition: Spi.h:623
Std_ReturnType Spi_DeInit(void)
Service for SPI de-initialization.
void Spi_Init(const Spi_ConfigType *CfgPtr)
Service for SPI initialization.
uint8 maxSeq
Definition: Spi.h:850
Definition: Spi.h:502
Spi_LevelType startBitLevel
Definition: Spi.h:763
void Spi_Cancel(Spi_SequenceType Sequence)
Service cancels the specified on-going sequence transmission.
Definition: Spi.h:532
uint8 maxHwUnit
Definition: Spi.h:853
#define SPI_MAX_SEQ
Maximum sequence across all hwunit.
Definition: Spi_Cfg.h:185
Spi_CacheInv cacheInv
Definition: Spi.h:869
Spi_StatusType
This type defines a range of specific status for SPI Handler/Driver.
Definition: Spi.h:417
uint32 channelPerJob
Definition: Spi.h:796
Definition: Spi.h:596
Definition: Spi.h:448
Definition: Spi.h:454
Definition: Spi.h:492
Definition: Spi.h:621
uint8 seqInterruptible
Definition: Spi.h:809
SPI register readback structure.
Definition: Spi.h:921
uint32 jobPerSeq
Definition: Spi.h:813
Definition: Spi.h:421
Spi_ClkMode
SPI Clock Mode - sets the clock polarity and phase. Note: These values are a direct register mapping....
Definition: Spi.h:568
Definition: Spi.h:485
Definition: Spi.h:635
Definition: Spi.h:572
uint32 mcspiHlRev
Definition: Spi.h:926
Spi_HWUnitType hwUnitId
Definition: Spi.h:792
uint32 mcspiSyst
Definition: Spi.h:936
Spi_TxRxMode txRxMode
Definition: Spi.h:758
SPI external device specific configuration structure .
Definition: Spi.h:774
Definition: Spi.h:506
uint32 dmaRxChIntrNum
Definition: Spi.h:831
uint8 maxChannels
Definition: Spi.h:844
Definition: Spi.h:490
SPI Job configuration structure specific to McSPI peripheral.
Definition: Spi.h:733
Std_ReturnType Spi_ReadIB(Spi_ChannelType Channel, Spi_DataBufferType *DataBufferPointer)
Service for reading synchronously one or more data from an IB SPI Handler/Driver Channel specified by...
Definition: Spi.h:466
Definition: Spi.h:610
Spi_JobType jobId
Definition: Spi.h:898
Definition: Spi.h:560
SPI Job configuration structure.
Definition: Spi.h:788
Spi_HwUnitType
This type defines a range of HW SPI Hardware microcontroller peripheral allocated to this Job.
Definition: Spi.h:431
Definition: Spi.h:650
Definition: Spi.h:435
Definition: Spi.h:521
Spi_LevelType
Type for SPI Chip Select Polarity and Clock Idle Level.
Definition: Spi.h:541
Spi_JobEndNotifyType Spi_JobEndNotification
Definition: Spi.h:794
Spi_DataLineTransmitType
Spi_DataLineTransmitType defines the lines selected for transmission.
Definition: Spi.h:657
Definition: Spi.h:471
uint32 mcspiSysStatus
Definition: Spi.h:934
Definition: Spi.h:452
Spi_CsPinType csPin
Definition: Spi.h:900
Definition: Spi.h:437
uint32 mcspiHlHwInfo
Definition: Spi.h:928
Spi_JobPriorityType
SPI Job Priority.
Definition: Spi.h:604
Spi_DataLineReceiveType
Spi_DataLineReceiveType defines the lines selected for reception.
Definition: Spi.h:646
uint8 Spi_ChannelType
Specifies the identification (ID) for a Channel.
Definition: Spi.h:264
void Spi_MainFunction_Handling(void)
This function polls the SPI interrupts linked to HW Units allocated to the transmission of SPI sequen...
SPI Channel configuration structure.
Definition: Spi.h:706
Spi_SequenceType seqId
Definition: Spi.h:912
Std_ReturnType Spi_AsyncTransmit(Spi_SequenceType Sequence)
Service to transmit data on the SPI bus.
uint8 channelBufType
Definition: Spi.h:708
Definition: Spi.h:518
Definition: Spi.h:608
uint16 csEnable
Definition: Spi.h:735
Spi_TransferType
Word transfer order - MSB first or LSB first.
Definition: Spi.h:530
Spi_JobResultType Spi_GetJobResult(Spi_JobType Job)
This service returns the last transmission result of the specified Job.
SPI config structure.
Definition: Spi.h:842
uint8 maxJobs
Definition: Spi.h:847