148 #include "Std_Types.h" 151 #include <ti/drv/udma/udma.h> 169 #define SPI_SW_MAJOR_VERSION (1U) 171 #define SPI_SW_MINOR_VERSION (3U) 173 #define SPI_SW_PATCH_VERSION (2U) 183 #define SPI_AR_RELEASE_MAJOR_VERSION (4U) 185 #define SPI_AR_RELEASE_MINOR_VERSION (3U) 187 #define SPI_AR_RELEASE_REVISION_VERSION (1U) 195 #define SPI_VENDOR_ID ((uint16) 44U) 197 #define SPI_MODULE_ID ((uint16) 83U) 199 #define SPI_INSTANCE_ID ((uint8) 0U) 207 #define SPI_UNIT_MCU_MCSPI0 ((Spi_HWUnitType) CSIB0) 209 #define SPI_UNIT_MCU_MCSPI1 ((Spi_HWUnitType) CSIB1) 211 #define SPI_UNIT_MCU_MCSPI2 ((Spi_HWUnitType) CSIB2) 213 #define SPI_UNIT_MCSPI0 ((Spi_HWUnitType) CSIB3) 215 #define SPI_UNIT_MCSPI1 ((Spi_HWUnitType) CSIB4) 217 #define SPI_UNIT_MCSPI2 ((Spi_HWUnitType) CSIB5) 219 #define SPI_UNIT_MCSPI3 ((Spi_HWUnitType) CSIB6) 220 #if defined (SOC_J721E) || defined (SOC_J7200) 222 #define SPI_UNIT_MCSPI4 ((Spi_HWUnitType) CSIB7) 224 #define SPI_UNIT_MCSPI5 ((Spi_HWUnitType) CSIB8) 226 #define SPI_UNIT_MCSPI6 ((Spi_HWUnitType) CSIB9) 228 #define SPI_UNIT_MCSPI7 ((Spi_HWUnitType) CSIB10) 236 #if defined (SOC_J721E) || defined (SOC_J7200) 237 #define SPI_HW_UNIT_CNT (11U) 249 #define SPI_IB_EB (2U) 284 #ifndef SPI_E_PARAM_CHANNEL 286 #define SPI_E_PARAM_CHANNEL ((uint8) 0x0AU) 288 #ifndef SPI_E_PARAM_JOB 290 #define SPI_E_PARAM_JOB ((uint8) 0x0BU) 292 #ifndef SPI_E_PARAM_SEQ 294 #define SPI_E_PARAM_SEQ ((uint8) 0x0CU) 296 #ifndef SPI_E_PARAM_LENGTH 298 #define SPI_E_PARAM_LENGTH ((uint8) 0x0DU) 300 #ifndef SPI_E_PARAM_UNIT 302 #define SPI_E_PARAM_UNIT ((uint8) 0x0EU) 304 #ifndef SPI_E_PARAM_POINTER 306 #define SPI_E_PARAM_POINTER ((uint8) 0x10U) 310 #define SPI_E_UNINIT ((uint8) 0x1AU) 312 #ifndef SPI_E_SEQ_PENDING 314 #define SPI_E_SEQ_PENDING ((uint8) 0x2AU) 316 #ifndef SPI_E_SEQ_IN_PROCESS 318 #define SPI_E_SEQ_IN_PROCESS ((uint8) 0x3AU) 320 #ifndef SPI_E_ALREADY_INITIALIZED 325 #define SPI_E_ALREADY_INITIALIZED ((uint8) 0x4AU) 327 #ifndef SPI_E_SEQUENCE_NOT_OK 329 #define SPI_E_SEQUENCE_NOT_OK ((uint8) 0x5AU) 342 #define SPI_SID_INIT ((uint8) 0x00U) 344 #define SPI_SID_DEINIT ((uint8) 0x01U) 346 #define SPI_SID_WRITE_IB ((uint8) 0x02U) 348 #define SPI_SID_ASYNC_TRANSMIT ((uint8) 0x03U) 350 #define SPI_SID_READ_IB ((uint8) 0x04U) 352 #define SPI_SID_SETUP_EB ((uint8) 0x05U) 354 #define SPI_SID_GET_STATUS ((uint8) 0x06U) 356 #define SPI_SID_GET_JOB_RESULT ((uint8) 0x07U) 358 #define SPI_SID_GET_SEQ_RESULT ((uint8) 0x08U) 360 #define SPI_SID_GET_VERSION_INFO ((uint8) 0x09U) 362 #define SPI_SID_SYNC_TRANSMIT ((uint8) 0x0AU) 364 #define SPI_SID_GET_HW_UNIT_STATUS ((uint8) 0x0BU) 366 #define SPI_SID_CANCEL ((uint8) 0x0CU) 368 #define SPI_SID_SET_ASYNC_MODE ((uint8) 0x0DU) 370 #define SPI_SID_MAINFUNCTION_HANDLING ((uint8) 0x10U) 380 #define SPI_MCSPI_FCLK (48000000U) 390 #define SPI_CFG_ID_0 (0x01U) 393 #define SPI_CFG_ID_1 (0x02U) 395 #define SPI_CFG_ID_2 (0x04U) 397 #define SPI_CFG_ID_3 (0x08U) 399 #define SPI_CFG_ID_4 (0x10U) 401 #define SPI_CFG_ID_5 (0x20U) 447 #if defined (SOC_J721E) || defined (SOC_J7200) 842 typedef struct Spi_ConfigType_s
886 typedef struct Spi_ChannelConfigType_PC_s
896 typedef struct Spi_JobConfigType_PC_s
910 typedef struct Spi_SeqConfigType_PC_s
916 #if (STD_ON == SPI_REGISTER_READBACK_API) 987 FUNC(Std_ReturnType, SPI_CODE)
Spi_DeInit(
void);
1053 #if (STD_ON == SPI_VERSION_INFO_API) 1075 P2VAR(Std_VersionInfoType, AUTOMATIC, SPI_APPL_DATA) versioninfo);
1078 #if (STD_ON == SPI_HW_STATUS_API) 1103 #if ((SPI_CHANNELBUFFERS == SPI_IB) || (SPI_CHANNELBUFFERS == SPI_IB_EB)) 1166 #if ((SPI_CHANNELBUFFERS == SPI_EB) || (SPI_CHANNELBUFFERS == SPI_IB_EB)) 1199 FUNC(Std_ReturnType, SPI_CODE) Spi_SetupEB(
1207 #if ((SPI_SCALEABILITY == SPI_LEVEL_1) || (SPI_SCALEABILITY == \ 1233 #if (STD_ON == SPI_CANCEL_API) 1255 #if ((SPI_SCALEABILITY == SPI_LEVEL_0) || (SPI_SCALEABILITY == \ 1281 #if (SPI_SCALEABILITY == SPI_LEVEL_2) 1331 #if (STD_ON == SPI_REGISTER_READBACK_API)
SPI Sequence configuration structure.
Definition: Spi.h:807
uint8 Spi_SequenceType
Specifies the identification (ID) for a sequence of jobs.
Definition: Spi.h:270
Std_ReturnType Spi_RegisterReadback(Spi_HWUnitType HWUnit, Spi_RegisterReadbackType *RegRbPtr)
This function reads the important registers of the hardware unit and returns the value in the structu...
Spi_SeqEndNotifyType Spi_SequenceEndNotification
Definition: Spi.h:811
Std_ReturnType Spi_SyncTransmit(Spi_SequenceType Sequence)
Service to transmit data on the SPI bus.
Spi_SeqResultType Spi_GetSequenceResult(Spi_SequenceType Sequence)
This service returns the last transmission result of the specified Sequence.
#define SPI_MAX_JOBS
Maximum jobs across all sequence/hwunit.
Definition: Spi_Cfg.h:182
void(* Spi_CacheInv)(uint8 *BufPtr, uint16 LenByte)
Cache invalidate function.
Definition: Spi.h:696
Spi_JobPriorityType jobPriority
Definition: Spi.h:790
Spi_AsyncModeType
Specifies the asynchronous mechanism mode for SPI busses handled asynchronously in LEVEL 2.
Definition: Spi.h:516
Spi_DataLineTransmitType transmissionLineEnable
Definition: Spi.h:767
#define SPI_MAX_CHANNELS_PER_JOB
Maximum channels allowed per job.
Definition: Spi_Cfg.h:173
Spi_StatusType Spi_GetHWUnitStatus(Spi_HWUnitType HWUnit)
This service returns the status of the specified SPI Hardware microcontroller peripheral.
Spi_NumberOfDataType maxBufLength
Definition: Spi.h:715
This file contains ISR function declaration for SPI MCAL driver.
void(* Spi_CacheWb)(uint8 *BufPtr, uint16 LenByte)
Cache write-back function.
Definition: Spi.h:686
Std_ReturnType Spi_WriteIB(Spi_ChannelType Channel, const Spi_DataBufferType *DataBufferPtr)
Service for writing one or more data to an IB SPI Handler/Driver Channel specified by parameter.
uint8 externalDeviceCfgId
Definition: Spi.h:902
Spi_CacheWb cacheWb
Definition: Spi.h:867
void Spi_GetVersionInfo(Std_VersionInfoType *versioninfo)
This service returns the version information of this module.
Spi_JobResultType
This type defines a range of specific Jobs status for SPI Handler/Driver.
Definition: Spi.h:464
Spi_CsPinType
SPI Chip Select Pin.
Definition: Spi.h:552
Spi_TxRxMode
SPI TX/RX Mode.
Definition: Spi.h:592
uint8 Spi_HWUnitType
Specifies the identification (ID) for a SPI Hardware micro controller peripheral (unit)
Definition: Spi.h:276
#define SPI_MAX_HW_UNIT
Maximum HW unit - This should match the sum for the below units ISR which are ON.
Definition: Spi_Cfg.h:191
boolean enabledmaMode
Definition: Spi.h:827
Spi_DataDelayType
Spi_DataDelayType defines the number of interface clock cycles between CS toggling and first or last ...
Definition: Spi.h:631
Std_ReturnType Spi_SetAsyncMode(Spi_AsyncModeType Mode)
Service to set the asynchronous mechanism mode for SPI busses handled asynchronously.
Spi_HWUnitType hwUnitId
Definition: Spi.h:825
uint16 Spi_NumberOfDataType
Type for defining the number of data elements of the type Spi_DataBufferType to send and / or receive...
Definition: Spi.h:261
uint8 Spi_DataBufferType
Type of application data buffer elements.
Definition: Spi.h:255
SPI channel config structure parameters Pre-Compile only.
Definition: Spi.h:886
uint32 clkDivider
Definition: Spi.h:750
uint32 defaultTxData
Definition: Spi.h:713
#define SPI_MAX_JOBS_PER_SEQ
Maximum jobs allowed per sequence.
Definition: Spi_Cfg.h:176
uint32 udmaInstId
Definition: Spi.h:859
Spi_CsModeType
SPI Chip Select Mode.
Definition: Spi.h:619
uint16 Spi_JobType
Specifies the identification (ID) for a Job.
Definition: Spi.h:267
Spi_SeqResultType
This type defines a range of specific Sequences status for SPI Handler/Driver.
Definition: Spi.h:483
Spi_HwUnitResultType
This type defines a range of specific HW unit status for SPI Handler/Driver.
Definition: Spi.h:500
#define SPI_MAX_CHANNELS
Maximum channels across all jobs/sequence/hwunit.
Definition: Spi_Cfg.h:179
SPI job config structure parameters Pre-Compile only.
Definition: Spi.h:896
SPI sequence config structure parameters Pre-Compile only.
Definition: Spi.h:910
Spi_TransferType transferType
Definition: Spi.h:725
uint32 mcspiRev
Definition: Spi.h:932
uint16 startBitEnable
Definition: Spi.h:760
uint32 mcspiHlSysConfig
Definition: Spi.h:930
SPI Hardware unit configuration structure.
Definition: Spi.h:823
Spi_CacheWbInv cacheWbInv
Definition: Spi.h:865
uint8 dataWidth
Definition: Spi.h:710
Spi_ChannelType channelId
Definition: Spi.h:888
Spi_StatusType Spi_GetStatus(void)
Service returns the SPI Handler/Driver software module status.
Spi_CsModeType csMode
Definition: Spi.h:737
uint32 dmaTxChIntrNum
Definition: Spi.h:829
Spi_ClkMode clkMode
Definition: Spi.h:756
void(* Spi_CacheWbInv)(uint8 *BufPtr, uint16 LenByte)
Cache write-back invalidate function.
Definition: Spi.h:676
uint8 maxExtDevCfg
Definition: Spi.h:856
Spi_LevelType csPolarity
Definition: Spi.h:740
Spi_DataLineReceiveType receptionLineEnable
Definition: Spi.h:765
This file contains generated pre compile configuration file for SPI MCAL driver.
#define SPI_MAX_EXT_DEV
Maximum external device cfg.
Definition: Spi_Cfg.h:196
Spi_DataDelayType csIdleTime
Definition: Spi.h:742
Spi_McspiExternalDeviceConfigType mcspi
Definition: Spi.h:776
Std_ReturnType Spi_DeInit(void)
Service for SPI de-initialization.
void Spi_Init(const Spi_ConfigType *CfgPtr)
Service for SPI initialization.
uint8 maxSeq
Definition: Spi.h:850
Spi_LevelType startBitLevel
Definition: Spi.h:763
void Spi_Cancel(Spi_SequenceType Sequence)
Service cancels the specified on-going sequence transmission.
uint8 maxHwUnit
Definition: Spi.h:853
#define SPI_MAX_SEQ
Maximum sequence across all hwunit.
Definition: Spi_Cfg.h:185
Spi_CacheInv cacheInv
Definition: Spi.h:869
Spi_StatusType
This type defines a range of specific status for SPI Handler/Driver.
Definition: Spi.h:417
uint32 channelPerJob
Definition: Spi.h:796
uint8 seqInterruptible
Definition: Spi.h:809
SPI register readback structure.
Definition: Spi.h:921
uint32 jobPerSeq
Definition: Spi.h:813
Spi_ClkMode
SPI Clock Mode - sets the clock polarity and phase. Note: These values are a direct register mapping....
Definition: Spi.h:568
uint32 mcspiHlRev
Definition: Spi.h:926
Spi_HWUnitType hwUnitId
Definition: Spi.h:792
uint32 mcspiSyst
Definition: Spi.h:936
Spi_TxRxMode txRxMode
Definition: Spi.h:758
SPI external device specific configuration structure .
Definition: Spi.h:774
uint32 dmaRxChIntrNum
Definition: Spi.h:831
uint8 maxChannels
Definition: Spi.h:844
SPI Job configuration structure specific to McSPI peripheral.
Definition: Spi.h:733
Std_ReturnType Spi_ReadIB(Spi_ChannelType Channel, Spi_DataBufferType *DataBufferPointer)
Service for reading synchronously one or more data from an IB SPI Handler/Driver Channel specified by...
Spi_JobType jobId
Definition: Spi.h:898
SPI Job configuration structure.
Definition: Spi.h:788
Spi_HwUnitType
This type defines a range of HW SPI Hardware microcontroller peripheral allocated to this Job.
Definition: Spi.h:431
Spi_LevelType
Type for SPI Chip Select Polarity and Clock Idle Level.
Definition: Spi.h:541
Spi_JobEndNotifyType Spi_JobEndNotification
Definition: Spi.h:794
Spi_DataLineTransmitType
Spi_DataLineTransmitType defines the lines selected for transmission.
Definition: Spi.h:657
uint32 mcspiSysStatus
Definition: Spi.h:934
Spi_CsPinType csPin
Definition: Spi.h:900
uint32 mcspiHlHwInfo
Definition: Spi.h:928
Spi_JobPriorityType
SPI Job Priority.
Definition: Spi.h:604
Spi_DataLineReceiveType
Spi_DataLineReceiveType defines the lines selected for reception.
Definition: Spi.h:646
uint8 Spi_ChannelType
Specifies the identification (ID) for a Channel.
Definition: Spi.h:264
void Spi_MainFunction_Handling(void)
This function polls the SPI interrupts linked to HW Units allocated to the transmission of SPI sequen...
SPI Channel configuration structure.
Definition: Spi.h:706
Spi_SequenceType seqId
Definition: Spi.h:912
Std_ReturnType Spi_AsyncTransmit(Spi_SequenceType Sequence)
Service to transmit data on the SPI bus.
uint8 channelBufType
Definition: Spi.h:708
uint16 csEnable
Definition: Spi.h:735
Spi_TransferType
Word transfer order - MSB first or LSB first.
Definition: Spi.h:530
Spi_JobResultType Spi_GetJobResult(Spi_JobType Job)
This service returns the last transmission result of the specified Job.
SPI config structure.
Definition: Spi.h:842
uint8 maxJobs
Definition: Spi.h:847