PDK API Guide for J721E
Udma_RmInitPrms Struct Reference

Detailed Description

UDMA resource manager init parameters.

This assumes contiguos allocation of 'N' resources from a start offset to keep the interface simple.

Note: This is applicable for the driver handle as given during init call. The init call doesn't (can't rather) check for resource overlap across handles and across cores. It is the callers responsibility to ensure that resources overlaps are not present.

Data Fields

uint32_t startBlkCopyUhcCh
 
uint32_t numBlkCopyUhcCh
 
uint32_t startBlkCopyHcCh
 
uint32_t numBlkCopyHcCh
 
uint32_t startBlkCopyCh
 
uint32_t numBlkCopyCh
 
uint32_t startTxUhcCh
 
uint32_t numTxUhcCh
 
uint32_t startTxHcCh
 
uint32_t numTxHcCh
 
uint32_t startTxCh
 
uint32_t numTxCh
 
uint32_t startRxUhcCh
 
uint32_t numRxUhcCh
 
uint32_t startRxHcCh
 
uint32_t numRxHcCh
 
uint32_t startRxCh
 
uint32_t numRxCh
 
uint32_t startFreeFlow
 
uint32_t numFreeFlow
 
uint32_t startFreeRing
 
uint32_t numFreeRing
 
uint32_t startGlobalEvent
 
uint32_t numGlobalEvent
 
uint32_t startVintr
 
uint32_t numVintr
 
uint32_t startIrIntr
 
uint32_t numIrIntr
 
uint32_t proxyThreadNum
 
uint32_t startC7xCoreIntr
 
uint32_t startProxy
 
uint32_t numProxy
 
uint32_t startRingMon
 
uint32_t numRingMon
 

Field Documentation

uint32_t Udma_RmInitPrms::startBlkCopyUhcCh

Start ultra high capacity block copy channel from which this UDMA driver instance manages

uint32_t Udma_RmInitPrms::numBlkCopyUhcCh

Number of ultra high capacity block copy channel to be managed. Note: This cannot exceed UDMA_RM_MAX_BLK_COPY_UHC_CH

uint32_t Udma_RmInitPrms::startBlkCopyHcCh

Start high capacity block copy channel from which this UDMA driver instance manages

uint32_t Udma_RmInitPrms::numBlkCopyHcCh

Number of ultra high capacity block copy channel to be managed. Note: This cannot exceed UDMA_RM_MAX_BLK_COPY_HC_CH

uint32_t Udma_RmInitPrms::startBlkCopyCh

Start Block copy channel from which this UDMA driver instance manages

uint32_t Udma_RmInitPrms::numBlkCopyCh

Number of Block copy channel to be managed. Note: This cannot exceed UDMA_RM_MAX_BLK_COPY_CH

uint32_t Udma_RmInitPrms::startTxUhcCh

Start ultra high capacity TX channel from which this UDMA driver instance manages

uint32_t Udma_RmInitPrms::numTxUhcCh

Number of ultra high capacity TX channel to be managed. Note: This cannot exceed UDMA_RM_MAX_TX_UHC_CH

uint32_t Udma_RmInitPrms::startTxHcCh

Start high capacity TX channel from which this UDMA driver instance manages

uint32_t Udma_RmInitPrms::numTxHcCh

Number of high capacity TX channel to be managed. Note: This cannot exceed UDMA_RM_MAX_TX_HC_CH

uint32_t Udma_RmInitPrms::startTxCh

Start TX channel from which this UDMA driver instance manages

uint32_t Udma_RmInitPrms::numTxCh

Number of TX channel to be managed. Note: This cannot exceed UDMA_RM_MAX_TX_CH

uint32_t Udma_RmInitPrms::startRxUhcCh

Start ultra high capacity RX channel from which this UDMA driver instance manages

uint32_t Udma_RmInitPrms::numRxUhcCh

Number of high capacity RX channel to be managed. Note: This cannot exceed UDMA_RM_MAX_RX_UHC_CH

uint32_t Udma_RmInitPrms::startRxHcCh

Start high capacity RX channel from which this UDMA driver instance manages

uint32_t Udma_RmInitPrms::numRxHcCh

Number of high capacity RX channel to be managed. Note: This cannot exceed UDMA_RM_MAX_RX_HC_CH

uint32_t Udma_RmInitPrms::startRxCh

Start RX channel from which this UDMA driver instance manages

uint32_t Udma_RmInitPrms::numRxCh

Number of RX channel to be managed. Note: This cannot exceed UDMA_RM_MAX_RX_CH

uint32_t Udma_RmInitPrms::startFreeFlow

Start free flow from which this UDMA driver instance manages

uint32_t Udma_RmInitPrms::numFreeFlow

Number of free flow to be managed. Note: This cannot exceed UDMA_RM_MAX_FREE_FLOW

uint32_t Udma_RmInitPrms::startFreeRing

Start free ring from which this UDMA driver instance manages

uint32_t Udma_RmInitPrms::numFreeRing

Number of free ring to be managed. Note: This cannot exceed UDMA_RM_MAX_FREE_RING

uint32_t Udma_RmInitPrms::startGlobalEvent

Start global event from which this UDMA driver instance manages

uint32_t Udma_RmInitPrms::numGlobalEvent

Number of global event to be managed. Note: This cannot exceed UDMA_RM_MAX_GLOBAL_EVENT

uint32_t Udma_RmInitPrms::startVintr

Start VINT number from which this UDMA driver instance manages

uint32_t Udma_RmInitPrms::numVintr

Number of VINT to be managed. Note: This cannot exceed UDMA_RM_MAX_VINTR

uint32_t Udma_RmInitPrms::startIrIntr

Start core interrupt from which this UDMA driver instance manages.

Note: Incase of C7x, this represents the GIC SPI events to the CLEC. For routing this event, the driver further uses the startC7xCoreIntr parameter as the start C7x interrupt and assumes that numIrIntr C7x interrupt are used by UDMA driver for one to one mapping. The UDMA driver directly programs the CLEC for this routing

Example: startIrIntr = 700, numIrIntr = 3, startC7xCoreIntr = 32

First Event registration: CLEC input : 700+1024-32 CLEC output : 32 OSAL registration : 32

Second Event registration: CLEC input : 701+1024-32 CLEC output : 33 OSAL registration : 33

uint32_t Udma_RmInitPrms::numIrIntr

Number of core interrupts to be managed. Note: This cannot exceed UDMA_RM_MAX_CORE_INTR

uint32_t Udma_RmInitPrms::proxyThreadNum

Proxy thread to push/pop to ring in proxy mode. By default driver will initialize to a default value based on core and NAVSS instance. User can override this based on need. The default proxy allocation starts from UDMA_DEFAULT_RM_PROXY_THREAD_START and will allocate 1 per core. So total allocation will be from UDMA_DEFAULT_RM_PROXY_THREAD_START to (UDMA_DEFAULT_RM_PROXY_THREAD_START + num cores) in an SOC.

The proxy thread number should be allocated within a NAVSS instance as a proxy can access ring only within the same NAVSS instance. The driver assumes the right proxy instance to use based on the instance ID (instId) provided in Udma_init API

Also this should be set a unique number across core and NAVSS instance. Care should be taken not to use the same proxy across the system.

Warning: When using multiple UDMA handle for the same NAVSS instance within a core, care should taken to provide a unique proxy number per handle. Otherwise the the driver handle will use the same proxy for ring operation and will result in unintended behaviour and corruption of ring memory/operation.

uint32_t Udma_RmInitPrms::startC7xCoreIntr

Start C7x core interrupt from which this UDMA driver instance manages. This assumes numIrIntr contiguous interrupts from this offset is reserved for the UDMA driver. This is NA for other cores and could be set to 0.

uint32_t Udma_RmInitPrms::startProxy

Start proxy from which this UDMA driver instance manages. Note this should not overlap with proxyThreadNum

uint32_t Udma_RmInitPrms::numProxy

Number of proxy to be managed. Note: This cannot exceed UDMA_RM_MAX_PROXY

uint32_t Udma_RmInitPrms::startRingMon

Start monitor from which this UDMA driver instance manages

uint32_t Udma_RmInitPrms::numRingMon

Number of monitors to be managed. Note: This cannot exceed UDMA_RM_MAX_RING_MON