3.2.2.10.3.1. CPSW2g Ethernet

3.2.2.10.3.1.1. Introduction

The TI J721E SoC has integrated two-port Gigabit Ethernet Switch subsystem with selectable RGMII and RMII interfaces and an internal Communications Port Programming Interface (CPPI) port (Host port 0). Host Port 0 CPPI Packet Streaming Interface interface supports 8 TX channels and one RX channel operating by TI J721E NAVSS Unified DMA Peripheral Root Complex (UDMA-P) controller.

The driver follows the standard Linux network interface architecture and supports the following features:

  1. 10/100/1000 Mbps mode of operation.

  2. Auto negotiation.

  3. Linux NAPI support

  4. VLAN filtering

  5. Ethertool

  6. CPTS/PTP as per 802.1AS-2011 (TSN)

  7. EST/TAS offload as per 802.1Q-2018 (TSN)

  8. IET/preemption offload as per 802.1Q-2018 (TSN)

  9. Forwarding and Queuing Enhancements for Time-Sensitive Streams (FQTSS) as per 802.1Q-2018 previously referred to as CBS or 802.1Qav

3.2.2.10.3.1.1.1. Supported platforms

SoC

Number of external ports

Instances - Domain

J721e

1 external port (CPSW2g)

1 - MCU

J7200

1 external port (CPSW2g)

1 - MCU

J721S2

1 external port (CPSW2g)

2 - MAIN, MCU

J784S4

1 external port (CPSW2g)

2 - MAIN, MCU

3.2.2.10.3.1.2. Driver Configuration

The TI Processor SDK has J721E CPSW2g driver enabled by default. In case of custom builds, please ensure following configs are enabled.

CONFIG_TI_DAVINCI_MDIO
CONFIG_TI_K3_AM65_CPSW_NUSS
CONFIG_TI_K3_AM65_CPTS
CONFIG_TI_AM65_CPSW_TAS
CONFIG_PHY_TI_GMII_SEL

For further details regarding the above configs, refer: #. drivers/net/ethernet/ti/Kconfig #. drivers/phy/ti/Kconfig

Module Build

Module build for the cpsw driver is supported. To do this, use option ‘m’ for above configs, where applicable.