SPIMSP432DMA_HWAttrs Struct Reference

SPIMSP432DMA Hardware attributes These fields, with the exception of intPriority, are used by driverlib APIs and therefore must be populated by driverlib macro definitions. For MSP430Ware these definitions are found in: More...

#include <SPIMSP432DMA.h>

Data Fields
uint32_t	baseAddr
uint16_t	bitOrder
uint8_t	clockSource
uint8_t	defaultTxBufValue
uint8_t	dmaIntNum
uint32_t	intPriority
uint32_t	rxDMAChannelIndex
uint32_t	txDMAChannelIndex

Detailed Description

SPIMSP432DMA Hardware attributes These fields, with the exception of intPriority, are used by driverlib APIs and therefore must be populated by driverlib macro definitions. For MSP430Ware these definitions are found in:

• dma.h
• spi.h

intPriority is the SPI peripheral's interrupt priority, as defined by the underlying OS. It is passed unmodified to the underlying OS's interrupt handler creation code, so you need to refer to the OS documentation for usage. For example, for SYS/BIOS applications, refer to the ti.sysbios.family.arm.m3.Hwi documentation for SYS/BIOS usage of interrupt priorities. If the driver uses the ti.drivers.ports interface instead of making OS calls directly, then the HwiP port handles the interrupt priority in an OS specific way. In the case of the SYS/BIOS port, intPriority is passed unmodified to Hwi_create().

A sample structure is shown below:

const SPIMSP432DMA_HWAttrs spiMSP432DMAHWAttrs[] = {
    {
        .baseAddr = EUSCI_B0_BASE,
        .clockSource = EUSCI_B_SPI_CLOCKSOURCE_SMCLK,
        .bitOrder = EUSCI_B_SPI_MSB_FIRST,

        .defaultTxBufValue = 0,

        .dmaIntNum = INT_DMA_INT1,
        .intPriority = (~0),
        .rxDMAChannelIndex = DMA_CH1_EUSCIB0RX0,
        .txDMAChannelIndex = DMA_CH0_EUSCIB0TX0
    },
    {
        .baseAddr = EUSCI_B2_BASE,
        .clockSource = EUSCI_B_SPI_CLOCKSOURCE_SMCLK,
        .bitOrder = EUSCI_B_SPI_MSB_FIRST,

        .defaultTxBufValue = 0,

        .dmaIntNum = INT_DMA_INT2,
        .intPriority = (~0),
        .rxDMAChannelIndex = DMA_CH5_EUSCIB2RX0,
        .txDMAChannelIndex = DMA_CH4_EUSCIB2TX0
    }
};

Field Documentation

uint32_t SPIMSP432DMA_HWAttrs::baseAddr

EUSCI_B_SPI Peripheral's base address

uint16_t SPIMSP432DMA_HWAttrs::bitOrder

EUSCI_B_SPI Bit order

uint8_t SPIMSP432DMA_HWAttrs::clockSource

EUSCI_B_SPI Clock source

uint8_t SPIMSP432DMA_HWAttrs::defaultTxBufValue

uint8_t SPIMSP432DMA_HWAttrs::dmaIntNum

Default TX value if txBuf == NULL DMA interrupt number

uint32_t SPIMSP432DMA_HWAttrs::intPriority

DMA interrupt priority

uint32_t SPIMSP432DMA_HWAttrs::rxDMAChannelIndex

DMA rxDMAChannel for Rx data

uint32_t SPIMSP432DMA_HWAttrs::txDMAChannelIndex

DMA txDMAChannel for Tx data

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The documentation for this struct was generated from the following file:

• SPIMSP432DMA.h